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255 lines
8.7 KiB
C++
255 lines
8.7 KiB
C++
// -*- C++ -*-
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//
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// $Id: CDR_Base.inl 80826 2008-03-04 14:51:23Z wotte $
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#if defined (ACE_HAS_INTRINSIC_BYTESWAP)
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// Take advantage of MSVC++ byte swapping compiler intrinsics (found
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// in <stdlib.h>).
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# pragma intrinsic (_byteswap_ushort, _byteswap_ulong, _byteswap_uint64)
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#endif /* ACE_HAS_INTRINSIC_BYTESWAP */
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#if defined (ACE_HAS_BSWAP_16) || defined (ACE_HAS_BSWAP_32) || defined (ACE_HAS_BSWAP_64)
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# include "ace/os_include/os_byteswap.h"
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#endif
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ACE_BEGIN_VERSIONED_NAMESPACE_DECL
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//
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// The ACE_CDR::swap_X and ACE_CDR::swap_X_array routines are broken
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// in 5 cases for optimization:
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//
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// * MSVC++ 7.1 or better
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// => Compiler intrinsics
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//
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// * AMD64 CPU + gnu g++
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// => gcc amd64 inline assembly.
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//
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// * x86 Pentium CPU + gnu g++
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// (ACE_HAS_PENTIUM && __GNUG__)
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// => gcc x86 inline assembly.
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//
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// * x86 Pentium CPU and (_MSC_VER) or BORLAND C++)
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// (ACE_HAS_PENTIUM && ( _MSC_VER || __BORLANDC__ )
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// => MSC x86 inline assembly.
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//
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// * 64 bit architecture
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// (ACE_SIZEOF_LONG == 8)
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// => shift/masks using 64bit words.
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//
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// * default
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// (none of the above)
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// => shift/masks using 32bit words.
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//
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//
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// Some things you could find useful to know if you intend to mess
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// with this optimizations for swaps:
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//
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// * MSVC++ don't assume register values are conserved between
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// statements. So you can clobber any register you want,
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// whenever you want (well not *anyone* really, see manual).
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// The MSVC++ optimizer will try to pick different registers
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// for the C++ statements sorrounding your asm block, and if
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// it's not possible will use the stack.
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//
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// * If you clobber registers with asm statements in gcc, you
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// better do it in an asm-only function, or save/restore them
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// before/after in the stack. If not, sorrounding C statements
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// could end using the same registers and big-badda-bum (been
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// there, done that...). The big-badda-bum could happen *even
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// if you specify the clobbered register in your asm's*.
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// Even better, use gcc asm syntax for detecting the register
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// asigned to a certain variable so you don't have to clobber any
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// register directly.
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//
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ACE_INLINE void
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ACE_CDR::swap_2 (const char *orig, char* target)
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{
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#if defined (ACE_HAS_INTRINSIC_BYTESWAP)
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// Take advantage of MSVC++ compiler intrinsic byte swapping
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// function.
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*reinterpret_cast<unsigned short *> (target) =
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_byteswap_ushort (*reinterpret_cast<unsigned short const *> (orig));
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#elif defined (ACE_HAS_BSWAP16)
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*reinterpret_cast<uint16_t *> (target) =
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bswap16 (*reinterpret_cast<uint16_t const *> (orig));
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#elif defined (ACE_HAS_BSWAP_16)
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*reinterpret_cast<uint16_t *> (target) =
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bswap_16 (*reinterpret_cast<uint16_t const *> (orig));
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#elif defined(ACE_HAS_INTEL_ASSEMBLY)
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unsigned short a =
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*reinterpret_cast<const unsigned short*> (orig);
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asm( "rolw $8, %0" : "=r" (a) : "0" (a) );
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*reinterpret_cast<unsigned short*> (target) = a;
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#elif defined (ACE_HAS_PENTIUM) \
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&& (defined(_MSC_VER) || defined(__BORLANDC__)) \
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&& !defined(ACE_LACKS_INLINE_ASSEMBLY)
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__asm mov ebx, orig;
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__asm mov ecx, target;
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__asm mov ax, [ebx];
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__asm rol ax, 8;
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__asm mov [ecx], ax;
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#else
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register ACE_UINT16 usrc = * reinterpret_cast<const ACE_UINT16*> (orig);
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register ACE_UINT16* udst = reinterpret_cast<ACE_UINT16*> (target);
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*udst = (usrc << 8) | (usrc >> 8);
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#endif /* ACE_HAS_PENTIUM */
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}
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ACE_INLINE void
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ACE_CDR::swap_4 (const char* orig, char* target)
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{
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#if defined (ACE_HAS_INTRINSIC_BYTESWAP)
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// Take advantage of MSVC++ compiler intrinsic byte swapping
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// function.
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*reinterpret_cast<unsigned long *> (target) =
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_byteswap_ulong (*reinterpret_cast<unsigned long const *> (orig));
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#elif defined (ACE_HAS_BSWAP32)
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*reinterpret_cast<uint32_t *> (target) =
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bswap32 (*reinterpret_cast<uint32_t const *> (orig));
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#elif defined (ACE_HAS_BSWAP_32)
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*reinterpret_cast<uint32_t *> (target) =
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bswap_32 (*reinterpret_cast<uint32_t const *> (orig));
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#elif defined(ACE_HAS_INTEL_ASSEMBLY)
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// We have ACE_HAS_PENTIUM, so we know the sizeof's.
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register unsigned int j =
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*reinterpret_cast<const unsigned int*> (orig);
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asm ("bswap %1" : "=r" (j) : "0" (j));
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*reinterpret_cast<unsigned int*> (target) = j;
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#elif defined(ACE_HAS_PENTIUM) \
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&& (defined(_MSC_VER) || defined(__BORLANDC__)) \
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&& !defined(ACE_LACKS_INLINE_ASSEMBLY)
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__asm mov ebx, orig;
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__asm mov ecx, target;
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__asm mov eax, [ebx];
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__asm bswap eax;
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__asm mov [ecx], eax;
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#else
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register ACE_UINT32 x = * reinterpret_cast<const ACE_UINT32*> (orig);
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x = (x << 24) | ((x & 0xff00) << 8) | ((x & 0xff0000) >> 8) | (x >> 24);
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* reinterpret_cast<ACE_UINT32*> (target) = x;
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#endif /* ACE_HAS_INTRINSIC_BYTESWAP */
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}
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ACE_INLINE void
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ACE_CDR::swap_8 (const char* orig, char* target)
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{
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#if defined (ACE_HAS_INTRINSIC_BYTESWAP)
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// Take advantage of MSVC++ compiler intrinsic byte swapping
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// function.
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*reinterpret_cast<unsigned __int64 *> (target) =
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_byteswap_uint64 (*reinterpret_cast<unsigned __int64 const *> (orig));
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#elif defined (ACE_HAS_BSWAP64)
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*reinterpret_cast<uint64_t *> (target) =
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bswap64 (*reinterpret_cast<uint64_t const *> (orig));
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#elif defined (ACE_HAS_BSWAP_64)
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*reinterpret_cast<uint64_t *> (target) =
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bswap_64 (*reinterpret_cast<uint64_t const *> (orig));
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#elif (defined (__amd64__) || defined (__x86_64__)) && defined(__GNUG__)
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register unsigned long x =
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* reinterpret_cast<const unsigned long*> (orig);
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asm ("bswapq %1" : "=r" (x) : "0" (x));
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*reinterpret_cast<unsigned long*> (target) = x;
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#elif defined(ACE_HAS_PENTIUM) && defined(__GNUG__)
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register unsigned int i =
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*reinterpret_cast<const unsigned int*> (orig);
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register unsigned int j =
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*reinterpret_cast<const unsigned int*> (orig + 4);
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asm ("bswap %1" : "=r" (i) : "0" (i));
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asm ("bswap %1" : "=r" (j) : "0" (j));
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*reinterpret_cast<unsigned int*> (target + 4) = i;
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*reinterpret_cast<unsigned int*> (target) = j;
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#elif defined(ACE_HAS_PENTIUM) \
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&& (defined(_MSC_VER) || defined(__BORLANDC__)) \
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&& !defined(ACE_LACKS_INLINE_ASSEMBLY)
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__asm mov ecx, orig;
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__asm mov edx, target;
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__asm mov eax, [ecx];
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__asm mov ebx, 4[ecx];
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__asm bswap eax;
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__asm bswap ebx;
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__asm mov 4[edx], eax;
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__asm mov [edx], ebx;
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#elif ACE_SIZEOF_LONG == 8
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// 64 bit architecture.
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register unsigned long x =
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* reinterpret_cast<const unsigned long*> (orig);
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register unsigned long x84 = (x & 0x000000ff000000ffUL) << 24;
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register unsigned long x73 = (x & 0x0000ff000000ff00UL) << 8;
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register unsigned long x62 = (x & 0x00ff000000ff0000UL) >> 8;
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register unsigned long x51 = (x & 0xff000000ff000000UL) >> 24;
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x = (x84 | x73 | x62 | x51);
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x = (x << 32) | (x >> 32);
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*reinterpret_cast<unsigned long*> (target) = x;
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#else
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register ACE_UINT32 x =
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* reinterpret_cast<const ACE_UINT32*> (orig);
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register ACE_UINT32 y =
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* reinterpret_cast<const ACE_UINT32*> (orig + 4);
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x = (x << 24) | ((x & 0xff00) << 8) | ((x & 0xff0000) >> 8) | (x >> 24);
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y = (y << 24) | ((y & 0xff00) << 8) | ((y & 0xff0000) >> 8) | (y >> 24);
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* reinterpret_cast<ACE_UINT32*> (target) = y;
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* reinterpret_cast<ACE_UINT32*> (target + 4) = x;
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#endif /* ACE_HAS_INTRINSIC_BYTESWAP */
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}
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ACE_INLINE void
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ACE_CDR::swap_16 (const char* orig, char* target)
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{
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swap_8 (orig + 8, target);
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swap_8 (orig, target + 8);
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}
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ACE_INLINE size_t
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ACE_CDR::first_size (size_t minsize)
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{
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if (minsize == 0)
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return ACE_CDR::DEFAULT_BUFSIZE;
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size_t newsize = ACE_CDR::DEFAULT_BUFSIZE;
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while (newsize < minsize)
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{
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if (newsize < ACE_CDR::EXP_GROWTH_MAX)
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{
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// We grow exponentially at the beginning, this is fast and
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// reduces the number of allocations.
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// Quickly multiply by two using a bit shift. This is
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// guaranteed to work since the variable is an unsigned
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// integer.
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newsize <<= 1;
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}
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else
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{
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// but continuing with exponential growth can result in over
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// allocations and easily yield an allocation failure.
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// So we grow linearly when the buffer is too big.
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newsize += ACE_CDR::LINEAR_GROWTH_CHUNK;
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}
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}
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return newsize;
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}
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ACE_INLINE size_t
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ACE_CDR::next_size (size_t minsize)
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{
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size_t newsize = ACE_CDR::first_size (minsize);
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if (newsize == minsize)
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{
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// If necessary increment the size
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if (newsize < ACE_CDR::EXP_GROWTH_MAX)
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// Quickly multiply by two using a bit shift. This is
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// guaranteed to work since the variable is an unsigned
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// integer.
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newsize <<= 1;
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else
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newsize += ACE_CDR::LINEAR_GROWTH_CHUNK;
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}
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return newsize;
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}
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ACE_END_VERSIONED_NAMESPACE_DECL
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// ****************************************************************
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