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misc: chore: Merge into pattern

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KeatonTheBot 2025-08-30 19:46:36 -05:00
parent 503dea74c2
commit fa682d406e
157 changed files with 470 additions and 546 deletions
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2
src/ARMeilleure/CodeGen/Arm64/Arm64Optimizer.cs
View file

@ -254,7 +254,7 @@ namespace ARMeilleure.CodeGen.Arm64
private static bool IsMemoryLoadOrStore(Instruction inst)
{
return inst == Instruction.Load || inst == Instruction.Store;
return inst is Instruction.Load or Instruction.Store;
}
private static bool ConstTooLong(Operand constOp, OperandType accessType)

2
src/ARMeilleure/CodeGen/Arm64/CodeGenCommon.cs
View file

@ -52,7 +52,7 @@ namespace ARMeilleure.CodeGen.Arm64
// Any value AND all ones will be equal itself, so it's effectively a no-op.
// Any value OR all ones will be equal all ones, so one can just use MOV.
// Any value XOR all ones will be equal its inverse, so one can just use MVN.
if (value == 0 || value == ulong.MaxValue)
if (value is 0 or ulong.MaxValue)
{
immN = 0;
immS = 0;

11
src/ARMeilleure/CodeGen/Arm64/CodeGenerator.cs
View file

@ -189,8 +189,7 @@ namespace ARMeilleure.CodeGen.Arm64
// The only blocks which can have 0 successors are exit blocks.
Operation last = block.Operations.Last;
Debug.Assert(last.Instruction == Instruction.Tailcall ||
last.Instruction == Instruction.Return);
Debug.Assert(last.Instruction is Instruction.Tailcall or Instruction.Return);
}
else
{
@ -464,7 +463,7 @@ namespace ARMeilleure.CodeGen.Arm64
Operand dest = operation.Destination;
Operand source = operation.GetSource(0);
Debug.Assert(dest.Type == OperandType.FP32 || dest.Type == OperandType.FP64);
Debug.Assert(dest.Type is OperandType.FP32 or OperandType.FP64);
Debug.Assert(dest.Type != source.Type);
Debug.Assert(source.Type != OperandType.V128);
@ -483,7 +482,7 @@ namespace ARMeilleure.CodeGen.Arm64
Operand dest = operation.Destination;
Operand source = operation.GetSource(0);
Debug.Assert(dest.Type == OperandType.FP32 || dest.Type == OperandType.FP64);
Debug.Assert(dest.Type is OperandType.FP32 or OperandType.FP64);
Debug.Assert(dest.Type != source.Type);
Debug.Assert(source.Type.IsInteger());
@ -1463,7 +1462,7 @@ namespace ARMeilleure.CodeGen.Arm64
private static bool IsLoadOrStore(Operation operation)
{
return operation.Instruction == Instruction.Load || operation.Instruction == Instruction.Store;
return operation.Instruction is Instruction.Load or Instruction.Store;
}
private static OperandType GetMemOpValueType(Operation operation)
@ -1553,7 +1552,7 @@ namespace ARMeilleure.CodeGen.Arm64
private static void EnsureSameReg(Operand op1, Operand op2)
{
Debug.Assert(op1.Kind == OperandKind.Register || op1.Kind == OperandKind.Memory);
Debug.Assert(op1.Kind is OperandKind.Register or OperandKind.Memory);
Debug.Assert(op1.Kind == op2.Kind);
Debug.Assert(op1.Value == op2.Value);
}

28
src/ARMeilleure/CodeGen/Arm64/PreAllocator.cs
View file

@ -736,19 +736,19 @@ namespace ARMeilleure.CodeGen.Arm64
{
IntrinsicInfo info = IntrinsicTable.GetInfo(intrinsic & ~(Intrinsic.Arm64VTypeMask | Intrinsic.Arm64VSizeMask));
return info.Type == IntrinsicType.ScalarBinaryRd ||
info.Type == IntrinsicType.ScalarTernaryFPRdByElem ||
info.Type == IntrinsicType.ScalarTernaryShlRd ||
info.Type == IntrinsicType.ScalarTernaryShrRd ||
info.Type == IntrinsicType.Vector128BinaryRd ||
info.Type == IntrinsicType.VectorBinaryRd ||
info.Type == IntrinsicType.VectorInsertByElem ||
info.Type == IntrinsicType.VectorTernaryRd ||
info.Type == IntrinsicType.VectorTernaryRdBitwise ||
info.Type == IntrinsicType.VectorTernaryFPRdByElem ||
info.Type == IntrinsicType.VectorTernaryRdByElem ||
info.Type == IntrinsicType.VectorTernaryShlRd ||
info.Type == IntrinsicType.VectorTernaryShrRd;
return info.Type is IntrinsicType.ScalarBinaryRd
or IntrinsicType.ScalarTernaryFPRdByElem
or IntrinsicType.ScalarTernaryShlRd
or IntrinsicType.ScalarTernaryShrRd
or IntrinsicType.Vector128BinaryRd
or IntrinsicType.VectorBinaryRd
or IntrinsicType.VectorInsertByElem
or IntrinsicType.VectorTernaryRd
or IntrinsicType.VectorTernaryRdBitwise
or IntrinsicType.VectorTernaryFPRdByElem
or IntrinsicType.VectorTernaryRdByElem
or IntrinsicType.VectorTernaryShlRd
or IntrinsicType.VectorTernaryShrRd;
}
private static bool HasConstSrc1(Operation node, ulong value)
@ -849,7 +849,7 @@ namespace ARMeilleure.CodeGen.Arm64
var compType = (Comparison)comp.AsInt32();
return compType == Comparison.Equal || compType == Comparison.NotEqual;
return compType is Comparison.Equal or Comparison.NotEqual;
}
}

10
src/ARMeilleure/CodeGen/Optimizations/Optimizer.cs
View file

@ -227,11 +227,11 @@ namespace ARMeilleure.CodeGen.Optimizations
private static bool HasSideEffects(Operation node)
{
return node.Instruction == Instruction.Call
|| node.Instruction == Instruction.Tailcall
|| node.Instruction == Instruction.CompareAndSwap
|| node.Instruction == Instruction.CompareAndSwap16
|| node.Instruction == Instruction.CompareAndSwap8;
return node.Instruction is Instruction.Call
or Instruction.Tailcall
or Instruction.CompareAndSwap
or Instruction.CompareAndSwap16
or Instruction.CompareAndSwap8;
}
private static bool IsPropagableCompare(Operation operation)

5
src/ARMeilleure/CodeGen/RegisterAllocators/LinearScanAllocator.cs
View file

@ -847,7 +847,7 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
// If this is a copy (or copy-like operation), set the copy source interval as well.
// This is used for register preferencing later on, which allows the copy to be eliminated
// in some cases.
if (node.Instruction == Instruction.Copy || node.Instruction == Instruction.ZeroExtend32)
if (node.Instruction is Instruction.Copy or Instruction.ZeroExtend32)
{
Operand source = node.GetSource(0);
@ -1120,8 +1120,7 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
private static bool IsLocalOrRegister(OperandKind kind)
{
return kind == OperandKind.LocalVariable ||
kind == OperandKind.Register;
return kind is OperandKind.LocalVariable or OperandKind.Register;
}
}
}

2
src/ARMeilleure/CodeGen/X86/Assembler.cs
View file

@ -1477,7 +1477,7 @@ namespace ARMeilleure.CodeGen.X86
private static bool Is64Bits(OperandType type)
{
return type == OperandType.I64 || type == OperandType.FP64;
return type is OperandType.I64 or OperandType.FP64;
}
private static bool IsImm8(ulong immediate, OperandType type)

9
src/ARMeilleure/CodeGen/X86/CodeGenerator.cs
View file

@ -175,8 +175,7 @@ namespace ARMeilleure.CodeGen.X86
// The only blocks which can have 0 successors are exit blocks.
Operation last = block.Operations.Last;
Debug.Assert(last.Instruction == Instruction.Tailcall ||
last.Instruction == Instruction.Return);
Debug.Assert(last.Instruction is Instruction.Tailcall or Instruction.Return);
}
else
{
@ -478,7 +477,7 @@ namespace ARMeilleure.CodeGen.X86
Debug.Assert(HardwareCapabilities.SupportsVexEncoding);
Debug.Assert(dest.Kind == OperandKind.Register && src1.Kind == OperandKind.Register && src2.Kind == OperandKind.Register);
Debug.Assert(src3.Kind == OperandKind.Register || src3.Kind == OperandKind.Memory);
Debug.Assert(src3.Kind is OperandKind.Register or OperandKind.Memory);
EnsureSameType(dest, src1, src2, src3);
Debug.Assert(dest.Type == OperandType.V128);
@ -788,7 +787,7 @@ namespace ARMeilleure.CodeGen.X86
Operand dest = operation.Destination;
Operand source = operation.GetSource(0);
Debug.Assert(dest.Type == OperandType.FP32 || dest.Type == OperandType.FP64);
Debug.Assert(dest.Type is OperandType.FP32 or OperandType.FP64);
if (dest.Type == OperandType.FP32)
{
@ -1723,7 +1722,7 @@ namespace ARMeilleure.CodeGen.X86
return;
}
Debug.Assert(op1.Kind == OperandKind.Register || op1.Kind == OperandKind.Memory);
Debug.Assert(op1.Kind is OperandKind.Register or OperandKind.Memory);
Debug.Assert(op1.Kind == op2.Kind);
Debug.Assert(op1.Value == op2.Value);
}

12
src/ARMeilleure/CodeGen/X86/PreAllocator.cs
View file

@ -312,9 +312,9 @@ namespace ARMeilleure.CodeGen.X86
case Instruction.Extended:
{
bool isBlend = node.Intrinsic == Intrinsic.X86Blendvpd ||
node.Intrinsic == Intrinsic.X86Blendvps ||
node.Intrinsic == Intrinsic.X86Pblendvb;
bool isBlend = node.Intrinsic is Intrinsic.X86Blendvpd
or Intrinsic.X86Blendvps
or Intrinsic.X86Pblendvb;
// BLENDVPD, BLENDVPS, PBLENDVB last operand is always implied to be XMM0 when VEX is not supported.
// SHA256RNDS2 always has an implied XMM0 as a last operand.
@ -513,8 +513,8 @@ namespace ARMeilleure.CodeGen.X86
Operand dest = node.Destination;
Operand source = node.GetSource(0);
Debug.Assert(dest.Type == OperandType.FP32 ||
dest.Type == OperandType.FP64, $"Invalid destination type \"{dest.Type}\".");
Debug.Assert(dest.Type is OperandType.FP32 or OperandType.FP64,
$"Invalid destination type \"{dest.Type}\".");
Operation currentNode = node;
@ -761,7 +761,7 @@ namespace ARMeilleure.CodeGen.X86
var compType = (Comparison)comp.AsInt32();
return compType == Comparison.Equal || compType == Comparison.NotEqual;
return compType is Comparison.Equal or Comparison.NotEqual;
}
}

12
src/ARMeilleure/CodeGen/X86/X86Optimizer.cs
View file

@ -248,12 +248,12 @@ namespace ARMeilleure.CodeGen.X86
private static bool IsMemoryLoadOrStore(Instruction inst)
{
return inst == Instruction.Load ||
inst == Instruction.Load16 ||
inst == Instruction.Load8 ||
inst == Instruction.Store ||
inst == Instruction.Store16 ||
inst == Instruction.Store8;
return inst is Instruction.Load
or Instruction.Load16
or Instruction.Load8
or Instruction.Store
or Instruction.Store16
or Instruction.Store8;
}
}
}

16
src/ARMeilleure/Decoders/Decoder.cs
View file

@ -254,8 +254,7 @@ namespace ARMeilleure.Decoders
}
// Compare and branch instructions are always conditional.
if (opCode.Instruction.Name == InstName.Cbz ||
opCode.Instruction.Name == InstName.Cbnz)
if (opCode.Instruction.Name is InstName.Cbz or InstName.Cbnz)
{
return false;
}
@ -284,7 +283,7 @@ namespace ARMeilleure.Decoders
// register (Rt == 15 or (mask & (1 << 15)) != 0), and cases where there is
// a write back to PC (wback == true && Rn == 15), however the later may
// be "undefined" depending on the CPU, so compilers should not produce that.
if (opCode is IOpCode32Mem || opCode is IOpCode32MemMult)
if (opCode is IOpCode32Mem or IOpCode32MemMult)
{
int rt, rn;
@ -326,15 +325,12 @@ namespace ARMeilleure.Decoders
}
// Explicit branch instructions.
return opCode is IOpCode32BImm ||
opCode is IOpCode32BReg;
return opCode is IOpCode32BImm or IOpCode32BReg;
}
private static bool IsCall(OpCode opCode)
{
return opCode.Instruction.Name == InstName.Bl ||
opCode.Instruction.Name == InstName.Blr ||
opCode.Instruction.Name == InstName.Blx;
return opCode.Instruction.Name is InstName.Bl or InstName.Blr or InstName.Blx;
}
private static bool IsException(OpCode opCode)
@ -344,9 +340,7 @@ namespace ARMeilleure.Decoders
private static bool IsTrap(OpCode opCode)
{
return opCode.Instruction.Name == InstName.Brk ||
opCode.Instruction.Name == InstName.Trap ||
opCode.Instruction.Name == InstName.Und;
return opCode.Instruction.Name is InstName.Brk or InstName.Trap or InstName.Und;
}
public static OpCode DecodeOpCode(IMemoryManager memory, ulong address, ExecutionMode mode)

3
src/ARMeilleure/Decoders/OpCodeMemImm.cs
View file

@ -28,8 +28,7 @@ namespace ARMeilleure.Decoders
MemOp type = WBack ? (MemOp)((opCode >> 10) & 3) : MemOp.Unsigned;
PostIdx = type == MemOp.PostIndexed;
Unscaled = type == MemOp.Unscaled ||
type == MemOp.Unprivileged;
Unscaled = type is MemOp.Unscaled or MemOp.Unprivileged;
// Unscaled and Unprivileged doesn't write back,
// but they do use the 9-bits Signed Immediate.

3
src/ARMeilleure/Diagnostics/IRDumper.cs
View file

@ -235,8 +235,7 @@ namespace ARMeilleure.Diagnostics
{
_builder.Append('.').Append(operation.Intrinsic);
}
else if (operation.Instruction == Instruction.BranchIf ||
operation.Instruction == Instruction.Compare)
else if (operation.Instruction is Instruction.BranchIf or Instruction.Compare)
{
comparison = true;
}

2
src/ARMeilleure/Instructions/InstEmitMemoryEx.cs
View file

@ -140,7 +140,7 @@ namespace ARMeilleure.Instructions
if (pair)
{
Debug.Assert(op.Size == 2 || op.Size == 3, "Invalid size for pairwise store.");
Debug.Assert(op.Size is 2 or 3, "Invalid size for pairwise store.");
Operand t2 = GetIntOrZR(context, op.Rt2);

5
src/ARMeilleure/Instructions/InstEmitMemoryHelper.cs
View file

@ -59,7 +59,7 @@ namespace ARMeilleure.Instructions
{
Operand value = GetInt(context, rt);
if (ext == Extension.Sx32 || ext == Extension.Sx64)
if (ext is Extension.Sx32 or Extension.Sx64)
{
OperandType destType = ext == Extension.Sx64 ? OperandType.I64 : OperandType.I32;
@ -124,8 +124,7 @@ namespace ARMeilleure.Instructions
private static bool IsSimd(ArmEmitterContext context)
{
return context.CurrOp is IOpCodeSimd &&
!(context.CurrOp is OpCodeSimdMemMs ||
context.CurrOp is OpCodeSimdMemSs);
!(context.CurrOp is OpCodeSimdMemMs or OpCodeSimdMemSs);
}
public static Operand EmitReadInt(ArmEmitterContext context, Operand address, int size)

10
src/ARMeilleure/Instructions/InstEmitSimdCvt.cs
View file

@ -1119,7 +1119,7 @@ namespace ARMeilleure.Instructions
private static Operand EmitFPConvert(ArmEmitterContext context, Operand value, int size, bool signed)
{
Debug.Assert(value.Type == OperandType.I32 || value.Type == OperandType.I64);
Debug.Assert(value.Type is OperandType.I32 or OperandType.I64);
Debug.Assert((uint)size < 2);
OperandType type = size == 0 ? OperandType.FP32 : OperandType.FP64;
@ -1136,7 +1136,7 @@ namespace ARMeilleure.Instructions
private static Operand EmitScalarFcvts(ArmEmitterContext context, Operand value, int fBits)
{
Debug.Assert(value.Type == OperandType.FP32 || value.Type == OperandType.FP64);
Debug.Assert(value.Type is OperandType.FP32 or OperandType.FP64);
value = EmitF2iFBitsMul(context, value, fBits);
@ -1160,7 +1160,7 @@ namespace ARMeilleure.Instructions
private static Operand EmitScalarFcvtu(ArmEmitterContext context, Operand value, int fBits)
{
Debug.Assert(value.Type == OperandType.FP32 || value.Type == OperandType.FP64);
Debug.Assert(value.Type is OperandType.FP32 or OperandType.FP64);
value = EmitF2iFBitsMul(context, value, fBits);
@ -1184,7 +1184,7 @@ namespace ARMeilleure.Instructions
private static Operand EmitF2iFBitsMul(ArmEmitterContext context, Operand value, int fBits)
{
Debug.Assert(value.Type == OperandType.FP32 || value.Type == OperandType.FP64);
Debug.Assert(value.Type is OperandType.FP32 or OperandType.FP64);
if (fBits == 0)
{
@ -1203,7 +1203,7 @@ namespace ARMeilleure.Instructions
private static Operand EmitI2fFBitsMul(ArmEmitterContext context, Operand value, int fBits)
{
Debug.Assert(value.Type == OperandType.FP32 || value.Type == OperandType.FP64);
Debug.Assert(value.Type is OperandType.FP32 or OperandType.FP64);
if (fBits == 0)
{

2
src/ARMeilleure/Instructions/InstEmitSimdCvt32.cs
View file

@ -635,7 +635,7 @@ namespace ARMeilleure.Instructions
private static Operand EmitFPConvert(ArmEmitterContext context, Operand value, OperandType type, bool signed)
{
Debug.Assert(value.Type == OperandType.I32 || value.Type == OperandType.I64);
Debug.Assert(value.Type is OperandType.I32 or OperandType.I64);
if (signed)
{

12
src/ARMeilleure/Instructions/InstEmitSimdHelper.cs
View file

@ -363,7 +363,7 @@ namespace ARMeilleure.Instructions
public static Operand EmitCountSetBits8(ArmEmitterContext context, Operand op) // "size" is 8 (SIMD&FP Inst.).
{
Debug.Assert(op.Type == OperandType.I32 || op.Type == OperandType.I64);
Debug.Assert(op.Type is OperandType.I32 or OperandType.I64);
Operand op0 = context.Subtract(op, context.BitwiseAnd(context.ShiftRightUI(op, Const(1)), Const(op.Type, 0x55L)));
@ -489,7 +489,7 @@ namespace ARMeilleure.Instructions
public static Operand EmitRoundByRMode(ArmEmitterContext context, Operand op)
{
Debug.Assert(op.Type == OperandType.FP32 || op.Type == OperandType.FP64);
Debug.Assert(op.Type is OperandType.FP32 or OperandType.FP64);
Operand lbl1 = Label();
Operand lbl2 = Label();
@ -1676,7 +1676,7 @@ namespace ARMeilleure.Instructions
int eSize = 8 << size;
Debug.Assert(op.Type == OperandType.I64);
Debug.Assert(eSize == 8 || eSize == 16 || eSize == 32 || eSize == 64);
Debug.Assert(eSize is 8 or 16 or 32 or 64);
Operand lbl1 = Label();
Operand lblEnd = Label();
@ -1709,7 +1709,7 @@ namespace ARMeilleure.Instructions
int eSize = 8 << size;
Debug.Assert(op.Type == OperandType.I64);
Debug.Assert(eSize == 8 || eSize == 16 || eSize == 32 || eSize == 64);
Debug.Assert(eSize is 8 or 16 or 32 or 64);
Operand lblEnd = Label();
@ -1735,7 +1735,7 @@ namespace ARMeilleure.Instructions
int eSizeDst = 8 << sizeDst;
Debug.Assert(op.Type == OperandType.I64);
Debug.Assert(eSizeDst == 8 || eSizeDst == 16 || eSizeDst == 32);
Debug.Assert(eSizeDst is 8 or 16 or 32);
Operand lbl1 = Label();
Operand lblEnd = Label();
@ -1768,7 +1768,7 @@ namespace ARMeilleure.Instructions
int eSizeDst = 8 << sizeDst;
Debug.Assert(op.Type == OperandType.I64);
Debug.Assert(eSizeDst == 8 || eSizeDst == 16 || eSizeDst == 32);
Debug.Assert(eSizeDst is 8 or 16 or 32);
Operand lblEnd = Label();

6
src/ARMeilleure/Instructions/InstEmitSimdHelper32.cs
View file

@ -31,7 +31,7 @@ namespace ARMeilleure.Instructions
{
Debug.Assert(type != OperandType.V128);
if (type == OperandType.FP64 || type == OperandType.I64)
if (type is OperandType.FP64 or OperandType.I64)
{
// From dreg.
return context.VectorExtract(type, GetVecA32(reg >> 1), reg & 1);
@ -48,7 +48,7 @@ namespace ARMeilleure.Instructions
Debug.Assert(value.Type != OperandType.V128);
Operand vec, insert;
if (value.Type == OperandType.FP64 || value.Type == OperandType.I64)
if (value.Type is OperandType.FP64 or OperandType.I64)
{
// From dreg.
vec = GetVecA32(reg >> 1);
@ -71,7 +71,7 @@ namespace ARMeilleure.Instructions
public static void InsertScalar16(ArmEmitterContext context, int reg, bool top, Operand value)
{
Debug.Assert(value.Type == OperandType.FP32 || value.Type == OperandType.I32);
Debug.Assert(value.Type is OperandType.FP32 or OperandType.I32);
Operand vec, insert;
vec = GetVecA32(reg >> 2);

8
src/ARMeilleure/Instructions/InstEmitSimdShift.cs
View file

@ -1634,7 +1634,7 @@ namespace ARMeilleure.Instructions
int eSize = 8 << size;
Debug.Assert(op.Type == OperandType.I64);
Debug.Assert(eSize == 8 || eSize == 16 || eSize == 32 || eSize == 64);
Debug.Assert(eSize is 8 or 16 or 32 or 64);
Operand res = context.AllocateLocal(OperandType.I64);
@ -1657,7 +1657,7 @@ namespace ARMeilleure.Instructions
int eSize = 8 << size;
Debug.Assert(op.Type == OperandType.I64);
Debug.Assert(eSize == 8 || eSize == 16 || eSize == 32 || eSize == 64);
Debug.Assert(eSize is 8 or 16 or 32 or 64);
Operand lblEnd = Label();
@ -1732,7 +1732,7 @@ namespace ARMeilleure.Instructions
Debug.Assert(op.Type == OperandType.I64);
Debug.Assert(shiftLsB.Type == OperandType.I32);
Debug.Assert(eSize == 8 || eSize == 16 || eSize == 32 || eSize == 64);
Debug.Assert(eSize is 8 or 16 or 32 or 64);
Operand lbl1 = Label();
Operand lblEnd = Label();
@ -1769,7 +1769,7 @@ namespace ARMeilleure.Instructions
Debug.Assert(op.Type == OperandType.I64);
Debug.Assert(shiftLsB.Type == OperandType.I32);
Debug.Assert(eSize == 8 || eSize == 16 || eSize == 32 || eSize == 64);
Debug.Assert(eSize is 8 or 16 or 32 or 64);
Operand lbl1 = Label();
Operand lbl2 = Label();

24
src/ARMeilleure/Instructions/SoftFloat.cs
View file

@ -322,7 +322,7 @@ namespace ARMeilleure.Instructions
float result;
if (type == FPType.SNaN || type == FPType.QNaN)
if (type is FPType.SNaN or FPType.QNaN)
{
if ((context.Fpcr & FPCR.Dn) != 0)
{
@ -498,7 +498,7 @@ namespace ARMeilleure.Instructions
double result;
if (type == FPType.SNaN || type == FPType.QNaN)
if (type is FPType.SNaN or FPType.QNaN)
{
if ((context.Fpcr & FPCR.Dn) != 0)
{
@ -676,7 +676,7 @@ namespace ARMeilleure.Instructions
ushort resultBits;
if (type == FPType.SNaN || type == FPType.QNaN)
if (type is FPType.SNaN or FPType.QNaN)
{
if (altHp)
{
@ -1522,7 +1522,7 @@ namespace ARMeilleure.Instructions
float result;
if (type == FPType.SNaN || type == FPType.QNaN)
if (type is FPType.SNaN or FPType.QNaN)
{
result = FPProcessNaN(type, op, context, fpcr);
}
@ -1689,7 +1689,7 @@ namespace ARMeilleure.Instructions
float result;
if (type == FPType.SNaN || type == FPType.QNaN)
if (type is FPType.SNaN or FPType.QNaN)
{
result = FPProcessNaN(type, op, context, fpcr);
}
@ -1726,7 +1726,7 @@ namespace ARMeilleure.Instructions
float result;
if (type == FPType.SNaN || type == FPType.QNaN)
if (type is FPType.SNaN or FPType.QNaN)
{
result = FPProcessNaN(type, op, context, fpcr);
}
@ -1920,7 +1920,7 @@ namespace ARMeilleure.Instructions
float result;
if (type == FPType.SNaN || type == FPType.QNaN)
if (type is FPType.SNaN or FPType.QNaN)
{
result = FPProcessNaN(type, op, context, fpcr);
}
@ -2211,7 +2211,7 @@ namespace ARMeilleure.Instructions
ushort resultBits;
if (type == FPType.SNaN || type == FPType.QNaN)
if (type is FPType.SNaN or FPType.QNaN)
{
if (altHp)
{
@ -3057,7 +3057,7 @@ namespace ARMeilleure.Instructions
double result;
if (type == FPType.SNaN || type == FPType.QNaN)
if (type is FPType.SNaN or FPType.QNaN)
{
result = FPProcessNaN(type, op, context, fpcr);
}
@ -3224,7 +3224,7 @@ namespace ARMeilleure.Instructions
double result;
if (type == FPType.SNaN || type == FPType.QNaN)
if (type is FPType.SNaN or FPType.QNaN)
{
result = FPProcessNaN(type, op, context, fpcr);
}
@ -3261,7 +3261,7 @@ namespace ARMeilleure.Instructions
double result;
if (type == FPType.SNaN || type == FPType.QNaN)
if (type is FPType.SNaN or FPType.QNaN)
{
result = FPProcessNaN(type, op, context, fpcr);
}
@ -3455,7 +3455,7 @@ namespace ARMeilleure.Instructions
double result;
if (type == FPType.SNaN || type == FPType.QNaN)
if (type is FPType.SNaN or FPType.QNaN)
{
result = FPProcessNaN(type, op, context, fpcr);
}

2
src/ARMeilleure/IntermediateRepresentation/Operand.cs
View file

@ -446,7 +446,7 @@ namespace ARMeilleure.IntermediateRepresentation
Data* data = null;
// If constant or register, then try to look up in the intern table before allocating.
if (kind == OperandKind.Constant || kind == OperandKind.Register)
if (kind is OperandKind.Constant or OperandKind.Register)
{
uint hash = (uint)HashCode.Combine(kind, type, value);

3
src/ARMeilleure/IntermediateRepresentation/OperandType.cs
View file

@ -16,8 +16,7 @@ namespace ARMeilleure.IntermediateRepresentation
{
public static bool IsInteger(this OperandType type)
{
return type == OperandType.I32 ||
type == OperandType.I64;
return type is OperandType.I32 or OperandType.I64;
}
public static RegisterType ToRegisterType(this OperandType type)

4
src/ARMeilleure/Memory/MemoryManagerType.cs
View file

@ -47,12 +47,12 @@ namespace ARMeilleure.Memory
{
public static bool IsHostMapped(this MemoryManagerType type)
{
return type == MemoryManagerType.HostMapped || type == MemoryManagerType.HostMappedUnsafe;
return type is MemoryManagerType.HostMapped or MemoryManagerType.HostMappedUnsafe;
}
public static bool IsHostTracked(this MemoryManagerType type)
{
return type == MemoryManagerType.HostTracked || type == MemoryManagerType.HostTrackedUnsafe;
return type is MemoryManagerType.HostTracked or MemoryManagerType.HostTrackedUnsafe;
}
public static bool IsHostMappedOrTracked(this MemoryManagerType type)

3
src/ARMeilleure/Translation/EmitterContext.cs
View file

@ -668,8 +668,7 @@ namespace ARMeilleure.Translation
Operation last = block.Operations.Last;
return last != default &&
(last.Instruction == Instruction.Return ||
last.Instruction == Instruction.Tailcall);
last.Instruction is Instruction.Return or Instruction.Tailcall;
}
public ControlFlowGraph GetControlFlowGraph()

3
src/ARMeilleure/Translation/PTC/Ptc.cs
View file

@ -1120,8 +1120,7 @@ namespace ARMeilleure.Translation.PTC
public void Close()
{
if (State == PtcState.Enabled ||
State == PtcState.Continuing)
if (State is PtcState.Enabled or PtcState.Continuing)
{
State = PtcState.Closing;
}

3
src/ARMeilleure/Translation/PTC/PtcProfiler.cs
View file

@ -447,8 +447,7 @@ namespace ARMeilleure.Translation.PTC
public void Start()
{
if (_ptc.State == PtcState.Enabled ||
_ptc.State == PtcState.Continuing)
if (_ptc.State is PtcState.Enabled or PtcState.Continuing)
{
Enabled = true;

2
src/Ryujinx.Audio.Backends.OpenAL/OpenALHardwareDeviceDriver.cs
View file

@ -178,7 +178,7 @@ namespace Ryujinx.Audio.Backends.OpenAL
public bool SupportsChannelCount(uint channelCount)
{
return channelCount == 1 || channelCount == 2 || channelCount == 6;
return channelCount is 1 or 2 or 6;
}
public bool SupportsDirection(Direction direction)

4
src/Ryujinx.Audio/Backends/CompatLayer/CompatLayerHardwareDeviceDriver.cs
View file

@ -162,7 +162,7 @@ namespace Ryujinx.Audio.Backends.CompatLayer
public bool SupportsChannelCount(uint channelCount)
{
return channelCount == 1 || channelCount == 2 || channelCount == 6;
return channelCount is 1 or 2 or 6;
}
public bool SupportsSampleFormat(SampleFormat sampleFormat)
@ -184,7 +184,7 @@ namespace Ryujinx.Audio.Backends.CompatLayer
public bool SupportsDirection(Direction direction)
{
return direction == Direction.Input || direction == Direction.Output;
return direction is Direction.Input or Direction.Output;
}
}
}

4
src/Ryujinx.Audio/Backends/Dummy/DummyHardwareDeviceDriver.cs
View file

@ -81,12 +81,12 @@ namespace Ryujinx.Audio.Backends.Dummy
public bool SupportsDirection(Direction direction)
{
return direction == Direction.Output || direction == Direction.Input;
return direction is Direction.Output or Direction.Input;
}
public bool SupportsChannelCount(uint channelCount)
{
return channelCount == 1 || channelCount == 2 || channelCount == 6;
return channelCount is 1 or 2 or 6;
}
}
}

2
src/Ryujinx.Audio/Common/AudioDeviceSession.cs
View file

@ -109,7 +109,7 @@ namespace Ryujinx.Audio.Common
/// <returns>The state of the session</returns>
public AudioDeviceState GetState()
{
Debug.Assert(_state == AudioDeviceState.Started || _state == AudioDeviceState.Stopped);
Debug.Assert(_state is AudioDeviceState.Started or AudioDeviceState.Stopped);
return _state;
}

2
src/Ryujinx.Audio/Renderer/Dsp/State/DelayState.cs
View file

@ -40,7 +40,7 @@ namespace Ryujinx.Audio.Renderer.Dsp.State
DelayFeedbackBaseGain = (1.0f - channelSpread) * FeedbackGain;
if (parameter.ChannelCount == 4 || parameter.ChannelCount == 6)
if (parameter.ChannelCount is 4 or 6)
{
DelayFeedbackCrossGain = channelSpread * 0.5f * FeedbackGain;
}

2
src/Ryujinx.Audio/Renderer/Parameter/EffectInParameterVersion1.cs
View file

@ -91,7 +91,7 @@ namespace Ryujinx.Audio.Renderer.Parameter
/// <returns>Returns true if the channel count is valid.</returns>
public static bool IsChannelCountValid(int channelCount)
{
return channelCount == 1 || channelCount == 2 || channelCount == 4 || channelCount == 6;
return channelCount is 1 or 2 or 4 or 6;
}
}
}

2
src/Ryujinx.Audio/Renderer/Parameter/EffectInParameterVersion2.cs
View file

@ -91,7 +91,7 @@ namespace Ryujinx.Audio.Renderer.Parameter
/// <returns>Returns true if the channel count is valid.</returns>
public static bool IsChannelCountValid(int channelCount)
{
return channelCount == 1 || channelCount == 2 || channelCount == 4 || channelCount == 6;
return channelCount is 1 or 2 or 4 or 6;
}
}
}

14
src/Ryujinx.Audio/Renderer/Server/AudioRenderSystem.cs
View file

@ -532,13 +532,13 @@ namespace Ryujinx.Audio.Renderer.Server
CommandType commandType = command.CommandType;
if (commandType == CommandType.AdpcmDataSourceVersion1 ||
commandType == CommandType.AdpcmDataSourceVersion2 ||
commandType == CommandType.PcmInt16DataSourceVersion1 ||
commandType == CommandType.PcmInt16DataSourceVersion2 ||
commandType == CommandType.PcmFloatDataSourceVersion1 ||
commandType == CommandType.PcmFloatDataSourceVersion2 ||
commandType == CommandType.Performance)
if (commandType is CommandType.AdpcmDataSourceVersion1
or CommandType.AdpcmDataSourceVersion2
or CommandType.PcmInt16DataSourceVersion1
or CommandType.PcmInt16DataSourceVersion2
or CommandType.PcmFloatDataSourceVersion1
or CommandType.PcmFloatDataSourceVersion2
or CommandType.Performance)
{
break;
}

46
src/Ryujinx.Audio/Renderer/Server/CommandProcessingTimeEstimatorVersion2.cs
View file

@ -20,7 +20,7 @@ namespace Ryujinx.Audio.Renderer.Server
public uint Estimate(PerformanceCommand command)
{
Debug.Assert(_sampleCount == 160 || _sampleCount == 240);
Debug.Assert(_sampleCount is 160 or 240);
if (_sampleCount == 160)
{
@ -32,7 +32,7 @@ namespace Ryujinx.Audio.Renderer.Server
public uint Estimate(ClearMixBufferCommand command)
{
Debug.Assert(_sampleCount == 160 || _sampleCount == 240);
Debug.Assert(_sampleCount is 160 or 240);
float costPerBuffer = 668.8f;
float baseCost = 193.2f;
@ -48,7 +48,7 @@ namespace Ryujinx.Audio.Renderer.Server
public uint Estimate(BiquadFilterCommand command)
{
Debug.Assert(_sampleCount == 160 || _sampleCount == 240);
Debug.Assert(_sampleCount is 160 or 240);
if (_sampleCount == 160)
{
@ -62,7 +62,7 @@ namespace Ryujinx.Audio.Renderer.Server
{
const float CostPerSample = 7.245f;
Debug.Assert(_sampleCount == 160 || _sampleCount == 240);
Debug.Assert(_sampleCount is 160 or 240);
int volumeCount = 0;
@ -79,7 +79,7 @@ namespace Ryujinx.Audio.Renderer.Server
public uint Estimate(MixRampCommand command)
{
Debug.Assert(_sampleCount == 160 || _sampleCount == 240);
Debug.Assert(_sampleCount is 160 or 240);
if (_sampleCount == 160)
{
@ -91,7 +91,7 @@ namespace Ryujinx.Audio.Renderer.Server
public uint Estimate(DepopPrepareCommand command)
{
Debug.Assert(_sampleCount == 160 || _sampleCount == 240);
Debug.Assert(_sampleCount is 160 or 240);
if (_sampleCount == 160)
{
@ -103,7 +103,7 @@ namespace Ryujinx.Audio.Renderer.Server
public uint Estimate(VolumeRampCommand command)
{
Debug.Assert(_sampleCount == 160 || _sampleCount == 240);
Debug.Assert(_sampleCount is 160 or 240);
if (_sampleCount == 160)
{
@ -115,7 +115,7 @@ namespace Ryujinx.Audio.Renderer.Server
public uint Estimate(PcmInt16DataSourceCommandVersion1 command)
{
Debug.Assert(_sampleCount == 160 || _sampleCount == 240);
Debug.Assert(_sampleCount is 160 or 240);
float costPerSample = 1195.5f;
float baseCost = 7797.0f;
@ -131,7 +131,7 @@ namespace Ryujinx.Audio.Renderer.Server
public uint Estimate(AdpcmDataSourceCommandVersion1 command)
{
Debug.Assert(_sampleCount == 160 || _sampleCount == 240);
Debug.Assert(_sampleCount is 160 or 240);
float costPerSample = 3564.1f;
float baseCost = 6225.5f;
@ -147,7 +147,7 @@ namespace Ryujinx.Audio.Renderer.Server
public uint Estimate(DepopForMixBuffersCommand command)
{
Debug.Assert(_sampleCount == 160 || _sampleCount == 240);
Debug.Assert(_sampleCount is 160 or 240);
if (_sampleCount == 160)
{
@ -159,7 +159,7 @@ namespace Ryujinx.Audio.Renderer.Server
public uint Estimate(CopyMixBufferCommand command)
{
Debug.Assert(_sampleCount == 160 || _sampleCount == 240);
Debug.Assert(_sampleCount is 160 or 240);
if (_sampleCount == 160)
{
@ -171,7 +171,7 @@ namespace Ryujinx.Audio.Renderer.Server
public uint Estimate(MixCommand command)
{
Debug.Assert(_sampleCount == 160 || _sampleCount == 240);
Debug.Assert(_sampleCount is 160 or 240);
if (_sampleCount == 160)
{
@ -183,7 +183,7 @@ namespace Ryujinx.Audio.Renderer.Server
public uint Estimate(DelayCommand command)
{
Debug.Assert(_sampleCount == 160 || _sampleCount == 240);
Debug.Assert(_sampleCount is 160 or 240);
if (_sampleCount == 160)
{
@ -234,7 +234,7 @@ namespace Ryujinx.Audio.Renderer.Server
public uint Estimate(ReverbCommand command)
{
Debug.Assert(_sampleCount == 160 || _sampleCount == 240);
Debug.Assert(_sampleCount is 160 or 240);
if (_sampleCount == 160)
{
@ -285,7 +285,7 @@ namespace Ryujinx.Audio.Renderer.Server
public uint Estimate(Reverb3dCommand command)
{
Debug.Assert(_sampleCount == 160 || _sampleCount == 240);
Debug.Assert(_sampleCount is 160 or 240);
if (_sampleCount == 160)
{
@ -335,7 +335,7 @@ namespace Ryujinx.Audio.Renderer.Server
public uint Estimate(AuxiliaryBufferCommand command)
{
Debug.Assert(_sampleCount == 160 || _sampleCount == 240);
Debug.Assert(_sampleCount is 160 or 240);
if (_sampleCount == 160)
{
@ -357,7 +357,7 @@ namespace Ryujinx.Audio.Renderer.Server
public uint Estimate(VolumeCommand command)
{
Debug.Assert(_sampleCount == 160 || _sampleCount == 240);
Debug.Assert(_sampleCount is 160 or 240);
if (_sampleCount == 160)
{
@ -369,7 +369,7 @@ namespace Ryujinx.Audio.Renderer.Server
public uint Estimate(CircularBufferSinkCommand command)
{
Debug.Assert(_sampleCount == 160 || _sampleCount == 240);
Debug.Assert(_sampleCount is 160 or 240);
float costPerBuffer = 1726.0f;
float baseCost = 1369.7f;
@ -385,7 +385,7 @@ namespace Ryujinx.Audio.Renderer.Server
public uint Estimate(DownMixSurroundToStereoCommand command)
{
Debug.Assert(_sampleCount == 160 || _sampleCount == 240);
Debug.Assert(_sampleCount is 160 or 240);
if (_sampleCount == 160)
{
@ -397,7 +397,7 @@ namespace Ryujinx.Audio.Renderer.Server
public uint Estimate(UpsampleCommand command)
{
Debug.Assert(_sampleCount == 160 || _sampleCount == 240);
Debug.Assert(_sampleCount is 160 or 240);
if (_sampleCount == 160)
{
@ -409,8 +409,8 @@ namespace Ryujinx.Audio.Renderer.Server
public uint Estimate(DeviceSinkCommand command)
{
Debug.Assert(_sampleCount == 160 || _sampleCount == 240);
Debug.Assert(command.InputCount == 2 || command.InputCount == 6);
Debug.Assert(_sampleCount is 160 or 240);
Debug.Assert(command.InputCount is 2 or 6);
if (command.InputCount == 2)
{
@ -433,7 +433,7 @@ namespace Ryujinx.Audio.Renderer.Server
public uint Estimate(PcmFloatDataSourceCommandVersion1 command)
{
// NOTE: This was added between REV7 and REV8 and for some reasons the estimator v2 was changed...
Debug.Assert(_sampleCount == 160 || _sampleCount == 240);
Debug.Assert(_sampleCount is 160 or 240);
float costPerSample = 3490.9f;
float baseCost = 10091.0f;

54
src/Ryujinx.Audio/Renderer/Server/CommandProcessingTimeEstimatorVersion3.cs
View file

@ -23,7 +23,7 @@ namespace Ryujinx.Audio.Renderer.Server
public uint Estimate(PerformanceCommand command)
{
Debug.Assert(SampleCount == 160 || SampleCount == 240);
Debug.Assert(SampleCount is 160 or 240);
if (SampleCount == 160)
{
@ -35,7 +35,7 @@ namespace Ryujinx.Audio.Renderer.Server
public uint Estimate(ClearMixBufferCommand command)
{
Debug.Assert(SampleCount == 160 || SampleCount == 240);
Debug.Assert(SampleCount is 160 or 240);
float costPerBuffer = 440.68f;
float baseCost = 0;
@ -50,7 +50,7 @@ namespace Ryujinx.Audio.Renderer.Server
public uint Estimate(BiquadFilterCommand command)
{
Debug.Assert(SampleCount == 160 || SampleCount == 240);
Debug.Assert(SampleCount is 160 or 240);
if (SampleCount == 160)
{
@ -64,7 +64,7 @@ namespace Ryujinx.Audio.Renderer.Server
{
float costPerSample = 6.4434f;
Debug.Assert(SampleCount == 160 || SampleCount == 240);
Debug.Assert(SampleCount is 160 or 240);
if (SampleCount == 160)
{
@ -86,7 +86,7 @@ namespace Ryujinx.Audio.Renderer.Server
public uint Estimate(MixRampCommand command)
{
Debug.Assert(SampleCount == 160 || SampleCount == 240);
Debug.Assert(SampleCount is 160 or 240);
if (SampleCount == 160)
{
@ -103,7 +103,7 @@ namespace Ryujinx.Audio.Renderer.Server
public uint Estimate(VolumeRampCommand command)
{
Debug.Assert(SampleCount == 160 || SampleCount == 240);
Debug.Assert(SampleCount is 160 or 240);
if (SampleCount == 160)
{
@ -115,7 +115,7 @@ namespace Ryujinx.Audio.Renderer.Server
public uint Estimate(PcmInt16DataSourceCommandVersion1 command)
{
Debug.Assert(SampleCount == 160 || SampleCount == 240);
Debug.Assert(SampleCount is 160 or 240);
float costPerSample = 710.143f;
float baseCost = 7853.286f;
@ -131,7 +131,7 @@ namespace Ryujinx.Audio.Renderer.Server
public uint Estimate(AdpcmDataSourceCommandVersion1 command)
{
Debug.Assert(SampleCount == 160 || SampleCount == 240);
Debug.Assert(SampleCount is 160 or 240);
float costPerSample = 3564.1f;
float baseCost = 9736.702f;
@ -147,7 +147,7 @@ namespace Ryujinx.Audio.Renderer.Server
public uint Estimate(DepopForMixBuffersCommand command)
{
Debug.Assert(SampleCount == 160 || SampleCount == 240);
Debug.Assert(SampleCount is 160 or 240);
if (SampleCount == 160)
{
@ -159,7 +159,7 @@ namespace Ryujinx.Audio.Renderer.Server
public uint Estimate(CopyMixBufferCommand command)
{
Debug.Assert(SampleCount == 160 || SampleCount == 240);
Debug.Assert(SampleCount is 160 or 240);
if (SampleCount == 160)
{
@ -171,7 +171,7 @@ namespace Ryujinx.Audio.Renderer.Server
public uint Estimate(MixCommand command)
{
Debug.Assert(SampleCount == 160 || SampleCount == 240);
Debug.Assert(SampleCount is 160 or 240);
if (SampleCount == 160)
{
@ -183,7 +183,7 @@ namespace Ryujinx.Audio.Renderer.Server
public virtual uint Estimate(DelayCommand command)
{
Debug.Assert(SampleCount == 160 || SampleCount == 240);
Debug.Assert(SampleCount is 160 or 240);
if (SampleCount == 160)
{
@ -233,7 +233,7 @@ namespace Ryujinx.Audio.Renderer.Server
public virtual uint Estimate(ReverbCommand command)
{
Debug.Assert(SampleCount == 160 || SampleCount == 240);
Debug.Assert(SampleCount is 160 or 240);
if (SampleCount == 160)
{
@ -283,7 +283,7 @@ namespace Ryujinx.Audio.Renderer.Server
public virtual uint Estimate(Reverb3dCommand command)
{
Debug.Assert(SampleCount == 160 || SampleCount == 240);
Debug.Assert(SampleCount is 160 or 240);
if (SampleCount == 160)
{
@ -333,7 +333,7 @@ namespace Ryujinx.Audio.Renderer.Server
public uint Estimate(AuxiliaryBufferCommand command)
{
Debug.Assert(SampleCount == 160 || SampleCount == 240);
Debug.Assert(SampleCount is 160 or 240);
if (SampleCount == 160)
{
@ -355,7 +355,7 @@ namespace Ryujinx.Audio.Renderer.Server
public uint Estimate(VolumeCommand command)
{
Debug.Assert(SampleCount == 160 || SampleCount == 240);
Debug.Assert(SampleCount is 160 or 240);
if (SampleCount == 160)
{
@ -367,7 +367,7 @@ namespace Ryujinx.Audio.Renderer.Server
public uint Estimate(CircularBufferSinkCommand command)
{
Debug.Assert(SampleCount == 160 || SampleCount == 240);
Debug.Assert(SampleCount is 160 or 240);
float costPerBuffer = 770.26f;
float baseCost = 0f;
@ -382,7 +382,7 @@ namespace Ryujinx.Audio.Renderer.Server
public uint Estimate(DownMixSurroundToStereoCommand command)
{
Debug.Assert(SampleCount == 160 || SampleCount == 240);
Debug.Assert(SampleCount is 160 or 240);
if (SampleCount == 160)
{
@ -394,7 +394,7 @@ namespace Ryujinx.Audio.Renderer.Server
public uint Estimate(UpsampleCommand command)
{
Debug.Assert(SampleCount == 160 || SampleCount == 240);
Debug.Assert(SampleCount is 160 or 240);
if (SampleCount == 160)
{
@ -406,8 +406,8 @@ namespace Ryujinx.Audio.Renderer.Server
public uint Estimate(DeviceSinkCommand command)
{
Debug.Assert(SampleCount == 160 || SampleCount == 240);
Debug.Assert(command.InputCount == 2 || command.InputCount == 6);
Debug.Assert(SampleCount is 160 or 240);
Debug.Assert(command.InputCount is 2 or 6);
if (command.InputCount == 2)
{
@ -429,7 +429,7 @@ namespace Ryujinx.Audio.Renderer.Server
public uint Estimate(PcmFloatDataSourceCommandVersion1 command)
{
Debug.Assert(SampleCount == 160 || SampleCount == 240);
Debug.Assert(SampleCount is 160 or 240);
float costPerSample = 3490.9f;
float baseCost = 10090.9f;
@ -445,7 +445,7 @@ namespace Ryujinx.Audio.Renderer.Server
public uint Estimate(DataSourceVersion2Command command)
{
Debug.Assert(SampleCount == 160 || SampleCount == 240);
Debug.Assert(SampleCount is 160 or 240);
(float baseCost, float costPerSample) = GetCostByFormat(SampleCount, command.SampleFormat, command.SrcQuality);
@ -454,7 +454,7 @@ namespace Ryujinx.Audio.Renderer.Server
private static (float, float) GetCostByFormat(uint sampleCount, SampleFormat format, SampleRateConversionQuality quality)
{
Debug.Assert(sampleCount == 160 || sampleCount == 240);
Debug.Assert(sampleCount is 160 or 240);
switch (format)
{
@ -540,7 +540,7 @@ namespace Ryujinx.Audio.Renderer.Server
private uint EstimateLimiterCommandCommon(LimiterParameter parameter, bool enabled)
{
Debug.Assert(SampleCount == 160 || SampleCount == 240);
Debug.Assert(SampleCount is 160 or 240);
if (SampleCount == 160)
{
@ -590,14 +590,14 @@ namespace Ryujinx.Audio.Renderer.Server
public uint Estimate(LimiterCommandVersion1 command)
{
Debug.Assert(SampleCount == 160 || SampleCount == 240);
Debug.Assert(SampleCount is 160 or 240);
return EstimateLimiterCommandCommon(command.Parameter, command.IsEffectEnabled);
}
public uint Estimate(LimiterCommandVersion2 command)
{
Debug.Assert(SampleCount == 160 || SampleCount == 240);
Debug.Assert(SampleCount is 160 or 240);
if (!command.Parameter.StatisticsEnabled || !command.IsEffectEnabled)
{

4
src/Ryujinx.Audio/Renderer/Server/CommandProcessingTimeEstimatorVersion4.cs
View file

@ -12,7 +12,7 @@ namespace Ryujinx.Audio.Renderer.Server
public override uint Estimate(MultiTapBiquadFilterCommand command)
{
Debug.Assert(SampleCount == 160 || SampleCount == 240);
Debug.Assert(SampleCount is 160 or 240);
if (SampleCount == 160)
{
@ -24,7 +24,7 @@ namespace Ryujinx.Audio.Renderer.Server
public override uint Estimate(CaptureBufferCommand command)
{
Debug.Assert(SampleCount == 160 || SampleCount == 240);
Debug.Assert(SampleCount is 160 or 240);
if (SampleCount == 160)
{

12
src/Ryujinx.Audio/Renderer/Server/CommandProcessingTimeEstimatorVersion5.cs
View file

@ -13,7 +13,7 @@ namespace Ryujinx.Audio.Renderer.Server
public override uint Estimate(DelayCommand command)
{
Debug.Assert(SampleCount == 160 || SampleCount == 240);
Debug.Assert(SampleCount is 160 or 240);
if (SampleCount == 160)
{
@ -63,7 +63,7 @@ namespace Ryujinx.Audio.Renderer.Server
public override uint Estimate(ReverbCommand command)
{
Debug.Assert(SampleCount == 160 || SampleCount == 240);
Debug.Assert(SampleCount is 160 or 240);
if (SampleCount == 160)
{
@ -113,7 +113,7 @@ namespace Ryujinx.Audio.Renderer.Server
public override uint Estimate(Reverb3dCommand command)
{
Debug.Assert(SampleCount == 160 || SampleCount == 240);
Debug.Assert(SampleCount is 160 or 240);
if (SampleCount == 160)
{
@ -163,7 +163,7 @@ namespace Ryujinx.Audio.Renderer.Server
public override uint Estimate(CompressorCommand command)
{
Debug.Assert(SampleCount == 160 || SampleCount == 240);
Debug.Assert(SampleCount is 160 or 240);
if (SampleCount == 160)
{
@ -241,7 +241,7 @@ namespace Ryujinx.Audio.Renderer.Server
public override uint Estimate(BiquadFilterAndMixCommand command)
{
Debug.Assert(SampleCount == 160 || SampleCount == 240);
Debug.Assert(SampleCount is 160 or 240);
if (command.HasVolumeRamp)
{
@ -265,7 +265,7 @@ namespace Ryujinx.Audio.Renderer.Server
public override uint Estimate(MultiTapBiquadFilterAndMixCommand command)
{
Debug.Assert(SampleCount == 160 || SampleCount == 240);
Debug.Assert(SampleCount is 160 or 240);
if (command.HasVolumeRamp)
{

2
src/Ryujinx.Common/SystemInterop/ForceDpiAware.cs
View file

@ -57,7 +57,7 @@ namespace Ryujinx.Common.SystemInterop
{
string xdgSessionType = Environment.GetEnvironmentVariable("XDG_SESSION_TYPE")?.ToLower();
if (xdgSessionType == null || xdgSessionType == "x11")
if (xdgSessionType is null or "x11")
{
IntPtr display = XOpenDisplay(null);
string dpiString = Marshal.PtrToStringAnsi(XGetDefault(display, "Xft", "dpi"));

2
src/Ryujinx.Cpu/AppleHv/HvExecutionContext.cs
View file

@ -219,7 +219,7 @@ namespace Ryujinx.Cpu.AppleHv
address = SynchronousException(memoryManager, ref vcpu);
HvApi.hv_vcpu_set_reg(vcpu.Handle, HvReg.PC, address).ThrowOnError();
}
else if (reason == HvExitReason.Canceled || reason == HvExitReason.VTimerActivated)
else if (reason is HvExitReason.Canceled or HvExitReason.VTimerActivated)
{
if (GetAndClearInterruptRequested())
{

2
src/Ryujinx.Cpu/LightningJit/Arm32/InstName.cs
View file

@ -531,7 +531,7 @@ namespace Ryujinx.Cpu.LightningJit.Arm32
{
public static bool IsCall(this InstName name)
{
return name == InstName.BlI || name == InstName.BlxR;
return name is InstName.BlI or InstName.BlxR;
}
public static bool IsSystem(this InstName name)

2
src/Ryujinx.Cpu/LightningJit/Arm32/Target/Arm64/Compiler.cs
View file

@ -560,7 +560,7 @@ namespace Ryujinx.Cpu.LightningJit.Arm32.Target.Arm64
}
}
Debug.Assert(name == InstName.B || name == InstName.Cbnz, $"Unknown branch instruction \"{name}\".");
Debug.Assert(name is InstName.B or InstName.Cbnz, $"Unknown branch instruction \"{name}\".");
}
private static void RewriteCallInstructionWithTarget(in Context context, uint targetAddress, uint nextAddress, int branchIndex)

30
src/Ryujinx.Cpu/LightningJit/Arm32/Target/Arm64/InstEmitNeonCommon.cs
View file

@ -118,7 +118,7 @@ namespace Ryujinx.Cpu.LightningJit.Arm32.Target.Arm64
public static void EmitScalarUnaryF(CodeGenContext context, uint rd, uint rm, uint size, Action<Operand, Operand, uint> action)
{
Debug.Assert(size == 1 || size == 2 || size == 3);
Debug.Assert(size is 1 or 2 or 3);
bool singleRegs = size != 3;
@ -133,7 +133,7 @@ namespace Ryujinx.Cpu.LightningJit.Arm32.Target.Arm64
public static void EmitScalarUnaryF(CodeGenContext context, uint rd, uint rm, uint size, Action<Operand, Operand, uint> action, Action<Operand, Operand> actionHalf)
{
Debug.Assert(size == 1 || size == 2 || size == 3);
Debug.Assert(size is 1 or 2 or 3);
bool singleRegs = size != 3;
@ -161,7 +161,7 @@ namespace Ryujinx.Cpu.LightningJit.Arm32.Target.Arm64
uint sf,
Action<Operand, Operand, uint, uint> action)
{
Debug.Assert(size == 1 || size == 2 || size == 3);
Debug.Assert(size is 1 or 2 or 3);
bool singleRegs = size != 3;
@ -182,7 +182,7 @@ namespace Ryujinx.Cpu.LightningJit.Arm32.Target.Arm64
uint sf,
Action<Operand, Operand, uint, uint> action)
{
Debug.Assert(size == 1 || size == 2 || size == 3);
Debug.Assert(size is 1 or 2 or 3);
bool singleRegs = size != 3;
@ -197,7 +197,7 @@ namespace Ryujinx.Cpu.LightningJit.Arm32.Target.Arm64
public static void EmitScalarUnaryFixedF(CodeGenContext context, uint rd, uint rm, uint fbits, uint size, bool is16Bit, Action<Operand, Operand, uint, uint> action)
{
Debug.Assert(size == 1 || size == 2 || size == 3);
Debug.Assert(size is 1 or 2 or 3);
bool singleRegs = size != 3;
@ -214,7 +214,7 @@ namespace Ryujinx.Cpu.LightningJit.Arm32.Target.Arm64
public static void EmitScalarBinaryF(CodeGenContext context, uint rd, uint rn, uint rm, uint size, Action<Operand, Operand, Operand, uint> action)
{
Debug.Assert(size == 1 || size == 2 || size == 3);
Debug.Assert(size is 1 or 2 or 3);
bool singleRegs = size != 3;
@ -252,7 +252,7 @@ namespace Ryujinx.Cpu.LightningJit.Arm32.Target.Arm64
public static void EmitScalarTernaryRdF(CodeGenContext context, uint rd, uint rn, uint rm, uint size, Action<Operand, Operand, Operand, uint> action)
{
Debug.Assert(size == 1 || size == 2 || size == 3);
Debug.Assert(size is 1 or 2 or 3);
bool singleRegs = size != 3;
@ -276,7 +276,7 @@ namespace Ryujinx.Cpu.LightningJit.Arm32.Target.Arm64
uint size,
Action<Operand, Operand, Operand, Operand, uint> action)
{
Debug.Assert(size == 1 || size == 2 || size == 3);
Debug.Assert(size is 1 or 2 or 3);
bool singleRegs = size != 3;
@ -300,7 +300,7 @@ namespace Ryujinx.Cpu.LightningJit.Arm32.Target.Arm64
bool negD,
bool negProduct)
{
Debug.Assert(size == 1 || size == 2 || size == 3);
Debug.Assert(size is 1 or 2 or 3);
bool singleRegs = size != 3;
@ -918,7 +918,7 @@ namespace Ryujinx.Cpu.LightningJit.Arm32.Target.Arm64
Action<Operand, Operand, uint, uint> action,
Action<Operand, Operand, uint> actionHalf)
{
Debug.Assert(sz == 0 || sz == 1);
Debug.Assert(sz is 0 or 1);
if (q == 0)
{
@ -962,7 +962,7 @@ namespace Ryujinx.Cpu.LightningJit.Arm32.Target.Arm64
Action<Operand, Operand, uint, uint> action,
Action<Operand, Operand, uint> actionHalf)
{
Debug.Assert(size == 1 || size == 2 || size == 3);
Debug.Assert(size is 1 or 2 or 3);
Debug.Assert(size != 3 || q == 1);
if (q == 0)
@ -1007,7 +1007,7 @@ namespace Ryujinx.Cpu.LightningJit.Arm32.Target.Arm64
uint q,
Action<Operand, Operand, uint, uint, uint> action)
{
Debug.Assert(size == 1 || size == 2 || size == 3);
Debug.Assert(size is 1 or 2 or 3);
Debug.Assert(size != 3 || q == 1);
(uint immb, uint immh) = GetImmbImmh(fbits, size);
@ -1040,7 +1040,7 @@ namespace Ryujinx.Cpu.LightningJit.Arm32.Target.Arm64
Action<Operand, Operand, Operand, uint, uint> action,
Action<Operand, Operand, Operand, uint> actionHalf)
{
Debug.Assert(sz == 0 || sz == 1);
Debug.Assert(sz is 0 or 1);
if (q == 0)
{
@ -1100,7 +1100,7 @@ namespace Ryujinx.Cpu.LightningJit.Arm32.Target.Arm64
Action<Operand, Operand, Operand, uint, uint> action,
Action<Operand, Operand, Operand, uint> actionHalf)
{
Debug.Assert(sz == 0 || sz == 1);
Debug.Assert(sz is 0 or 1);
if (q == 0)
{
@ -1148,7 +1148,7 @@ namespace Ryujinx.Cpu.LightningJit.Arm32.Target.Arm64
uint q,
bool negProduct)
{
Debug.Assert(sz == 0 || sz == 1);
Debug.Assert(sz is 0 or 1);
if (q == 0)
{

4
src/Ryujinx.Cpu/LightningJit/Arm32/Target/Arm64/InstEmitNeonMove.cs
View file

@ -252,7 +252,7 @@ namespace Ryujinx.Cpu.LightningJit.Arm32.Target.Arm64
}
else
{
Debug.Assert(opc1 == 0 || opc1 == 1);
Debug.Assert(opc1 is 0 or 1);
Debug.Assert(opc2 == 0);
index = opc1 & 1u;
@ -307,7 +307,7 @@ namespace Ryujinx.Cpu.LightningJit.Arm32.Target.Arm64
}
else
{
Debug.Assert(opc1 == 0 || opc1 == 1);
Debug.Assert(opc1 is 0 or 1);
Debug.Assert(opc2 == 0);
Debug.Assert(!u);

2
src/Ryujinx.Cpu/LightningJit/Arm32/Target/Arm64/InstEmitVfpCompare.cs
View file

@ -27,7 +27,7 @@ namespace Ryujinx.Cpu.LightningJit.Arm32.Target.Arm64
private static void EmitVcmpVcmpe(CodeGenContext context, uint cond, uint rd, uint rm, uint size, bool zero, bool e)
{
Debug.Assert(size == 1 || size == 2 || size == 3);
Debug.Assert(size is 1 or 2 or 3);
bool singleRegs = size != 3;
uint ftype = size ^ 2u;

2
src/Ryujinx.Cpu/LightningJit/Arm32/Target/Arm64/InstEmitVfpConvert.cs
View file

@ -231,7 +231,7 @@ namespace Ryujinx.Cpu.LightningJit.Arm32.Target.Arm64
{
bool unsigned = (op & 1) == 0;
Debug.Assert(size == 1 || size == 2 || size == 3);
Debug.Assert(size is 1 or 2 or 3);
bool singleRegs = size != 3;

2
src/Ryujinx.Cpu/LightningJit/Arm64/InstName.cs
View file

@ -1044,7 +1044,7 @@ namespace Ryujinx.Cpu.LightningJit.Arm64
{
public static bool IsCall(this InstName name)
{
return name == InstName.Bl || name == InstName.Blr;
return name is InstName.Bl or InstName.Blr;
}
public static bool IsControlFlowOrException(this InstName name)

4
src/Ryujinx.Cpu/LightningJit/Arm64/Target/Arm64/Compiler.cs
View file

@ -575,7 +575,7 @@ namespace Ryujinx.Cpu.LightningJit.Arm64.Target.Arm64
case InstName.Tbz:
uint branchMask;
if (name == InstName.Tbnz || name == InstName.Tbz)
if (name is InstName.Tbnz or InstName.Tbz)
{
originalOffset = ImmUtils.ExtractSImm14Times4(encoding);
branchMask = 0x3fff;
@ -653,7 +653,7 @@ namespace Ryujinx.Cpu.LightningJit.Arm64.Target.Arm64
case InstName.Tbz:
uint branchMask;
if (name == InstName.Tbnz || name == InstName.Tbz)
if (name is InstName.Tbnz or InstName.Tbz)
{
originalOffset = ImmUtils.ExtractSImm14Times4(encoding);
branchMask = 0x3fff;

4
src/Ryujinx.Cpu/LightningJit/Arm64/Target/Arm64/Decoder.cs
View file

@ -72,7 +72,7 @@ namespace Ryujinx.Cpu.LightningJit.Arm64.Target.Arm64
case InstName.Cbz:
case InstName.Tbnz:
case InstName.Tbz:
if (name == InstName.Tbnz || name == InstName.Tbz)
if (name is InstName.Tbnz or InstName.Tbz)
{
originalOffset = ImmUtils.ExtractSImm14Times4(encoding);
}
@ -369,7 +369,7 @@ namespace Ryujinx.Cpu.LightningJit.Arm64.Target.Arm64
case InstName.Cbz:
case InstName.Tbnz:
case InstName.Tbz:
int imm = name == InstName.Tbnz || name == InstName.Tbz
int imm = name is InstName.Tbnz or InstName.Tbz
? ImmUtils.ExtractSImm14Times4(encoding)
: ImmUtils.ExtractSImm19Times4(encoding);

2
src/Ryujinx.Cpu/LightningJit/Arm64/Target/Arm64/InstEmitSystem.cs
View file

@ -230,7 +230,7 @@ namespace Ryujinx.Cpu.LightningJit.Arm64.Target.Arm64
case InstName.Bl:
case InstName.Blr:
case InstName.Br:
if (name == InstName.BUncond || name == InstName.Bl)
if (name is InstName.BUncond or InstName.Bl)
{
int imm = ImmUtils.ExtractSImm26Times4(encoding);

2
src/Ryujinx.Cpu/LightningJit/CodeGen/Arm64/CodeGenCommon.cs
View file

@ -28,7 +28,7 @@ namespace Ryujinx.Cpu.LightningJit.CodeGen.Arm64
// Any value AND all ones will be equal itself, so it's effectively a no-op.
// Any value OR all ones will be equal all ones, so one can just use MOV.
// Any value XOR all ones will be equal its inverse, so one can just use MVN.
if (value == 0 || value == ulong.MaxValue)
if (value is 0 or ulong.MaxValue)
{
immN = 0;
immS = 0;

2
src/Ryujinx.Cpu/LightningJit/CodeGen/OperandType.cs
View file

@ -16,7 +16,7 @@ namespace Ryujinx.Cpu.LightningJit.CodeGen
{
public static bool IsInteger(this OperandType type)
{
return type == OperandType.I32 || type == OperandType.I64;
return type is OperandType.I32 or OperandType.I64;
}
public static int GetSizeInBytes(this OperandType type)

14
src/Ryujinx.Graphics.GAL/Target.cs
View file

@ -18,17 +18,17 @@ namespace Ryujinx.Graphics.GAL
{
public static bool IsMultisample(this Target target)
{
return target == Target.Texture2DMultisample || target == Target.Texture2DMultisampleArray;
return target is Target.Texture2DMultisample or Target.Texture2DMultisampleArray;
}
public static bool HasDepthOrLayers(this Target target)
{
return target == Target.Texture3D ||
target == Target.Texture1DArray ||
target == Target.Texture2DArray ||
target == Target.Texture2DMultisampleArray ||
target == Target.Cubemap ||
target == Target.CubemapArray;
return target is Target.Texture3D
or Target.Texture1DArray
or Target.Texture2DArray
or Target.Texture2DMultisampleArray
or Target.Cubemap
or Target.CubemapArray;
}
}
}

4
src/Ryujinx.Graphics.GAL/TextureCreateInfo.cs
View file

@ -98,9 +98,7 @@ namespace Ryujinx.Graphics.GAL
public int GetLayers()
{
if (Target == Target.Texture2DArray ||
Target == Target.Texture2DMultisampleArray ||
Target == Target.CubemapArray)
if (Target is Target.Texture2DArray or Target.Texture2DMultisampleArray or Target.CubemapArray)
{
return Depth;
}

3
src/Ryujinx.Graphics.Gpu/Engine/DeviceStateWithShadow.cs
View file

@ -85,8 +85,7 @@ namespace Ryujinx.Graphics.Gpu.Engine
{
_state.WriteWithRedundancyCheck(offset, value, out changed);
}
else if (shadowRamControl == SetMmeShadowRamControlMode.MethodTrack ||
shadowRamControl == SetMmeShadowRamControlMode.MethodTrackWithFilter)
else if (shadowRamControl is SetMmeShadowRamControlMode.MethodTrack or SetMmeShadowRamControlMode.MethodTrackWithFilter)
{
_shadowState.Write(offset, value);
_state.WriteWithRedundancyCheck(offset, value, out changed);

2
src/Ryujinx.Graphics.Gpu/Engine/SetMmeShadowRamControlMode.cs
View file

@ -15,7 +15,7 @@ namespace Ryujinx.Graphics.Gpu.Engine
{
public static bool IsTrack(this SetMmeShadowRamControlMode mode)
{
return mode == SetMmeShadowRamControlMode.MethodTrack || mode == SetMmeShadowRamControlMode.MethodTrackWithFilter;
return mode is SetMmeShadowRamControlMode.MethodTrack or SetMmeShadowRamControlMode.MethodTrackWithFilter;
}
public static bool IsPassthrough(this SetMmeShadowRamControlMode mode)

2
src/Ryujinx.Graphics.Gpu/Engine/Threed/ComputeDraw/VtgAsComputeState.cs
View file

@ -482,7 +482,7 @@ namespace Ryujinx.Graphics.Gpu.Engine.Threed.ComputeDraw
private readonly ulong GetVertexBufferSize(ulong vbAddress, ulong vbEndAddress, int vbStride, bool indexed, bool instanced, int firstVertex, int vertexCount)
{
IndexType indexType = _state.State.IndexBufferState.Type;
bool indexTypeSmall = indexType == IndexType.UByte || indexType == IndexType.UShort;
bool indexTypeSmall = indexType is IndexType.UByte or IndexType.UShort;
ulong vbSize = vbEndAddress - vbAddress + 1;
ulong size;

6
src/Ryujinx.Graphics.Gpu/Engine/Threed/SpecializationStateUpdater.cs
View file

@ -250,13 +250,11 @@ namespace Ryujinx.Graphics.Gpu.Engine.Threed
};
}
if (mayConvertVtgToCompute && (size == VertexAttribSize.Rgb10A2 || size == VertexAttribSize.Rg11B10))
if (mayConvertVtgToCompute && size is VertexAttribSize.Rgb10A2 or VertexAttribSize.Rg11B10)
{
value |= AttributeType.Packed;
if (type == VertexAttribType.Snorm ||
type == VertexAttribType.Sint ||
type == VertexAttribType.Sscaled)
if (type is VertexAttribType.Snorm or VertexAttribType.Sint or VertexAttribType.Sscaled)
{
value |= AttributeType.PackedRgb10A2Signed;
}

2
src/Ryujinx.Graphics.Gpu/Engine/Threed/StateUpdater.cs
View file

@ -1111,7 +1111,7 @@ namespace Ryujinx.Graphics.Gpu.Engine.Threed
private void UpdateVertexBufferState()
{
IndexType indexType = _state.State.IndexBufferState.Type;
bool indexTypeSmall = indexType == IndexType.UByte || indexType == IndexType.UShort;
bool indexTypeSmall = indexType is IndexType.UByte or IndexType.UShort;
_drawState.IsAnyVbInstanced = false;

2
src/Ryujinx.Graphics.Gpu/Image/Sampler.cs
View file

@ -77,7 +77,7 @@ namespace Ryujinx.Graphics.Gpu.Image
mipLodBias,
Math.Min(maxRequestedAnisotropy, maxSupportedAnisotropy)));
if (GraphicsConfig.MaxAnisotropy >= 0 && GraphicsConfig.MaxAnisotropy <= 16 && (minFilter == MinFilter.LinearMipmapNearest || minFilter == MinFilter.LinearMipmapLinear))
if (GraphicsConfig.MaxAnisotropy >= 0 && GraphicsConfig.MaxAnisotropy <= 16 && minFilter is MinFilter.LinearMipmapNearest or MinFilter.LinearMipmapLinear)
{
maxRequestedAnisotropy = GraphicsConfig.MaxAnisotropy;

10
src/Ryujinx.Graphics.Gpu/Image/Texture.cs
View file

@ -1343,7 +1343,7 @@ namespace Ryujinx.Graphics.Gpu.Image
/// <returns>True if anisotropic filtering can be forced, false otherwise</returns>
private bool CanTextureForceAnisotropy()
{
if (!(Target == Target.Texture2D || Target == Target.Texture2DArray))
if (!(Target is Target.Texture2D or Target.Texture2DArray))
{
return false;
}
@ -1367,16 +1367,16 @@ namespace Ryujinx.Graphics.Gpu.Image
{
case Target.Texture1D:
case Target.Texture1DArray:
return target == Target.Texture1D || target == Target.Texture1DArray;
return target is Target.Texture1D or Target.Texture1DArray;
case Target.Texture2D:
case Target.Texture2DArray:
return target == Target.Texture2D || target == Target.Texture2DArray;
return target is Target.Texture2D or Target.Texture2DArray;
case Target.Cubemap:
case Target.CubemapArray:
return target == Target.Cubemap || target == Target.CubemapArray;
return target is Target.Cubemap or Target.CubemapArray;
case Target.Texture2DMultisample:
case Target.Texture2DMultisampleArray:
return target == Target.Texture2DMultisample || target == Target.Texture2DMultisampleArray;
return target is Target.Texture2DMultisample or Target.Texture2DMultisampleArray;
case Target.Texture3D:
return target == Target.Texture3D;
default:

3
src/Ryujinx.Graphics.Gpu/Image/TextureBindingsManager.cs
View file

@ -784,8 +784,7 @@ namespace Ryujinx.Graphics.Gpu.Image
samplerHandle = samplerWordOffset;
}
if (handleType == TextureHandleType.SeparateSamplerId ||
handleType == TextureHandleType.SeparateConstantSamplerHandle)
if (handleType is TextureHandleType.SeparateSamplerId or TextureHandleType.SeparateConstantSamplerHandle)
{
samplerHandle <<= 20;
}

11
src/Ryujinx.Graphics.Gpu/Image/TextureCache.cs
View file

@ -146,7 +146,7 @@ namespace Ryujinx.Graphics.Gpu.Image
/// <returns>True if eligible</returns>
private static TextureScaleMode IsUpscaleCompatible(TextureInfo info, bool withUpscale)
{
if ((info.Target == Target.Texture2D || info.Target == Target.Texture2DArray || info.Target == Target.Texture2DMultisample) && !info.FormatInfo.IsCompressed)
if (info.Target is Target.Texture2D or Target.Texture2DArray or Target.Texture2DMultisample && !info.FormatInfo.IsCompressed)
{
return UpscaleSafeMode(info) ? (withUpscale ? TextureScaleMode.Scaled : TextureScaleMode.Eligible) : TextureScaleMode.Undesired;
}
@ -675,10 +675,11 @@ namespace Ryujinx.Graphics.Gpu.Image
return null;
}
if ((info.Target == Target.Texture3D ||
info.Target == Target.Texture2DArray ||
info.Target == Target.Texture2DMultisampleArray ||
info.Target == Target.CubemapArray) && info.DepthOrLayers < 1)
if (info.Target is Target.Texture3D
or Target.Texture2DArray
or Target.Texture2DMultisampleArray
or Target.CubemapArray &&
info.DepthOrLayers < 1)
{
return null;
}

31
src/Ryujinx.Graphics.Gpu/Image/TextureCompatibility.cs
View file

@ -207,8 +207,7 @@ namespace Ryujinx.Graphics.Gpu.Image
return false; // Flushing this format is not supported, as it may have been converted to another host format.
}
if (info.Target == Target.Texture2DMultisample ||
info.Target == Target.Texture2DMultisampleArray)
if (info.Target is Target.Texture2DMultisample or Target.Texture2DMultisampleArray)
{
return false; // Flushing multisample textures is not supported, the host does not allow getting their data.
}
@ -241,9 +240,10 @@ namespace Ryujinx.Graphics.Gpu.Image
{
return TextureMatchQuality.FormatAlias;
}
else if ((lhs.FormatInfo.Format == Format.D24UnormS8Uint ||
lhs.FormatInfo.Format == Format.S8UintD24Unorm ||
lhs.FormatInfo.Format == Format.X8UintD24Unorm) && rhs.FormatInfo.Format == Format.B8G8R8A8Unorm ||
else if (lhs.FormatInfo.Format is Format.D24UnormS8Uint
or Format.S8UintD24Unorm
or Format.X8UintD24Unorm &&
rhs.FormatInfo.Format == Format.B8G8R8A8Unorm ||
lhs.FormatInfo.Format == Format.D32FloatS8Uint && rhs.FormatInfo.Format == Format.R32G32Float)
{
return TextureMatchQuality.FormatAlias;
@ -755,43 +755,38 @@ namespace Ryujinx.Graphics.Gpu.Image
{
case Target.Texture1D:
case Target.Texture1DArray:
result = rhs.Target == Target.Texture1D ||
rhs.Target == Target.Texture1DArray;
result = rhs.Target is Target.Texture1D or Target.Texture1DArray;
break;
case Target.Texture2D:
result = rhs.Target == Target.Texture2D ||
rhs.Target == Target.Texture2DArray;
result = rhs.Target is Target.Texture2D or Target.Texture2DArray;
break;
case Target.Texture2DArray:
result = rhs.Target == Target.Texture2D ||
rhs.Target == Target.Texture2DArray;
result = rhs.Target is Target.Texture2D or Target.Texture2DArray;
if (rhs.Target == Target.Cubemap || rhs.Target == Target.CubemapArray)
if (rhs.Target is Target.Cubemap or Target.CubemapArray)
{
return caps.SupportsCubemapView ? TextureViewCompatibility.Full : TextureViewCompatibility.CopyOnly;
}
break;
case Target.Cubemap:
case Target.CubemapArray:
result = rhs.Target == Target.Cubemap ||
rhs.Target == Target.CubemapArray;
result = rhs.Target is Target.Cubemap or Target.CubemapArray;
if (rhs.Target == Target.Texture2D || rhs.Target == Target.Texture2DArray)
if (rhs.Target is Target.Texture2D or Target.Texture2DArray)
{
return caps.SupportsCubemapView ? TextureViewCompatibility.Full : TextureViewCompatibility.CopyOnly;
}
break;
case Target.Texture2DMultisample:
case Target.Texture2DMultisampleArray:
if (rhs.Target == Target.Texture2D || rhs.Target == Target.Texture2DArray)
if (rhs.Target is Target.Texture2D or Target.Texture2DArray)
{
return TextureViewCompatibility.CopyOnly;
}
result = rhs.Target == Target.Texture2DMultisample ||
rhs.Target == Target.Texture2DMultisampleArray;
result = rhs.Target is Target.Texture2DMultisample or Target.Texture2DMultisampleArray;
break;
case Target.Texture3D:

4
src/Ryujinx.Graphics.Gpu/Image/TextureInfo.cs
View file

@ -216,7 +216,7 @@ namespace Ryujinx.Graphics.Gpu.Image
/// <returns>The number of texture layers</returns>
public static int GetLayers(Target target, int depthOrLayers)
{
if (target == Target.Texture2DArray || target == Target.Texture2DMultisampleArray)
if (target is Target.Texture2DArray or Target.Texture2DMultisampleArray)
{
return depthOrLayers;
}
@ -241,7 +241,7 @@ namespace Ryujinx.Graphics.Gpu.Image
/// <returns>The number of texture slices</returns>
public int GetSlices()
{
if (Target == Target.Texture3D || Target == Target.Texture2DArray || Target == Target.Texture2DMultisampleArray)
if (Target is Target.Texture3D or Target.Texture2DArray or Target.Texture2DMultisampleArray)
{
return DepthOrLayers;
}

2
src/Ryujinx.Graphics.Gpu/Image/TextureManager.cs
View file

@ -143,7 +143,7 @@ namespace Ryujinx.Graphics.Gpu.Image
/// <returns>True if the scale needs updating, false if the scale is up to date</returns>
private static bool ScaleNeedsUpdated(Texture texture)
{
return texture != null && !(texture.ScaleMode == TextureScaleMode.Blacklisted || texture.ScaleMode == TextureScaleMode.Undesired) && texture.ScaleFactor != GraphicsConfig.ResScale;
return texture != null && !(texture.ScaleMode is TextureScaleMode.Blacklisted or TextureScaleMode.Undesired) && texture.ScaleFactor != GraphicsConfig.ResScale;
}
/// <summary>

5
src/Ryujinx.Graphics.Gpu/Image/TexturePool.cs
View file

@ -554,7 +554,7 @@ namespace Ryujinx.Graphics.Gpu.Image
int width = target == Target.TextureBuffer ? descriptor.UnpackBufferTextureWidth() : descriptor.UnpackWidth();
int height = descriptor.UnpackHeight();
if (target == Target.Texture2DMultisample || target == Target.Texture2DMultisampleArray)
if (target is Target.Texture2DMultisample or Target.Texture2DMultisampleArray)
{
// This is divided back before the backend texture is created.
width *= samplesInX;
@ -771,8 +771,7 @@ namespace Ryujinx.Graphics.Gpu.Image
/// <returns>True if the swizzle component is equal to the red or green, false otherwise</returns>
private static bool IsRG(SwizzleComponent component)
{
return component == SwizzleComponent.Red ||
component == SwizzleComponent.Green;
return component is SwizzleComponent.Red or SwizzleComponent.Green;
}
/// <summary>

2
src/Ryujinx.Graphics.Gpu/Memory/PteKind.cs
View file

@ -262,7 +262,7 @@ namespace Ryujinx.Graphics.Gpu.Memory
/// <returns>True if pitch, false otherwise</returns>
public static bool IsPitch(this PteKind kind)
{
return kind == PteKind.Pitch || kind == PteKind.PitchNoSwizzle;
return kind is PteKind.Pitch or PteKind.PitchNoSwizzle;
}
}
}

2
src/Ryujinx.Graphics.Gpu/Shader/GpuChannelGraphicsState.cs
View file

@ -133,7 +133,7 @@ namespace Ryujinx.Graphics.Gpu.Shader
};
}
bool isQuad = Topology == PrimitiveTopology.Quads || Topology == PrimitiveTopology.QuadStrip;
bool isQuad = Topology is PrimitiveTopology.Quads or PrimitiveTopology.QuadStrip;
bool halvePrimitiveId = !hostSupportsQuads && !hasGeometryShader && isQuad;
return new GpuGraphicsState(

2
src/Ryujinx.Graphics.Gpu/Shader/ShaderSpecializationState.cs
View file

@ -639,7 +639,7 @@ namespace Ryujinx.Graphics.Gpu.Shader
type &= ~(AttributeType.Packed | AttributeType.PackedRgb10A2Signed);
if (channel.Capabilities.SupportsScaledVertexFormats &&
(type == AttributeType.Sscaled || type == AttributeType.Uscaled))
type is AttributeType.Sscaled or AttributeType.Uscaled)
{
type = AttributeType.Float;
}

10
src/Ryujinx.Graphics.Nvdec.Vp9/DecodeMv.cs
View file

@ -961,7 +961,7 @@ namespace Ryujinx.Graphics.Nvdec.Vp9
int j = (idy * 2) + idx;
bMode = ReadInterMode(ref cm, ref xd, ref r, interModeCtx);
if (bMode == PredictionMode.NearestMv || bMode == PredictionMode.NearMv)
if (bMode is PredictionMode.NearestMv or PredictionMode.NearMv)
{
for (refr = 0; refr < 1 + isCompound; ++refr)
{
@ -1028,7 +1028,7 @@ namespace Ryujinx.Graphics.Nvdec.Vp9
private static PredictionMode LeftBlockMode(Ptr<ModeInfo> curMi, Ptr<ModeInfo> leftMi, int b)
{
if (b == 0 || b == 2)
if (b is 0 or 2)
{
if (leftMi.IsNull || leftMi.Value.IsInterBlock())
{
@ -1038,13 +1038,13 @@ namespace Ryujinx.Graphics.Nvdec.Vp9
return leftMi.Value.GetYMode(b + 1);
}
Debug.Assert(b == 1 || b == 3);
Debug.Assert(b is 1 or 3);
return curMi.Value.Bmi[b - 1].Mode;
}
private static PredictionMode AboveBlockMode(Ptr<ModeInfo> curMi, Ptr<ModeInfo> aboveMi, int b)
{
if (b == 0 || b == 1)
if (b is 0 or 1)
{
if (aboveMi.IsNull || aboveMi.Value.IsInterBlock())
{
@ -1054,7 +1054,7 @@ namespace Ryujinx.Graphics.Nvdec.Vp9
return aboveMi.Value.GetYMode(b + 2);
}
Debug.Assert(b == 2 || b == 3);
Debug.Assert(b is 2 or 3);
return curMi.Value.Bmi[b - 2].Mode;
}

4
src/Ryujinx.Graphics.Nvdec.Vp9/EntropyMv.cs
View file

@ -33,12 +33,12 @@ namespace Ryujinx.Graphics.Nvdec.Vp9
private static bool JointVertical(MvJointType type)
{
return type == MvJointType.Hzvnz || type == MvJointType.Hnzvnz;
return type is MvJointType.Hzvnz or MvJointType.Hnzvnz;
}
private static bool JointHorizontal(MvJointType type)
{
return type == MvJointType.Hnzvz || type == MvJointType.Hnzvnz;
return type is MvJointType.Hnzvz or MvJointType.Hnzvnz;
}
private static readonly byte[] LogInBase2 =

4
src/Ryujinx.Graphics.Nvdec.Vp9/Types/Mv.cs
View file

@ -52,12 +52,12 @@ namespace Ryujinx.Graphics.Nvdec.Vp9.Types
public static bool JointVertical(MvJointType type)
{
return type == MvJointType.Hzvnz || type == MvJointType.Hnzvnz;
return type is MvJointType.Hzvnz or MvJointType.Hnzvnz;
}
public static bool JointHorizontal(MvJointType type)
{
return type == MvJointType.Hnzvz || type == MvJointType.Hnzvnz;
return type is MvJointType.Hnzvz or MvJointType.Hnzvnz;
}
private static int ClassBase(MvClassType c)

4
src/Ryujinx.Graphics.Nvdec.Vp9/Types/Vp9Common.cs
View file

@ -811,7 +811,7 @@ namespace Ryujinx.Graphics.Nvdec.Vp9.Types
if (ColorSpace != VpxColorSpace.Srgb)
{
ColorRange = (VpxColorRange)rb.ReadBit();
if (Profile == BitstreamProfile.Profile1 || Profile == BitstreamProfile.Profile3)
if (Profile is BitstreamProfile.Profile1 or BitstreamProfile.Profile3)
{
SubsamplingX = rb.ReadBit();
SubsamplingY = rb.ReadBit();
@ -834,7 +834,7 @@ namespace Ryujinx.Graphics.Nvdec.Vp9.Types
else
{
ColorRange = VpxColorRange.Full;
if (Profile == BitstreamProfile.Profile1 || Profile == BitstreamProfile.Profile3)
if (Profile is BitstreamProfile.Profile1 or BitstreamProfile.Profile3)
{
// Note if colorspace is SRGB then 4:4:4 chroma sampling is assumed.
// 4:2:2 or 4:4:0 chroma sampling is not allowed.

6
src/Ryujinx.Graphics.OpenGL/FormatTable.cs
View file

@ -228,14 +228,12 @@ namespace Ryujinx.Graphics.OpenGL
public static bool IsPackedDepthStencil(Format format)
{
return format == Format.D24UnormS8Uint ||
format == Format.D32FloatS8Uint ||
format == Format.S8UintD24Unorm;
return format is Format.D24UnormS8Uint or Format.D32FloatS8Uint or Format.S8UintD24Unorm;
}
public static bool IsDepthOnly(Format format)
{
return format == Format.D16Unorm || format == Format.D32Float || format == Format.X8UintD24Unorm;
return format is Format.D16Unorm or Format.D32Float or Format.X8UintD24Unorm;
}
}
}

8
src/Ryujinx.Graphics.OpenGL/HwCapabilities.cs
View file

@ -43,13 +43,13 @@ namespace Ryujinx.Graphics.OpenGL
private static readonly Lazy<GpuVendor> _gpuVendor = new(GetGpuVendor);
private static bool IsIntel => _gpuVendor.Value == GpuVendor.IntelWindows || _gpuVendor.Value == GpuVendor.IntelUnix;
private static bool IsIntel => _gpuVendor.Value is GpuVendor.IntelWindows or GpuVendor.IntelUnix;
public static GpuVendor Vendor => _gpuVendor.Value;
private static readonly Lazy<float> _maxSupportedAnisotropy = new(GL.GetFloat((GetPName)All.MaxTextureMaxAnisotropy));
public static bool UsePersistentBufferForFlush => _gpuVendor.Value == GpuVendor.AmdWindows || _gpuVendor.Value == GpuVendor.Nvidia;
public static bool UsePersistentBufferForFlush => _gpuVendor.Value is GpuVendor.AmdWindows or GpuVendor.Nvidia;
public static bool SupportsAlphaToCoverageDitherControl => _supportsAlphaToCoverageDitherControl.Value;
public static bool SupportsAstcCompression => _supportsAstcCompression.Value;
@ -117,11 +117,11 @@ namespace Ryujinx.Graphics.OpenGL
return renderer.Contains("mesa") ? GpuVendor.IntelUnix : GpuVendor.IntelWindows;
}
else if (vendor == "ati technologies inc." || vendor == "advanced micro devices, inc.")
else if (vendor is "ati technologies inc." or "advanced micro devices, inc.")
{
return GpuVendor.AmdWindows;
}
else if (vendor == "amd" || vendor == "x.org")
else if (vendor is "amd" or "x.org")
{
return GpuVendor.AmdUnix;
}

2
src/Ryujinx.Graphics.OpenGL/Image/TextureCopy.cs
View file

@ -290,7 +290,7 @@ namespace Ryujinx.Graphics.OpenGL.Image
private static FramebufferAttachment AttachmentForFormat(Format format)
{
if (format == Format.D24UnormS8Uint || format == Format.D32FloatS8Uint)
if (format is Format.D24UnormS8Uint or Format.D32FloatS8Uint)
{
return FramebufferAttachment.DepthStencilAttachment;
}

2
src/Ryujinx.Graphics.OpenGL/Image/TextureView.cs
View file

@ -358,7 +358,7 @@ namespace Ryujinx.Graphics.OpenGL.Image
PixelFormat pixelFormat = format.PixelFormat;
PixelType pixelType = format.PixelType;
if (target == TextureTarget.TextureCubeMap || target == TextureTarget.TextureCubeMapArray)
if (target is TextureTarget.TextureCubeMap or TextureTarget.TextureCubeMapArray)
{
target = TextureTarget.TextureCubeMapPositiveX + (layer % 6);
}

3
src/Ryujinx.Graphics.OpenGL/VertexArray.cs
View file

@ -104,8 +104,7 @@ namespace Ryujinx.Graphics.OpenGL
int offset = attrib.Offset;
int size = fmtInfo.Components;
bool isFloat = fmtInfo.PixelType == PixelType.Float ||
fmtInfo.PixelType == PixelType.HalfFloat;
bool isFloat = fmtInfo.PixelType is PixelType.Float or PixelType.HalfFloat;
if (isFloat || fmtInfo.Normalized || fmtInfo.Scaled)
{

6
src/Ryujinx.Graphics.Shader/CodeGen/Glsl/Declarations.cs
View file

@ -629,9 +629,9 @@ namespace Ryujinx.Graphics.Shader.CodeGen.Glsl
}
else
{
return stage == ShaderStage.TessellationControl ||
stage == ShaderStage.TessellationEvaluation ||
stage == ShaderStage.Geometry;
return stage is ShaderStage.TessellationControl
or ShaderStage.TessellationEvaluation
or ShaderStage.Geometry;
}
}

4
src/Ryujinx.Graphics.Shader/CodeGen/Glsl/Instructions/InstGen.cs
View file

@ -70,11 +70,11 @@ namespace Ryujinx.Graphics.Shader.CodeGen.Glsl.Instructions
StringBuilder builder = new();
if (atomic && (operation.StorageKind == StorageKind.StorageBuffer || operation.StorageKind == StorageKind.SharedMemory))
if (atomic && operation.StorageKind is StorageKind.StorageBuffer or StorageKind.SharedMemory)
{
builder.Append(GenerateLoadOrStore(context, operation, isStore: false));
AggregateType dstType = operation.Inst == Instruction.AtomicMaxS32 || operation.Inst == Instruction.AtomicMinS32
AggregateType dstType = operation.Inst is Instruction.AtomicMaxS32 or Instruction.AtomicMinS32
? AggregateType.S32
: AggregateType.U32;

6
src/Ryujinx.Graphics.Shader/CodeGen/Glsl/Instructions/IoMap.cs
View file

@ -79,9 +79,9 @@ namespace Ryujinx.Graphics.Shader.CodeGen.Glsl.Instructions
}
else
{
return stage == ShaderStage.TessellationControl ||
stage == ShaderStage.TessellationEvaluation ||
stage == ShaderStage.Geometry;
return stage is ShaderStage.TessellationControl
or ShaderStage.TessellationEvaluation
or ShaderStage.Geometry;
}
}

4
src/Ryujinx.Graphics.Shader/CodeGen/Glsl/OperandManager.cs
View file

@ -97,8 +97,8 @@ namespace Ryujinx.Graphics.Shader.CodeGen.Glsl
}
IoVariable ioVariable = (IoVariable)varId.Value;
bool isOutput = operation.StorageKind == StorageKind.Output || operation.StorageKind == StorageKind.OutputPerPatch;
bool isPerPatch = operation.StorageKind == StorageKind.InputPerPatch || operation.StorageKind == StorageKind.OutputPerPatch;
bool isOutput = operation.StorageKind is StorageKind.Output or StorageKind.OutputPerPatch;
bool isPerPatch = operation.StorageKind is StorageKind.InputPerPatch or StorageKind.OutputPerPatch;
int location = 0;
int component = 0;

6
src/Ryujinx.Graphics.Shader/CodeGen/Spirv/IoMap.cs
View file

@ -104,9 +104,9 @@ namespace Ryujinx.Graphics.Shader.CodeGen.Spirv
}
else
{
return stage == ShaderStage.TessellationControl ||
stage == ShaderStage.TessellationEvaluation ||
stage == ShaderStage.Geometry;
return stage is ShaderStage.TessellationControl
or ShaderStage.TessellationEvaluation
or ShaderStage.Geometry;
}
}

15
src/Ryujinx.Graphics.Shader/CodeGen/Spirv/SpirvGenerator.cs
View file

@ -89,8 +89,8 @@ namespace Ryujinx.Graphics.Shader.CodeGen.Spirv
context.AddCapability(Capability.GeometryShaderPassthroughNV);
}
}
else if (parameters.Definitions.Stage == ShaderStage.TessellationControl ||
parameters.Definitions.Stage == ShaderStage.TessellationEvaluation)
else if (parameters.Definitions.Stage is ShaderStage.TessellationControl
or ShaderStage.TessellationEvaluation)
{
context.AddCapability(Capability.Tessellation);
}
@ -371,10 +371,10 @@ namespace Ryujinx.Graphics.Shader.CodeGen.Spirv
// We only need a branch if the last instruction didn't
// already cause the program to exit or jump elsewhere.
bool lastIsCf = e.Block.Last is AstOperation lastOp &&
(lastOp.Inst == Instruction.Discard ||
lastOp.Inst == Instruction.LoopBreak ||
lastOp.Inst == Instruction.LoopContinue ||
lastOp.Inst == Instruction.Return);
lastOp.Inst is Instruction.Discard
or Instruction.LoopBreak
or Instruction.LoopContinue
or Instruction.Return;
if (!lastIsCf)
{
@ -383,8 +383,7 @@ namespace Ryujinx.Graphics.Shader.CodeGen.Spirv
}
bool hasElse = AstHelper.Next(e.Block) is AstBlock nextBlock &&
(nextBlock.Type == AstBlockType.Else ||
nextBlock.Type == AstBlockType.ElseIf);
nextBlock.Type is AstBlockType.Else or AstBlockType.ElseIf;
// Re-enter the parent block.
if (e.Block.Parent != null && !hasElse)

4
src/Ryujinx.Graphics.Shader/Decoders/Decoder.cs
View file

@ -501,7 +501,7 @@ namespace Ryujinx.Graphics.Shader.Decoders
{
InstConditional condOp = new(op.RawOpCode);
if ((op.Name == InstName.Bra || op.Name == InstName.Exit) && condOp.Ccc != Ccc.T)
if (op.Name is InstName.Bra or InstName.Exit && condOp.Ccc != Ccc.T)
{
return false;
}
@ -879,7 +879,7 @@ namespace Ryujinx.Graphics.Shader.Decoders
public static bool IsPopBranch(InstName name)
{
return name == InstName.Brk || name == InstName.Cont || name == InstName.Sync;
return name is InstName.Brk or InstName.Cont or InstName.Sync;
}
private static MergeType GetMergeTypeFromPush(InstName name)

6
src/Ryujinx.Graphics.Shader/Instructions/AttributeMap.cs
View file

@ -322,9 +322,9 @@ namespace Ryujinx.Graphics.Shader.Instructions
return false;
}
return stage == ShaderStage.TessellationControl ||
stage == ShaderStage.TessellationEvaluation ||
stage == ShaderStage.Geometry;
return stage is ShaderStage.TessellationControl
or ShaderStage.TessellationEvaluation
or ShaderStage.Geometry;
}
public static bool HasInvocationId(ShaderStage stage, bool isOutput)

2
src/Ryujinx.Graphics.Shader/Instructions/InstEmitAttribute.cs
View file

@ -173,7 +173,7 @@ namespace Ryujinx.Graphics.Shader.Instructions
res = context.FPMultiply(res, context.Load(StorageKind.Input, IoVariable.FragmentCoord, null, Const(3)));
}
}
else if (op.Imm10 == AttributeConsts.PositionX || op.Imm10 == AttributeConsts.PositionY)
else if (op.Imm10 is AttributeConsts.PositionX or AttributeConsts.PositionY)
{
// FragCoord X/Y must be divided by the render target scale, if resolution scaling is active,
// because the shader code is not expecting scaled values.

31
src/Ryujinx.Graphics.Shader/Instructions/InstEmitConversion.cs
View file

@ -179,8 +179,8 @@ namespace Ryujinx.Graphics.Shader.Instructions
Instruction fpType = srcType.ToInstFPType();
bool isSignedInt = dstType == IDstFmt.S16 || dstType == IDstFmt.S32 || dstType == IDstFmt.S64;
bool isSmallInt = dstType == IDstFmt.U16 || dstType == IDstFmt.S16;
bool isSignedInt = dstType is IDstFmt.S16 or IDstFmt.S32 or IDstFmt.S64;
bool isSmallInt = dstType is IDstFmt.U16 or IDstFmt.S16;
Operand srcB = context.FPAbsNeg(src, absolute, negate, fpType);
@ -242,15 +242,9 @@ namespace Ryujinx.Graphics.Shader.Instructions
bool negate)
{
bool isSignedInt =
srcType == ISrcFmt.S8 ||
srcType == ISrcFmt.S16 ||
srcType == ISrcFmt.S32 ||
srcType == ISrcFmt.S64;
srcType is ISrcFmt.S8 or ISrcFmt.S16 or ISrcFmt.S32 or ISrcFmt.S64;
bool isSmallInt =
srcType == ISrcFmt.U16 ||
srcType == ISrcFmt.S16 ||
srcType == ISrcFmt.U8 ||
srcType == ISrcFmt.S8;
srcType is ISrcFmt.U16 or ISrcFmt.S16 or ISrcFmt.U8 or ISrcFmt.S8;
// TODO: Handle S/U64.
@ -258,7 +252,7 @@ namespace Ryujinx.Graphics.Shader.Instructions
if (isSmallInt)
{
int size = srcType == ISrcFmt.U16 || srcType == ISrcFmt.S16 ? 16 : 8;
int size = srcType is ISrcFmt.U16 or ISrcFmt.S16 ? 16 : 8;
srcB = isSignedInt
? context.BitfieldExtractS32(srcB, Const((int)byteSelection * 8), Const(size))
@ -302,22 +296,15 @@ namespace Ryujinx.Graphics.Shader.Instructions
}
bool srcIsSignedInt =
srcType == ISrcDstFmt.S8 ||
srcType == ISrcDstFmt.S16 ||
srcType == ISrcDstFmt.S32;
srcType is ISrcDstFmt.S8 or ISrcDstFmt.S16 or ISrcDstFmt.S32;
bool dstIsSignedInt =
dstType == ISrcDstFmt.S8 ||
dstType == ISrcDstFmt.S16 ||
dstType == ISrcDstFmt.S32;
dstType is ISrcDstFmt.S8 or ISrcDstFmt.S16 or ISrcDstFmt.S32;
bool srcIsSmallInt =
srcType == ISrcDstFmt.U16 ||
srcType == ISrcDstFmt.S16 ||
srcType == ISrcDstFmt.U8 ||
srcType == ISrcDstFmt.S8;
srcType is ISrcDstFmt.U16 or ISrcDstFmt.S16 or ISrcDstFmt.U8 or ISrcDstFmt.S8;
if (srcIsSmallInt)
{
int size = srcType == ISrcDstFmt.U16 || srcType == ISrcDstFmt.S16 ? 16 : 8;
int size = srcType is ISrcDstFmt.U16 or ISrcDstFmt.S16 ? 16 : 8;
src = srcIsSignedInt
? context.BitfieldExtractS32(src, Const((int)byteSelection * 8), Const(size))

2
src/Ryujinx.Graphics.Shader/Instructions/InstEmitFloatComparison.cs
View file

@ -534,7 +534,7 @@ namespace Ryujinx.Graphics.Shader.Instructions
{
res = Const(IrConsts.False);
}
else if (cond == FComp.Nan || cond == FComp.Num)
else if (cond is FComp.Nan or FComp.Num)
{
res = context.BitwiseOr(context.IsNan(srcA, fpType), context.IsNan(srcB, fpType));

12
src/Ryujinx.Graphics.Shader/Instructions/InstEmitMemory.cs
View file

@ -73,7 +73,7 @@ namespace Ryujinx.Graphics.Shader.Instructions
Operand slot = Const(op.CbufSlot);
Operand srcA = GetSrcReg(context, op.SrcA);
if (op.AddressMode == AddressMode.Is || op.AddressMode == AddressMode.Isl)
if (op.AddressMode is AddressMode.Is or AddressMode.Isl)
{
slot = context.IAdd(slot, context.BitfieldExtractU32(srcA, Const(16), Const(16)));
srcA = context.BitwiseAnd(srcA, Const(0xffff));
@ -213,7 +213,7 @@ namespace Ryujinx.Graphics.Shader.Instructions
switch (op)
{
case AtomOp.Add:
if (type == AtomSize.S32 || type == AtomSize.U32)
if (type is AtomSize.S32 or AtomSize.U32)
{
res = context.AtomicAdd(storageKind, e0, e1, value);
}
@ -251,7 +251,7 @@ namespace Ryujinx.Graphics.Shader.Instructions
}
break;
case AtomOp.And:
if (type == AtomSize.S32 || type == AtomSize.U32)
if (type is AtomSize.S32 or AtomSize.U32)
{
res = context.AtomicAnd(storageKind, e0, e1, value);
}
@ -261,7 +261,7 @@ namespace Ryujinx.Graphics.Shader.Instructions
}
break;
case AtomOp.Or:
if (type == AtomSize.S32 || type == AtomSize.U32)
if (type is AtomSize.S32 or AtomSize.U32)
{
res = context.AtomicOr(storageKind, e0, e1, value);
}
@ -271,7 +271,7 @@ namespace Ryujinx.Graphics.Shader.Instructions
}
break;
case AtomOp.Xor:
if (type == AtomSize.S32 || type == AtomSize.U32)
if (type is AtomSize.S32 or AtomSize.U32)
{
res = context.AtomicXor(storageKind, e0, e1, value);
}
@ -281,7 +281,7 @@ namespace Ryujinx.Graphics.Shader.Instructions
}
break;
case AtomOp.Exch:
if (type == AtomSize.S32 || type == AtomSize.U32)
if (type is AtomSize.S32 or AtomSize.U32)
{
res = context.AtomicSwap(storageKind, e0, e1, value);
}

4
src/Ryujinx.Graphics.Shader/Instructions/InstEmitMove.cs
View file

@ -98,8 +98,8 @@ namespace Ryujinx.Graphics.Shader.Instructions
// but it seems to be NVIDIA implementation specific as it's only used
// to calculate ISBE offsets, so we can just keep it as zero.
if (context.TranslatorContext.Definitions.Stage == ShaderStage.TessellationControl ||
context.TranslatorContext.Definitions.Stage == ShaderStage.TessellationEvaluation)
if (context.TranslatorContext.Definitions.Stage is ShaderStage.TessellationControl
or ShaderStage.TessellationEvaluation)
{
src = context.ShiftLeft(context.Load(StorageKind.Input, IoVariable.PatchVertices), Const(16));
}

2
src/Ryujinx.Graphics.Shader/Instructions/InstEmitShift.cs
View file

@ -115,7 +115,7 @@ namespace Ryujinx.Graphics.Shader.Instructions
bool left,
bool writeCC)
{
bool isLongShift = maxShift == MaxShift.U64 || maxShift == MaxShift.S64;
bool isLongShift = maxShift is MaxShift.U64 or MaxShift.S64;
bool signedShift = maxShift == MaxShift.S64;
int maxShiftConst = isLongShift ? 64 : 32;

4
src/Ryujinx.Graphics.Shader/Instructions/InstEmitSurface.cs
View file

@ -258,7 +258,7 @@ namespace Ryujinx.Graphics.Shader.Instructions
}
// TODO: FP and 64-bit formats.
TextureFormat format = size == SuatomSize.Sd32 || size == SuatomSize.Sd64
TextureFormat format = size is SuatomSize.Sd32 or SuatomSize.Sd64
? (isBindless ? TextureFormat.Unknown : ShaderProperties.GetTextureFormatAtomic(context.TranslatorContext.GpuAccessor, imm))
: GetTextureFormat(size);
@ -537,7 +537,7 @@ namespace Ryujinx.Graphics.Shader.Instructions
}
// TODO: FP and 64-bit formats.
TextureFormat format = size == SuatomSize.Sd32 || size == SuatomSize.Sd64
TextureFormat format = size is SuatomSize.Sd32 or SuatomSize.Sd64
? (isBindless ? TextureFormat.Unknown : ShaderProperties.GetTextureFormatAtomic(context.TranslatorContext.GpuAccessor, imm))
: GetTextureFormat(size);

23
src/Ryujinx.Graphics.Shader/Instructions/InstEmitTexture.cs
View file

@ -260,9 +260,7 @@ namespace Ryujinx.Graphics.Shader.Instructions
type |= SamplerType.Shadow;
}
if ((lodMode == Lod.Lz ||
lodMode == Lod.Ll ||
lodMode == Lod.Lla) && !isMultisample && type != SamplerType.TextureBuffer)
if (lodMode is Lod.Lz or Lod.Ll or Lod.Lla && !isMultisample && type != SamplerType.TextureBuffer)
{
sourcesList.Add(lodValue);
@ -284,7 +282,7 @@ namespace Ryujinx.Graphics.Shader.Instructions
flags |= TextureFlags.Offset;
}
if (lodMode == Lod.Lb || lodMode == Lod.Lba)
if (lodMode is Lod.Lb or Lod.Lba)
{
sourcesList.Add(lodValue);
@ -694,10 +692,7 @@ namespace Ryujinx.Graphics.Shader.Instructions
}
bool isArray =
dimensions == TexDim.Array1d ||
dimensions == TexDim.Array2d ||
dimensions == TexDim.Array3d ||
dimensions == TexDim.ArrayCube;
dimensions is TexDim.Array1d or TexDim.Array2d or TexDim.Array3d or TexDim.ArrayCube;
Operand arrayIndex = isArray ? Ra() : null;
@ -736,7 +731,7 @@ namespace Ryujinx.Graphics.Shader.Instructions
Operand[] packedOffs = new Operand[2];
bool hasAnyOffset = offset == TexOffset.Aoffi || offset == TexOffset.Ptp;
bool hasAnyOffset = offset is TexOffset.Aoffi or TexOffset.Ptp;
packedOffs[0] = hasAnyOffset ? Rb() : null;
packedOffs[1] = offset == TexOffset.Ptp ? Rb() : null;
@ -849,10 +844,7 @@ namespace Ryujinx.Graphics.Shader.Instructions
int coordsCount = type.GetDimensions();
bool isArray =
dimensions == TexDim.Array1d ||
dimensions == TexDim.Array2d ||
dimensions == TexDim.Array3d ||
dimensions == TexDim.ArrayCube;
dimensions is TexDim.Array1d or TexDim.Array2d or TexDim.Array3d or TexDim.ArrayCube;
Operand arrayIndex = isArray ? Ra() : null;
@ -993,10 +985,7 @@ namespace Ryujinx.Graphics.Shader.Instructions
Operand packedParams = Ra();
bool isArray =
dimensions == TexDim.Array1d ||
dimensions == TexDim.Array2d ||
dimensions == TexDim.Array3d ||
dimensions == TexDim.ArrayCube;
dimensions is TexDim.Array1d or TexDim.Array2d or TexDim.Array3d or TexDim.ArrayCube;
if (isArray)
{

6
src/Ryujinx.Graphics.Shader/IntermediateRepresentation/Instruction.cs
View file

@ -179,19 +179,19 @@ namespace Ryujinx.Graphics.Shader.IntermediateRepresentation
public static bool IsTextureQuery(this Instruction inst)
{
inst &= Instruction.Mask;
return inst == Instruction.Lod || inst == Instruction.TextureQuerySamples || inst == Instruction.TextureQuerySize;
return inst is Instruction.Lod or Instruction.TextureQuerySamples or Instruction.TextureQuerySize;
}
public static bool IsImage(this Instruction inst)
{
inst &= Instruction.Mask;
return inst == Instruction.ImageAtomic || inst == Instruction.ImageLoad || inst == Instruction.ImageStore;
return inst is Instruction.ImageAtomic or Instruction.ImageLoad or Instruction.ImageStore;
}
public static bool IsImageStore(this Instruction inst)
{
inst &= Instruction.Mask;
return inst == Instruction.ImageAtomic || inst == Instruction.ImageStore;
return inst is Instruction.ImageAtomic or Instruction.ImageStore;
}
}
}

14
src/Ryujinx.Graphics.Shader/IntermediateRepresentation/StorageKind.cs
View file

@ -24,22 +24,20 @@ namespace Ryujinx.Graphics.Shader.IntermediateRepresentation
{
public static bool IsInputOrOutput(this StorageKind storageKind)
{
return storageKind == StorageKind.Input ||
storageKind == StorageKind.InputPerPatch ||
storageKind == StorageKind.Output ||
storageKind == StorageKind.OutputPerPatch;
return storageKind is StorageKind.Input
or StorageKind.InputPerPatch
or StorageKind.Output
or StorageKind.OutputPerPatch;
}
public static bool IsOutput(this StorageKind storageKind)
{
return storageKind == StorageKind.Output ||
storageKind == StorageKind.OutputPerPatch;
return storageKind is StorageKind.Output or StorageKind.OutputPerPatch;
}
public static bool IsPerPatch(this StorageKind storageKind)
{
return storageKind == StorageKind.InputPerPatch ||
storageKind == StorageKind.OutputPerPatch;
return storageKind is StorageKind.InputPerPatch or StorageKind.OutputPerPatch;
}
}
}

10
src/Ryujinx.Graphics.Shader/ShaderStage.cs
View file

@ -21,7 +21,7 @@ namespace Ryujinx.Graphics.Shader
/// <returns>True if the shader stage supports render scale, false otherwise</returns>
public static bool SupportsRenderScale(this ShaderStage stage)
{
return stage == ShaderStage.Vertex || stage == ShaderStage.Fragment || stage == ShaderStage.Compute;
return stage is ShaderStage.Vertex or ShaderStage.Fragment or ShaderStage.Compute;
}
/// <summary>
@ -31,10 +31,10 @@ namespace Ryujinx.Graphics.Shader
/// <returns>True if the shader stage is vertex, tessellation or geometry, false otherwise</returns>
public static bool IsVtg(this ShaderStage stage)
{
return stage == ShaderStage.Vertex ||
stage == ShaderStage.TessellationControl ||
stage == ShaderStage.TessellationEvaluation ||
stage == ShaderStage.Geometry;
return stage is ShaderStage.Vertex
or ShaderStage.TessellationControl
or ShaderStage.TessellationEvaluation
or ShaderStage.Geometry;
}
}
}

10
src/Ryujinx.Graphics.Shader/StructuredIr/InstructionInfo.cs
View file

@ -150,11 +150,11 @@ namespace Ryujinx.Graphics.Shader.StructuredIr
{
// TODO: Return correct type depending on source index,
// that can improve the decompiler output.
if (inst == Instruction.ImageLoad ||
inst == Instruction.ImageStore ||
inst == Instruction.ImageAtomic ||
inst == Instruction.Lod ||
inst == Instruction.TextureSample)
if (inst is Instruction.ImageLoad
or Instruction.ImageStore
or Instruction.ImageAtomic
or Instruction.Lod
or Instruction.TextureSample)
{
return AggregateType.FP32;
}

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