From 43bcf7e9a7eccb9dffcdf8e5efd8a8e3f73962e0 Mon Sep 17 00:00:00 2001
From: Ronald Caesar <github43132@proton.me>
Date: Sun, 17 Aug 2025 09:04:40 -0400
Subject: [PATCH] arm64/mem: Add MMU layer for GVA->GPA translation

A new function, mmu_gva_to_gpa(), will be the sole entry point for
resolving guest virtual addresses. This initial implementation models
the processor's state on reset. The function inspects the M bit from the
emulated SCTLR_EL1 register. If the bit is clear, address mapping (GVA =
GPA) is performed. This is an architecturally-mandated behavior required
for the Arm guest to execute its initiall boot code before enabling
virtual memory.

Signed-off-by: Ronald Caesar <github43132@proton.me>
---
 core/arm64/mmu.cpp | 16 ++++++++++++++++
 core/arm64/mmu.h   | 36 ++++++++++++++++++++++++++++++++++++
 2 files changed, 52 insertions(+)
 create mode 100644 core/arm64/mmu.cpp
 create mode 100644 core/arm64/mmu.h

diff --git a/core/arm64/mmu.cpp b/core/arm64/mmu.cpp
new file mode 100644
index 0000000..0dacabb
--- /dev/null
+++ b/core/arm64/mmu.cpp
@@ -0,0 +1,16 @@
+#include "mmu.h"
+
+namespace pound::arm64::memory
+{
+int mmu_gva_to_gpa(pound::arm64::vcpu_state_t* vcpu, uint64_t gva, uint64_t* out_gpa)
+{
+    const uint8_t SCTLR_EL1_M_BIT = (1 << 0);
+    if (0 == (vcpu->sctlr_el1 & SCTLR_EL1_M_BIT))
+    {
+        *out_gpa = gva;
+        return 0;
+    }
+
+    return -1;
+}
+}  // namespace pound::arm64::memory
diff --git a/core/arm64/mmu.h b/core/arm64/mmu.h
new file mode 100644
index 0000000..0f77508
--- /dev/null
+++ b/core/arm64/mmu.h
@@ -0,0 +1,36 @@
+#pragma once
+
+namespace pound::arn64::memory
+{
+/*
+ * mmu_gva_to_gpa() - Translate a Guest Virtual Address to a Guest Physical Address.
+ * @vcpu:       A pointer to the vCPU state.
+ * @gva:        The Guest Virtual Address to translate.
+ * @out_gpa:    A pointer to a uint64_t where the resulting Guest Physical Address
+ *              will be stored on success.
+ *
+ * This function is the primary entry point for the emulated AArch64 Stage 1
+ * MMU. It is responsible for resolving a virtual address used by the guest
+ * into a physical address within the guest's physical address space.
+ *
+ * The translation behavior is dependent on the state of the emulated MMU,
+ * primarily controlled by the SCTLR_EL1.M bit (MMU enable).
+ *
+ * If the MMU is disabled, this function performs an identity mapping, where
+ * the GPA is identical to the GVA. This correctly models the processor's
+ * behavior on reset and is the initial "stub" implementation.
+ *
+ * If the MMU is enabled, this function will perform a full, multi-level page
+ * table walk, starting from the base address in TTBR0_EL1 or TTBR1_EL1. It
+ * will parse translation table descriptors, check for permissions, and handle
+ * different page sizes as configured in TCR_EL1.
+ *
+ * A failed translation will result in a fault. The caller is responsible for
+ * checking the return value and initiating a synchronous exception if a fault
+ * occurs. The contents of @out_gpa are undefined on failure.
+ *
+ * Return: 0 on successful translation. A negative error code on a translation
+ * fault (e.g., for a page fault, permission error, or alignment fault).
+ */
+int mmu_gva_to_gpa(vcpu_state_t* vcpu, uint64_t gva, uint64_t* out_gpa);
+}  // namespace pound::arn64::memory