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https://github.com/pound-emu/pound.git
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temporary commit
This commit is contained in:
Ronald Caesar
parent
80832fc0fe
commit
5e93bb975a
2 changed files with 78 additions and 49 deletions
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@ -10,14 +10,7 @@ namespace pound::jit::decoder
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/* Increase value as more instructions get implemented */
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#define INSTRUCTION_ARRAY_CAPACITY 4
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typedef struct
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{
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uint16_t* hash_table;
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uint8_t* collision_map;
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uint16_t hash_shift;
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uint16_t hash_mask;
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uint16_t table_size;
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} arm32_perfect_hash_t;
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#define HASH_TABLE_INVALID_INDEX 0xFFFF
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/*
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* ============================================================================
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@ -30,6 +23,7 @@ void arm32_SUB_imm_handler(arm32_decoder_t* decoder, arm32_instruction_t instruc
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void arm32_parse_bitstring(const char* bitstring, uint32_t* mask, uint32_t* expected);
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void arm32_grow_instructions_array(arm32_decoder_t* decoder, size_t new_capacity);
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uint32_t arm32_generate_hash_seed(uint32_t mask, uint32_t expected);
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/*
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* ============================================================================
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@ -47,7 +41,7 @@ void arm32_init(pound::host::memory::arena_t allocator, arm32_decoder_t* decoder
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/* Setup Instructions array.*/
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size_t instructions_array_size = INSTRUCTION_ARRAY_CAPACITY * sizeof(arm32_instruction_info_t);
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PVM_ASSERT(instructions_array_size <= decoder->allocator.capacity);
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LOG_TRACE("Growing instructions array to %d bytes", instructions_array_size);
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LOG_TRACE("Allocated %d bytes to instructions array", instructions_array_size);
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void* new_ptr = pound::host::memory::arena_allocate(&decoder->allocator, instructions_array_size);
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PVM_ASSERT(nullptr != new_ptr);
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@ -73,7 +67,7 @@ void arm32_init(pound::host::memory::arena_t allocator, arm32_decoder_t* decoder
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size_t slots_used_size = table_size * sizeof(bool);
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bool* slots_used = (bool*)pound::host::memory::arena_allocate(&decoder->allocator, slots_used_size);
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PVM_ASSERT(nullptr != slots_used);
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LOG_TRACE("Growing hash slots used array to %d bytes", slots_used_size);
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LOG_TRACE("Allocated %d bytes to hash slots used array", slots_used_size);
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uint16_t shift = 0;
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bool perfect_hash_generated = false;
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@ -85,33 +79,8 @@ void arm32_init(pound::host::memory::arena_t allocator, arm32_decoder_t* decoder
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uint16_t hash;
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for (size_t i = 0; i < decoder->instruction_count; ++i)
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{
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/*
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* XOR combines the mask (which bits matter) and expected value (what those btis should be)
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* into a single 32-bit value that uniquely represents this instruction pattern.
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* Example: ADD instruction might have mask=0x0FF00000, expected=0x00200000
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* value = 0x0FF00000 ^ 0x00200000 = 0x0FD00000;
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*/
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uint32_t value = decoder->instructions[i].mask ^ decoder->instructions[i].expected;
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/*
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* First bit mixing round - break up patterns in the value.
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* We need to eliminate patterns (like trailing zeroes) that cause collisions.
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* We do this by mixing the high bits (16-31) with the low bits (0-15).
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*
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* We then multiply a magic number to further scrambles the bits to ensure good distribution.
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*/
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value = ((value >> 16) ^ value) * 0x45d9f3b;
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/*
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* Second bit mixing round to ensire thorough mixing
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*/
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value = ((value >> 16) ^ value) * 0x45d9f3b;
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/*
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* Final mixing. The result is our hash seed - a 32-bit number that uniquely represents this instruction.
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*/
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value = (value >> 16) ^ value;
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uint32_t hash_seed = value;
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uint32_t hash_seed =
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arm32_generate_hash_seed(decoder->instructions[i].mask, decoder->instructions[i].expected);
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/*
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* Now we need to convert the 32-bit hash seed into an index within our hash table.
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@ -121,12 +90,14 @@ void arm32_init(pound::host::memory::arena_t allocator, arm32_decoder_t* decoder
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hash = ((hash_seed >> shift) & mask);
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if (true == slots_used[hash])
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{
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LOG_TRACE("Instruction %s: Collision detected at slot %u for shift %u", decoder->instructions[i].name, hash, shift);
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LOG_TRACE("Instruction %s: Collision detected at slot %u for shift %u", decoder->instructions[i].name,
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hash, shift);
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collision_free = false;
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break;
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}
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slots_used[hash] = true;
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LOG_TRACE("Instruction %s: Collision-free hash %u found for shift %u", decoder->instructions[i].name, hash, shift);
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LOG_TRACE("Instruction %s: Collision-free hash %u found for shift %u", decoder->instructions[i].name, hash,
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shift);
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}
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if (true == collision_free)
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{
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@ -138,7 +109,33 @@ void arm32_init(pound::host::memory::arena_t allocator, arm32_decoder_t* decoder
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PVM_ASSERT_MSG(true == perfect_hash_generated, "Failed to generate perfect hash - no collision-free hash found");
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LOG_TRACE("Perfect hash parameters: shift=%u, mask=0x%04x, table_size=%u", shift, mask, table_size);
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/* TODO(GloriousTacoo:jit): Generate hash table. */
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size_t hash_table_size = table_size * sizeof(uint16_t);
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uint16_t* hash_table = (uint16_t*)pound::host::memory::arena_allocate(&decoder->allocator, hash_table_size);
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PVM_ASSERT(nullptr != hash_table);
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LOG_TRACE("Allocated %zu bytes to hash table", hash_table_size);
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/* Initialize hash table with invalid indices */
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for (size_t i = 0; i < table_size; ++i)
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{
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hash_table[i] = HASH_TABLE_INVALID_INDEX;
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}
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for (size_t i = 0; i < decoder->instruction_count; ++i)
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{
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uint32_t hash_seed = arm32_generate_hash_seed(decoder->instructions[i].mask, decoder->instructions[i].expected);
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uint32_t hash = (hash_seed >> shift) & mask;
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PVM_ASSERT_MSG(HASH_TABLE_INVALID_INDEX == hash_table[hash], "Hash collision detected");
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PVM_ASSERT(i < 0xFFFF);
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hash_table[hash] = (uint16_t)i;
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LOG_TRACE("Instruction '%s' hashed to slot %u", decoder->instructions[i].name, hash);
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}
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decoder->perfect_hash.hash_shift = shift;
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decoder->perfect_hash.hash_mask = mask;
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decoder->perfect_hash.table_size = table_size;
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decoder->perfect_hash.hash_table = hash_table;
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}
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/*
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@ -166,16 +163,9 @@ void arm32_add_instruction(arm32_decoder_t* decoder, const char* name, const cha
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info->handler = handler;
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/* Calculate priority based on number of fixed bits. */
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info->priority = 0;
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for (int i = 0; i < 32; ++i)
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{
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if ((mask >> i) & 1)
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{
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++info->priority;
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}
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}
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info->priority = (uint8_t)__builtin_popcount(mask);
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++decoder->instruction_count;
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LOG_TRACE("Instruction Registered: %s", info->name);
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LOG_TRACE("Mask: 0x%08X", info->mask);
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LOG_TRACE("Expected: 0x%08X", info->expected);
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@ -220,4 +210,34 @@ void arm32_parse_bitstring(const char* bitstring, uint32_t* mask, uint32_t* expe
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}
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}
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}
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uint32_t arm32_generate_hash_seed(uint32_t mask, uint32_t expected)
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{
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/*
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* XOR combines the mask (which bits matter) and expected value (what those btis should be)
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* into a single 32-bit value that uniquely represents this instruction pattern.
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* Example: ADD instruction might have mask=0x0FF00000, expected=0x00200000
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* value = 0x0FF00000 ^ 0x00200000 = 0x0FD00000;
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*/
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uint32_t value = mask ^ expected;
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/*
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* First bit mixing round - break up patterns in the value.
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* We need to eliminate patterns (like trailing zeroes) that cause collisions.
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* We do this by mixing the high bits (16-31) with the low bits (0-15).
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*
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* We then multiply a magic number to further scrambles the bits to ensure good distribution.
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*/
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value = ((value >> 16) ^ value) * 0x45d9f3b;
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/*
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* Second bit mixing round to ensire thorough mixing
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*/
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value = ((value >> 16) ^ value) * 0x45d9f3b;
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/*
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* Final mixing. The result is our hash seed - a 32-bit number that uniquely represents this instruction.
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*/
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value = (value >> 16) ^ value;
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return value;
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}
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} // namespace pound::jit::decoder
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@ -13,6 +13,14 @@ typedef uint32_t arm32_instruction_t;
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typedef struct arm32_decoder arm32_decoder_t;
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typedef void (*arm32_handler_fn)(arm32_decoder_t* decoder, arm32_instruction_t instruction);
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typedef struct
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{
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uint16_t* hash_table;
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uint16_t hash_shift;
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uint16_t hash_mask;
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uint16_t table_size;
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} arm32_perfect_hash_t;
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typedef struct
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{
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const char* name;
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@ -27,6 +35,7 @@ typedef struct
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struct arm32_decoder
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{
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arm32_perfect_hash_t perfect_hash;
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pound::host::memory::arena_t allocator;
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arm32_instruction_info_t* instructions;
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size_t instruction_count;
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