From d1e3919a8cd95f7d65a575e3a3319d4d4f14799b Mon Sep 17 00:00:00 2001 From: Ronald Caesar Date: Sun, 30 Nov 2025 04:47:52 -0400 Subject: [PATCH] jit/decoder: Add generated arm32 tests Introduces the first unit tests for the ARM32 JIT decoder. A new script automatically generates a test case for every instruction in arm32.inc, providing 100% of the isa. This also includes a critical rework of the decoder's lookup table generation logic. The previous hashing method was flawed, causing build-time overflows and incorrect instruction matching (shadowing) for patterns with wildcards. The new algorithm correctly populates the lookup table. Signed-off-by: Ronald Caesar --- .github/workflows/build.yml | 14 +- CMakeLists.txt | 34 +- scripts/generate_decoder_tests.py | 454 + scripts/generate_jit_decoder_a32_table.py | 57 +- src/jit/CMakeLists.txt | 5 +- src/jit/frontend/decoder/arm32.c | 1 - src/jit/frontend/decoder/arm32.h | 8 + src/jit/frontend/decoder/arm32.inc | 30 +- .../frontend/decoder/arm32_table_generated.c | 4073 +- .../frontend/decoder/arm32_table_generated.h | 2 +- src/main.c | 2 +- tests/jit/decoder/test_arm32.cpp | 224 - tests/jit/decoder/test_arm32_generated.cpp | 33111 ++++++++++++++++ 13 files changed, 37513 insertions(+), 502 deletions(-) create mode 100644 scripts/generate_decoder_tests.py delete mode 100644 tests/jit/decoder/test_arm32.cpp create mode 100644 tests/jit/decoder/test_arm32_generated.cpp diff --git a/.github/workflows/build.yml b/.github/workflows/build.yml index cd37fc0..25b7d2e 100644 --- a/.github/workflows/build.yml +++ b/.github/workflows/build.yml @@ -114,15 +114,16 @@ jobs: - name: Install Dependencies run: | - brew install llvm + brew install llvm@20 + echo "CMAKE_PREFIX_PATH=/usr/local/opt/llvm@20" >> $GITHUB_ENV - name: Configure CMake (x86_64) run: > cmake -G Ninja -B "${{env.BUILD_DIR}}" -DCMAKE_BUILD_TYPE=${{env.BUILD_TYPE}} -DCMAKE_OSX_ARCHITECTURES=x86_64 - -DCMAKE_C_COMPILER=$(brew --prefix llvm)/bin/clang - -DCMAKE_CXX_COMPILER=$(brew --prefix llvm)/bin/clang++ + -DCMAKE_C_COMPILER=/usr/local/opt/llvm@20/bin/clang + -DCMAKE_CXX_COMPILER=/usr/local/opt/llvm@20/bin/clang++ -DCMAKE_OSX_DEPLOYMENT_TARGET=10.15 - name: Build (x86_64) @@ -156,14 +157,15 @@ jobs: - name: Install Dependencies run: | - brew install llvm + brew install llvm@20 + echo "CMAKE_PREFIX_PATH=/opt/homebrew/opt/llvm@20" >> $GITHUB_ENV - name: Configure CMake (ARM64) run: > cmake -G Ninja -B "${{env.BUILD_DIR}}" -DCMAKE_BUILD_TYPE=${{env.BUILD_TYPE}} - -DCMAKE_C_COMPILER=$(brew --prefix llvm)/bin/clang - -DCMAKE_CXX_COMPILER=$(brew --prefix llvm)/bin/clang++ + -DCMAKE_C_COMPILER=/opt/homebrew/opt/llvm@20/bin/clang + -DCMAKE_CXX_COMPILER=/opt/homebrew/opt/llvm@20/bin/clang++ -DCMAKE_OSX_ARCHITECTURES=arm64 -DCMAKE_OSX_DEPLOYMENT_TARGET=10.15 diff --git a/CMakeLists.txt b/CMakeLists.txt index 8e46f35..36d8ff4 100644 --- a/CMakeLists.txt +++ b/CMakeLists.txt @@ -13,6 +13,8 @@ endif() set(CMAKE_C_STANDARD 11) set(CMAKE_C_STANDARD_REQUIRED TRUE) set(CMAKE_CXX_STANDARD_REQUIRED TRUE) +set(CMAKE_CXX_STANDARD 17) +set(CMAKE_CXX_STANDARD_REQUIRED ON) set(CMAKE_EXPORT_COMPILE_COMMANDS ON) #------------------------------- @@ -91,17 +93,29 @@ message(STATUS "All submodules verified successfully") #----------------------------- # ---- Target Definitions ---- #----------------------------- - add_executable(Pound src/main.c ) -set(TEST_SRC - ${CMAKE_CURRENT_SOURCE_DIR}/tests/jit/ir/test_value.cpp - ${CMAKE_CURRENT_SOURCE_DIR}/tests/jit/decoder/test_arm32.cpp +find_package(Python3 REQUIRED) + +# Define the test generation command +set(GEN_TEST_SRC ${CMAKE_CURRENT_SOURCE_DIR}/tests/jit/decoder/test_arm32_generated.cpp) + +add_custom_command( + OUTPUT ${GEN_TEST_SRC} + COMMAND Python3::Interpreter ${CMAKE_SOURCE_DIR}/scripts/generate_decoder_tests.py + ${CMAKE_SOURCE_DIR}/src/jit/frontend/decoder/arm32.inc + ${GEN_TEST_SRC} + DEPENDS ${CMAKE_SOURCE_DIR}/scripts/generate_decoder_tests.py + ${CMAKE_SOURCE_DIR}/src/jit/frontend/decoder/arm32.inc + COMMENT "Generating ARM32 Decoder Tests" ) -#add_executable(tests ${TEST_SRC}) +# Add to test executable +add_executable(tests + ${GEN_TEST_SRC} +) add_subdirectory(3rd_Party) add_subdirectory(src/common) @@ -161,8 +175,8 @@ target_link_libraries(Pound PRIVATE ) -#target_link_libraries(tests PRIVATE -# jit -# gtest -# gtest_main -#) +target_link_libraries(tests PRIVATE + jit + gtest + gtest_main +) diff --git a/scripts/generate_decoder_tests.py b/scripts/generate_decoder_tests.py new file mode 100644 index 0000000..76ed9dc --- /dev/null +++ b/scripts/generate_decoder_tests.py @@ -0,0 +1,454 @@ +""" +This script employs several sophisticated techniques to ensure the quality and +correctness of the generated tests. + + +# Instruction Parsing + +The script begins by parsing the `arm32.inc` file. It uses a regular expression +to find all occurrences of the `INST()` macro and extracts three key pieces of +information for each instruction: + +1. **Mnemonic**: A short, unique identifier (e.g., `ADD_imm`). +2. **Name**: A human-readable description (e.g., `"ADD (imm)"`). +3. **Bitstring**: A 32-character string representing the instruction's binary + encoding. + +The bitstring is the most critical piece. It's a mix of `'0'`, `'1'`, and +wildcard characters (like `v`, `n`, `c`) that represent variable fields. + + +# Randomized Instantiation & Constraint System + +To create a concrete test case from an abstract bitstring, the script must +generate a valid 32-bit integer. It does this by: + +1. Setting the fixed `'0'` and `'1'` bits. +2. Randomly generating `'0'` or `'1'` for all wildcard bits. + +However, simple randomization can be problematic. Certain ARM instructions +are specializations of more general patterns. For example, the `SXTB` +instruction is a special case of the `SXTAB` instruction where the `Rn` +register field is `1111`. + +If we randomly generate an `SXTAB` test case where `Rn` happens to be `1111`, +the decoder might (correctly) identify it as `SXTB`. This would cause the +`SXTAB` test to fail. + +To prevent this, the script uses a **constraint system** +(`get_instruction_constraints`). This function defines rules to avoid +generating ambiguous encodings. When generating a test for a general +instruction (`SXTAB`), it forces the specialized bits (`Rn`) to be a value other +than the one that would cause it to alias to the more specific instruction +(`SXTB`). This ensures each test validates exa ctly one unique instruction +definition. + + +# Oracle-Based Negative Testing + +The most powerful feature of this script is its **negative verification** +strategy. For every fixed `'0'` or `'1'` bit in an instruction's bitstring, +the script generates a test case where that single bit is flipped. +This creates an instruction that is intentionally invalid *for that specific +pattern*. + +The script then uses an "oracle" — a Python-based reference decoder +(`python_decode`) — to predict what this corrupted instruction *should* +decode to. The corrupted value might match a different valid instruction, or +it might be completely invalid (decode to `NULL`). + +The generated C++ test then asserts that the actual C++ decoder's output +exactly matches the oracle's prediction. This guarantees that the decoder +rejects invalid patterns that are only one bit off from a valid one. + + +# Fuzz Testing + +Finally, the script generates a fuzz test that feeds a large number (100,000) +of completely random 32-bit integers to the decoder. This test serves as a +stability and integrity check. If the decoder identifies any of these random +inputs as a valid instruction, it cross-verifies that the input truly matches +the mask and expected value for that instruction. This ensures the decoder +never produces "false positives" and is robust against arbitrary data. +""" + +#!/usr/bin/env python3 +import re +import sys +import argparse +import random +from typing import List, Dict, Optional, Tuple + +CPP_HEADER = """/* + * GENERATED FILE - DO NOT EDIT + * + * This file is generated by scripts/generate_decoder_tests.py + * + * PURPOSE: + * Provides 100% requirements-based test coverage for the ARM32 Instruction Decoder. + */ + +#include "jit/frontend/decoder/arm32.h" +#include +#include + +class Arm32DecoderGeneratedTest : public ::testing::Test { +protected: + void SetUp() override { + } +}; +""" + + +class Instruction: + """A container for a parsed instruction definition.""" + + def __init__( + self, + mnemonic: str, + name: str, + bitstring: str, + val: int, + mask: int, + expected: int, + ): + self.mnemonic: str = mnemonic + self.name: str = name + self.bitstring: str = bitstring + self.val: int = val # A randomly generated valid encoding + self.mask: int = mask + self.expected: int = expected + + +def get_instruction_constraints(name: str) -> Dict[int, int]: + """ + Returns a dictionary of {bit_index: value} to force specific instructions + to avoid generating encodings that belong to other, more specific instructions. + This prevents instruction aliasing during randomized test case generation. + + Args: + name: The human-readable name of the instruction (e.g., "SXTAB"). + + Returns: + A dictionary mapping bit positions (31-0) to a required value (0 or 1). + """ + constraints: Dict[int, int] = {} + + # ------------------------------------------------------------------------- + # Load/Store & Coprocessor Collisions + # ------------------------------------------------------------------------- + # To ensure LDC doesn't look like MRRC, we force P=1 (Bit 24). MRRC requires bit 24=0. + if name in ["LDC", "LDC2", "STC", "STC2"]: + constraints[24] = 1 + + # Unprivileged Loads (LDRT/STRT) become aliases if P=0, W=1. + # Force P=1 for standard loads to avoid these aliases. + if name in [ + "LDR (reg)", + "LDRB (reg)", + "LDRH (reg)", + "LDRSB (reg)", + "LDRSH (reg)", + "STR (reg)", + "STRB (reg)", + "STRH (reg)", + "LDRD (reg)", + "STRD (reg)", + ]: + constraints[24] = 1 + if name in ["LDR (imm)", "LDRB (imm)", "STR (imm)", "STRB (imm)"]: + constraints[24] = 1 + + # ------------------------------------------------------------------------- + # Extend Instructions (e.g., SXTB/SXTAB) + # ------------------------------------------------------------------------- + # SXTB is SXTAB with Rn=1111 (bits 19-16). + # When testing the more generic SXTAB, ensure Rn is not 1111. We force 0. + if name in ["SXTAB", "SXTAB16", "SXTAH", "UXTAB", "UXTAB16", "UXTAH"]: + constraints[19] = 0 + constraints[18] = 0 + constraints[17] = 0 + constraints[16] = 0 + + # ------------------------------------------------------------------------- + # Multiply Instructions + # ------------------------------------------------------------------------- + # SMMUL is SMMLA with Ra=1111. Force Ra!=1111 for SMMLA tests. + if name in ["SMMLA", "SMMLS"]: + constraints[15] = 0 + constraints[14] = 0 + constraints[13] = 0 + constraints[12] = 0 + + # SMUAD is SMLAD with Ra=1111. Force Ra!=1111 for SMLAD-family tests. + if name in ["SMLAD", "SMLSD", "SMLALD", "SMLSLD"]: + constraints[15] = 0 + constraints[14] = 0 + constraints[13] = 0 + constraints[12] = 0 + + return constraints + + +def calculate_mask_and_expected(bitstring: str) -> Tuple[int, int]: + """ + Calculates the mask and expected value from a bitstring pattern. + - '1' sets the bit in both mask and expected. + - '0' sets the bit in the mask only. + - Wildcards leave the bit as 0 in both. + + Args: + bitstring: The 32-character instruction pattern. + + Returns: + A tuple containing the (mask, expected) integer values. + """ + mask: int = 0 + expected: int = 0 + for i, char in enumerate(bitstring): + bit_pos = 31 - i + if char == "0": + mask |= 1 << bit_pos + elif char == "1": + mask |= 1 << bit_pos + expected |= 1 << bit_pos + return mask, expected + + +def parse_bitstring_randomized(name: str, bitstring: str) -> int: + """ + Generates a concrete, valid instruction word from a bitstring pattern. + Applies constraints to avoid generating ambiguous instruction aliases. + + Args: + name: The human-readable name of the instruction. + bitstring: The 32-character instruction pattern. + + Returns: + A 32-bit integer representing a valid encoding of the instruction. + """ + val: int = 0 + if len(bitstring) != 32: + raise ValueError(f"Invalid bitstring length: {len(bitstring)}") + + constraints = get_instruction_constraints(name) + + for i, char in enumerate(bitstring): + bit_pos = 31 - i + # Apply constraints first if they exist for this bit + if bit_pos in constraints: + if constraints[bit_pos] == 1: + val |= 1 << bit_pos + continue + + # Set fixed bits or randomize wildcard bits + if char == "1": + val |= 1 << bit_pos + elif char not in ("0", "1"): + if random.choice([True, False]): + val |= 1 << bit_pos + return val + + +def parse_inc_file(input_path: str) -> List[Instruction]: + """ + Parses an arm32.inc file and returns a list of Instruction objects. + + Args: + input_path: The path to the arm32.inc file. + + Returns: + A list of Instruction objects, one for each INST macro found. + """ + instructions: List[Instruction] = [] + regex = re.compile(r'INST\(\s*([A-Za-z0-9_]+),\s*"(.*?)",\s*"(.*?)"\s*\)') + + try: + with open(input_path, "r") as f: + lines = f.readlines() + except FileNotFoundError: + print(f"Error: Could not find input file: {input_path}") + sys.exit(1) + + for line in lines: + line = line.strip() + if not line or line.startswith("//"): + continue + + match = regex.search(line) + if match: + mnemonic = match.group(1) + name = match.group(2) + bitstring = match.group(3) + + val = parse_bitstring_randomized(name, bitstring) + mask, expected = calculate_mask_and_expected(bitstring) + + # Manual Patch for MSR (imm), which has a complex, non-randomizable constraint. + # The bitstring is cccc00110010mmmm1111rrrrvvvvvvvv, but if `vvvv` fields are all 0, + # it becomes a different instruction. We force a non-zero immediate to ensure a valid MSR. + if name == "MSR (imm)": + val |= 1 << 16 # Set bit 16 of the immediate field + + instructions.append( + Instruction(mnemonic, name, bitstring, val, mask, expected) + ) + return instructions + + +def python_decode(val: int, instructions: List[Instruction]) -> Optional[str]: + """ + Acts as a reference decoder (oracle). Returns the name of the first instruction that matches 'val'. + This simulates the linear scan of the C decoder to predict the correct result. + + Args: + val: The 32-bit instruction word to decode. + instructions: The list of instruction definitions, in order of precedence. + + Returns: + The name of the matching instruction, or None if no match is found. + """ + for inst in instructions: + if (val & inst.mask) == inst.expected: + return inst.name + return None + + +def generate_cpp_tests(instructions: List[Instruction], output_path: str) -> None: + """ + Generates the C++ test file content and writes it to the output path. + + Args: + instructions: A list of all instruction definitions. + output_path: The path to write the generated .cpp file. + """ + with open(output_path, "w") as f: + f.write(CPP_HEADER) + + mnemonic_counts: Dict[str, int] = {} + + for inst in instructions: + base_mnemonic = inst.mnemonic + val = inst.val + name = inst.name + bitstring = inst.bitstring + + # Generate a unique test name, handling multiple definitions for one mnemonic + if base_mnemonic not in mnemonic_counts: + mnemonic_counts[base_mnemonic] = 1 + test_name = f"Verify_{base_mnemonic}" + else: + mnemonic_counts[base_mnemonic] += 1 + count = mnemonic_counts[base_mnemonic] + test_name = f"Verify_{base_mnemonic}_{count}" + + f.write(f"TEST_F(Arm32DecoderGeneratedTest, {test_name}) {{\n") + + # --- 1. Positive Verification --- + f.write( + f' // 1. Positive Verification: Ensures "{name}" is correctly identified.\n' + ) + f.write(f" const uint32_t valid_inst = {val:#010x};\n") + f.write( + f" const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst);\n\n" + ) + f.write( + f' ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for {name}: {val:#x}";\n' + ) + f.write( + f' EXPECT_STREQ(info->name, "{name}") << "Decoded as the wrong instruction variant.";\n' + ) + f.write( + f' EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test.";\n\n' + ) + + # --- 2. Negative Verification (Oracle Based) --- + f.write( + f" // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection.\n" + ) + + for i, char in enumerate(bitstring): + bit_pos = 31 - i + + # We only test the fixed bits, as they define the instruction pattern. + if char in ("0", "1"): + mask = 1 << bit_pos + corrupt_inst = val ^ mask + + # ORACLE: Determine what this corrupted instruction SHOULD decode to. + expected_decoded_name = python_decode(corrupt_inst, instructions) + + f.write(f" {{\n") + f.write(f" // Test case: Flipping fixed bit {bit_pos}\n") + f.write( + f" const uint32_t corrupt_inst = {corrupt_inst:#010x};\n" + ) + f.write( + f" const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst);\n\n" + ) + + if expected_decoded_name is None: + # Should decode to NOTHING + f.write(f" // Oracle predicts no match.\n") + f.write( + f' EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr");\n' + ) + else: + # Should decode to the OTHER valid instruction + f.write( + f" // Oracle predicts this should decode as: {expected_decoded_name}\n" + ) + f.write( + f" ASSERT_NE(neg_info, nullptr) << \"Safety Violation: Python Oracle predicted '{expected_decoded_name}' but C++ decoder returned null\";\n" + ) + f.write( + f' EXPECT_STREQ(neg_info->name, "{expected_decoded_name}") << "Safety Violation: Incorrect decode on single-bit corruption.";\n' + ) + + f.write(f" }}\n") + + f.write(f"}}\n\n") + + # --- 3. Generate Fuzz Test for overall stability --- + f.write("TEST_F(Arm32DecoderGeneratedTest, Stability_Fuzz_Test) {\n") + f.write( + " // Feeds a large number of random inputs to the decoder to check for crashes or false positives.\n" + ) + f.write(" std::mt19937 rng(42); // Fixed seed for deterministic runs\n") + f.write(" std::uniform_int_distribution dist;\n\n") + f.write(" for(int i = 0; i < 100000; ++i) {\n") + f.write(" uint32_t random_inst = dist(rng);\n") + f.write( + " const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(random_inst);\n" + ) + f.write(" if (info) {\n") + f.write( + " // If the decoder claims a match, it MUST be a valid match.\n" + ) + f.write(" ASSERT_EQ((random_inst & info->mask), info->expected) \n") + f.write( + ' << "Integrity Violation: Decoded " << std::hex << random_inst << " as \\"" << info->name << "\\" but mask/expected failed.";\n' + ) + f.write(" }\n") + f.write(" }\n") + f.write("}\n") + + +def main() -> None: + """Main entry point for the script.""" + parser = argparse.ArgumentParser(description="Generate ARM32 Decoder Tests") + parser.add_argument("input", help="Path to arm32.inc") + parser.add_argument("output", help="Path to output test_arm32_generated.cpp") + args = parser.parse_args() + + print(f"{args.input} -> {args.output}") + + # Use a fixed seed for deterministic test generation. This is crucial for reproducibility. + random.seed(12345) + + instructions = parse_inc_file(args.input) + generate_cpp_tests(instructions, args.output) + + +if __name__ == "__main__": + main() diff --git a/scripts/generate_jit_decoder_a32_table.py b/scripts/generate_jit_decoder_a32_table.py index b4e111c..b95cfa1 100644 --- a/scripts/generate_jit_decoder_a32_table.py +++ b/scripts/generate_jit_decoder_a32_table.py @@ -1,16 +1,15 @@ #!/usr/bin/env python3 import re import sys -import datetime import argparse -# --------------------------------------------------------- -# Configuration & Logic -# --------------------------------------------------------- - -MAX_BUCKET_SIZE = 18 +# Increased bucket size to handle overlapping wildcards +MAX_BUCKET_SIZE = 64 TABLE_SIZE = 4096 +# Bits [27:20] and [7:4] +HASH_BITS_MASK = 0x0FF000F0 + class Instruction: def __init__(self, name, mnemonic, bitstring, array_index): self.name = name @@ -33,11 +32,7 @@ class Instruction: elif char == '1': self.mask |= (1 << bit_pos) self.expected |= (1 << bit_pos) - - def get_hash(self): - major = (self.expected >> 20) & 0xFF - minor = (self.expected >> 4) & 0x0F - return (major << 4) | minor + # Variable bits (c, n, d, m, etc) leave mask as 0 def parse_inc_file(input_path): instructions = [] @@ -65,19 +60,43 @@ def parse_inc_file(input_path): def generate_lookup_table(instructions): buckets = {i: [] for i in range(TABLE_SIZE)} - for inst in instructions: - idx = inst.get_hash() - buckets[idx].append(inst) - if len(buckets[idx]) > MAX_BUCKET_SIZE: - print(f"FATAL ERROR: Bucket {idx:#05x} overflowed! Size: {len(buckets[idx])}") - sys.exit(1) + + # Iterate over every possible hash index to determine which instructions belong in it + for i in range(TABLE_SIZE): + # Reconstruct the 32-bit value that would generate this hash index + # Hash algorithm: (Major << 4) | Minor + # Major is bits [27:20], Minor is bits [7:4] + + major_val = (i >> 4) & 0xFF + minor_val = i & 0x0F + + # Create a "Probe" value with the hash bits set + probe_val = (major_val << 20) | (minor_val << 4) + + for inst in instructions: + # Check if this instruction matches this hash index. + # An instruction matches if its FIXED bits (mask) match the Probe bits + # for the specific positions used by the hash. + + relevant_mask = inst.mask & HASH_BITS_MASK + relevant_expected = inst.expected & HASH_BITS_MASK + + if (probe_val & relevant_mask) == relevant_expected: + buckets[i].append(inst) + + if len(buckets[i]) > MAX_BUCKET_SIZE: + print(f"FATAL ERROR: Bucket {i:#05x} overflowed! Size: {len(buckets[i])}") + print("This means too many instructions map to the same hash index.") + sys.exit(1) + return buckets def write_c_file(path, instructions, buckets): with open(path, 'w') as f: f.write("/* GENERATED FILE - DO NOT EDIT */\n") + f.write("/* This file is generated by scripts/generate_jit_decoder_a32_table.py */\n") f.write('#include "arm32.h"\n') - f.write('#include "arm32_table_generated.h"\n') + f.write('#include "arm32_table_generated.h"\n\n') f.write(f"static const pvm_jit_decoder_arm32_instruction_info_t g_instructions[{len(instructions)}] = {{\n") for inst in instructions: @@ -118,7 +137,7 @@ def main(): parser.add_argument("out_h", help="Path to output .h file") args = parser.parse_args() - print(f"--- Generating Decoder: {args.input} -> {args.out_c} ---") + print(f"{args.input} -> {args.out_c}") instructions = parse_inc_file(args.input) buckets = generate_lookup_table(instructions) write_c_file(args.out_c, instructions, buckets) diff --git a/src/jit/CMakeLists.txt b/src/jit/CMakeLists.txt index d2832e1..a92f650 100644 --- a/src/jit/CMakeLists.txt +++ b/src/jit/CMakeLists.txt @@ -1,4 +1,3 @@ -find_package(Python3 REQUIRED) # Define the generated files set(GEN_SOURCE ${CMAKE_CURRENT_SOURCE_DIR}/frontend/decoder/arm32_table_generated.c) @@ -10,7 +9,7 @@ add_custom_command( OUTPUT ${GEN_SOURCE} ${GEN_HEADER} COMMAND Python3::Interpreter ${SCRIPT} ${INC_FILE} ${GEN_SOURCE} ${GEN_HEADER} DEPENDS ${SCRIPT} ${INC_FILE} - COMMENT "Generating ARM32 Decoder Tables (Safety Compliance)" + COMMENT "Generating ARM32 Decoder Tables" ) add_library(jit STATIC) @@ -28,6 +27,6 @@ target_link_libraries(jit PRIVATE common) target_include_directories(jit PUBLIC ${CMAKE_CURRENT_SOURCE_DIR} - ${CMAKE_CURRENT_SOURCE_DIR}/frontend/dynarmic + ${CMAKE_CURRENT_SOURCE_DIR}/ ${CMAKE_CURRENT_SOURCE_DIR}/.. ) diff --git a/src/jit/frontend/decoder/arm32.c b/src/jit/frontend/decoder/arm32.c index 6756837..20bf83f 100644 --- a/src/jit/frontend/decoder/arm32.c +++ b/src/jit/frontend/decoder/arm32.c @@ -28,7 +28,6 @@ pvm_jit_decoder_arm32_decode (const uint32_t instruction) } } - LOG_WARNING("Cannot decode instruction 0x%08X", instruction); return NULL; } diff --git a/src/jit/frontend/decoder/arm32.h b/src/jit/frontend/decoder/arm32.h index ca5cecf..239cd3d 100644 --- a/src/jit/frontend/decoder/arm32.h +++ b/src/jit/frontend/decoder/arm32.h @@ -13,6 +13,11 @@ #include +/* Extern C for unit tests. */ +#ifdef __cplusplus +extern "C" { +#endif + /*! @brief Represents static metadata associated with a specific ARM32 * instruction. */ typedef struct @@ -59,4 +64,7 @@ typedef struct const pvm_jit_decoder_arm32_instruction_info_t *pvm_jit_decoder_arm32_decode( const uint32_t instruction); +#ifdef __cplusplus +} +#endif #endif // POUND_JIT_DECODER_ARM32_H diff --git a/src/jit/frontend/decoder/arm32.inc b/src/jit/frontend/decoder/arm32.inc index fbd6493..fe40cbd 100644 --- a/src/jit/frontend/decoder/arm32.inc +++ b/src/jit/frontend/decoder/arm32.inc @@ -11,17 +11,28 @@ INST(BL, "BL", "cccc1011vvvvvvvvvvvvvvvvvvvvvvvv") / INST(BX, "BX", "cccc000100101111111111110001mmmm") // v4T INST(BXJ, "BXJ", "cccc000100101111111111110010mmmm") // v5J +// System / Status Register Access (Specifics) +/* + * FIX: Moved these to the top. + * RFE and SRS start with 1111, which conflicts with LDM/STM (cccc=1111). + * Checking these first prevents LDM/STM from shadowing them. + */ +INST(RFE, "RFE", "1111100--0-1----0000101000000000") // v6 +INST(SRS, "SRS", "1111100--1-0110100000101000-----") // v6 +INST(CPS, "CPS", "111100010000---00000000---0-----") // v6 +INST(SETEND, "SETEND", "1111000100000001000000e000000000") // v6 + // CRC32 instructions INST(CRC32, "CRC32", "cccc00010zz0nnnndddd00000100mmmm") // v8 INST(CRC32C, "CRC32C", "cccc00010zz0nnnndddd00100100mmmm") // v8 // Coprocessor instructions INST(CDP, "CDP", "cccc1110ooooNNNNDDDDppppooo0MMMM") // v2 (CDP2: v5) -INST(LDC, "LDC", "cccc110pudw1nnnnDDDDppppvvvvvvvv") // v2 (LDC2: v5) INST(MCR, "MCR", "cccc1110ooo0NNNNttttppppooo1MMMM") // v2 (MCR2: v5) INST(MCRR, "MCRR", "cccc11000100uuuuttttppppooooMMMM") // v5E (MCRR2: v6) INST(MRC, "MRC", "cccc1110ooo1NNNNttttppppooo1MMMM") // v2 (MRC2: v5) INST(MRRC, "MRRC", "cccc11000101uuuuttttppppooooMMMM") // v5E (MRRC2: v6) +INST(LDC, "LDC", "cccc110pudw1nnnnDDDDppppvvvvvvvv") // v2 (LDC2: v5) INST(STC, "STC", "cccc110pudw0nnnnDDDDppppvvvvvvvv") // v2 (STC2: v5) // Data Processing instructions @@ -101,8 +112,7 @@ INST(SEVL, "SEVL", "----0011001000001111000000000101") / INST(WFE, "WFE", "----0011001000001111000000000010") // v6K INST(WFI, "WFI", "----0011001000001111000000000011") // v6K INST(YIELD, "YIELD", "----0011001000001111000000000001") // v6K -INST(NOP, "Reserved Hint", "----0011001000001111------------") -INST(NOP, "Reserved Hint", "----001100100000111100000000----") +INST(NOP, "NOP", "----0011001000001111000000000000") // v6K // Synchronization Primitive instructions INST(CLREX, "CLREX", "11110101011111111111000000011111") // v6K @@ -181,7 +191,7 @@ INST(LDM, "LDM", "cccc100010w1nnnnxxxxxxxxxxxxxxxx") / INST(LDMDA, "LDMDA", "cccc100000w1nnnnxxxxxxxxxxxxxxxx") // v1 INST(LDMDB, "LDMDB", "cccc100100w1nnnnxxxxxxxxxxxxxxxx") // v1 INST(LDMIB, "LDMIB", "cccc100110w1nnnnxxxxxxxxxxxxxxxx") // v1 -INST(LDM_usr, "LDM (usr reg)", "----100--101--------------------") // v1 +INST(LDM_usr, "LDM (usr reg)", "----100--101----0---------------") // v1 INST(LDM_eret, "LDM (exce ret)", "----100--1-1----1---------------") // v1 INST(STM, "STM", "cccc100010w0nnnnxxxxxxxxxxxxxxxx") // v1 INST(STMDA, "STMDA", "cccc100000w0nnnnxxxxxxxxxxxxxxxx") // v1 @@ -195,7 +205,6 @@ INST(BFI, "BFI", "cccc0111110vvvvvddddvvvvv001nnnn") / INST(CLZ, "CLZ", "cccc000101101111dddd11110001mmmm") // v5 INST(MOVT, "MOVT", "cccc00110100vvvvddddvvvvvvvvvvvv") // v6T2 INST(MOVW, "MOVW", "cccc00110000vvvvddddvvvvvvvvvvvv") // v6T2 -INST(NOP, "NOP", "----0011001000001111000000000000") // v6K INST(SBFX, "SBFX", "cccc0111101wwwwwddddvvvvv101nnnn") // v6T2 INST(SEL, "SEL", "cccc01101000nnnndddd11111011mmmm") // v6 INST(UBFX, "UBFX", "cccc0111111wwwwwddddvvvvv101nnnn") // v6T2 @@ -251,12 +260,12 @@ INST(SMMLA, "SMMLA", "cccc01110101ddddaaaammmm00R1nnnn") / INST(SMMLS, "SMMLS", "cccc01110101ddddaaaammmm11R1nnnn") // v6 // Multiply (Dual) instructions +INST(SMUAD, "SMUAD", "cccc01110000dddd1111mmmm00M1nnnn") // v6 INST(SMLAD, "SMLAD", "cccc01110000ddddaaaammmm00M1nnnn") // v6 INST(SMLALD, "SMLALD", "cccc01110100ddddaaaammmm00M1nnnn") // v6 +INST(SMUSD, "SMUSD", "cccc01110000dddd1111mmmm01M1nnnn") // v6 INST(SMLSD, "SMLSD", "cccc01110000ddddaaaammmm01M1nnnn") // v6 INST(SMLSLD, "SMLSLD", "cccc01110100ddddaaaammmm01M1nnnn") // v6 -INST(SMUAD, "SMUAD", "cccc01110000dddd1111mmmm00M1nnnn") // v6 -INST(SMUSD, "SMUSD", "cccc01110000dddd1111mmmm01M1nnnn") // v6 // Parallel Add/Subtract (Modulo) instructions INST(SADD8, "SADD8", "cccc01100001nnnndddd11111001mmmm") // v6 @@ -306,11 +315,8 @@ INST(QSUB, "QSUB", "cccc00010010nnnndddd00000101mmmm") / INST(QDADD, "QDADD", "cccc00010100nnnndddd00000101mmmm") // v5xP INST(QDSUB, "QDSUB", "cccc00010110nnnndddd00000101mmmm") // v5xP -// Status Register Access instructions -INST(CPS, "CPS", "111100010000---00000000---0-----") // v6 -INST(SETEND, "SETEND", "1111000100000001000000e000000000") // v6 +// Status Register Access instructions (Generals) +// Specifics like CPS/RFE moved to top to prevent shadowing INST(MRS, "MRS", "cccc000100001111dddd000000000000") // v3 INST(MSR_imm, "MSR (imm)", "cccc00110010mmmm1111rrrrvvvvvvvv") // v3 INST(MSR_reg, "MSR (reg)", "cccc00010010mmmm111100000000nnnn") // v3 -INST(RFE, "RFE", "1111100--0-1----0000101000000000") // v6 -INST(SRS, "SRS", "1111100--1-0110100000101000-----") // v6 diff --git a/src/jit/frontend/decoder/arm32_table_generated.c b/src/jit/frontend/decoder/arm32_table_generated.c index 7455ec7..61bdd63 100644 --- a/src/jit/frontend/decoder/arm32_table_generated.c +++ b/src/jit/frontend/decoder/arm32_table_generated.c @@ -1,7 +1,9 @@ /* GENERATED FILE - DO NOT EDIT */ +/* This file is generated by scripts/generate_jit_decoder_a32_table.py */ #include "arm32.h" #include "arm32_table_generated.h" -static const pvm_jit_decoder_arm32_instruction_info_t g_instructions[261] = { + +static const pvm_jit_decoder_arm32_instruction_info_t g_instructions[259] = { { "DMB", "1111010101111111111100000101oooo", 0xfffffff0U, 0xf57ff050U }, { "DSB", "1111010101111111111100000100oooo", 0xfffffff0U, 0xf57ff040U }, { "ISB", "1111010101111111111100000110oooo", 0xfffffff0U, 0xf57ff060U }, @@ -11,14 +13,18 @@ static const pvm_jit_decoder_arm32_instruction_info_t g_instructions[261] = { { "BL", "cccc1011vvvvvvvvvvvvvvvvvvvvvvvv", 0x0f000000U, 0x0b000000U }, { "BX", "cccc000100101111111111110001mmmm", 0x0ffffff0U, 0x012fff10U }, { "BXJ", "cccc000100101111111111110010mmmm", 0x0ffffff0U, 0x012fff20U }, + { "RFE", "1111100--0-1----0000101000000000", 0xfe50ffffU, 0xf8100a00U }, + { "SRS", "1111100--1-0110100000101000-----", 0xfe5fffe0U, 0xf84d0500U }, + { "CPS", "111100010000---00000000---0-----", 0xfff1fe20U, 0xf1000000U }, + { "SETEND", "1111000100000001000000e000000000", 0xfffffdffU, 0xf1010000U }, { "CRC32", "cccc00010zz0nnnndddd00000100mmmm", 0x0f900ff0U, 0x01000040U }, { "CRC32C", "cccc00010zz0nnnndddd00100100mmmm", 0x0f900ff0U, 0x01000240U }, { "CDP", "cccc1110ooooNNNNDDDDppppooo0MMMM", 0x0f000010U, 0x0e000000U }, - { "LDC", "cccc110pudw1nnnnDDDDppppvvvvvvvv", 0x0e100000U, 0x0c100000U }, { "MCR", "cccc1110ooo0NNNNttttppppooo1MMMM", 0x0f100010U, 0x0e000010U }, { "MCRR", "cccc11000100uuuuttttppppooooMMMM", 0x0ff00000U, 0x0c400000U }, { "MRC", "cccc1110ooo1NNNNttttppppooo1MMMM", 0x0f100010U, 0x0e100010U }, { "MRRC", "cccc11000101uuuuttttppppooooMMMM", 0x0ff00000U, 0x0c500000U }, + { "LDC", "cccc110pudw1nnnnDDDDppppvvvvvvvv", 0x0e100000U, 0x0c100000U }, { "STC", "cccc110pudw0nnnnDDDDppppvvvvvvvv", 0x0e100000U, 0x0c000000U }, { "ADC (imm)", "cccc0010101Snnnnddddrrrrvvvvvvvv", 0x0fe00000U, 0x02a00000U }, { "ADC (reg)", "cccc0000101Snnnnddddvvvvvrr0mmmm", 0x0fe00010U, 0x00a00000U }, @@ -90,8 +96,7 @@ static const pvm_jit_decoder_arm32_instruction_info_t g_instructions[261] = { { "WFE", "----0011001000001111000000000010", 0x0fffffffU, 0x0320f002U }, { "WFI", "----0011001000001111000000000011", 0x0fffffffU, 0x0320f003U }, { "YIELD", "----0011001000001111000000000001", 0x0fffffffU, 0x0320f001U }, - { "Reserved Hint", "----0011001000001111------------", 0x0ffff000U, 0x0320f000U }, - { "Reserved Hint", "----001100100000111100000000----", 0x0ffffff0U, 0x0320f000U }, + { "NOP", "----0011001000001111000000000000", 0x0fffffffU, 0x0320f000U }, { "CLREX", "11110101011111111111000000011111", 0xffffffffU, 0xf57ff01fU }, { "SWP", "cccc00010000nnnntttt00001001uuuu", 0x0ff00ff0U, 0x01000090U }, { "SWPB", "cccc00010100nnnntttt00001001uuuu", 0x0ff00ff0U, 0x01400090U }, @@ -164,7 +169,7 @@ static const pvm_jit_decoder_arm32_instruction_info_t g_instructions[261] = { { "LDMDA", "cccc100000w1nnnnxxxxxxxxxxxxxxxx", 0x0fd00000U, 0x08100000U }, { "LDMDB", "cccc100100w1nnnnxxxxxxxxxxxxxxxx", 0x0fd00000U, 0x09100000U }, { "LDMIB", "cccc100110w1nnnnxxxxxxxxxxxxxxxx", 0x0fd00000U, 0x09900000U }, - { "LDM (usr reg)", "----100--101--------------------", 0x0e700000U, 0x08500000U }, + { "LDM (usr reg)", "----100--101----0---------------", 0x0e708000U, 0x08500000U }, { "LDM (exce ret)", "----100--1-1----1---------------", 0x0e508000U, 0x08508000U }, { "STM", "cccc100010w0nnnnxxxxxxxxxxxxxxxx", 0x0fd00000U, 0x08800000U }, { "STMDA", "cccc100000w0nnnnxxxxxxxxxxxxxxxx", 0x0fd00000U, 0x08000000U }, @@ -176,7 +181,6 @@ static const pvm_jit_decoder_arm32_instruction_info_t g_instructions[261] = { { "CLZ", "cccc000101101111dddd11110001mmmm", 0x0fff0ff0U, 0x016f0f10U }, { "MOVT", "cccc00110100vvvvddddvvvvvvvvvvvv", 0x0ff00000U, 0x03400000U }, { "MOVW", "cccc00110000vvvvddddvvvvvvvvvvvv", 0x0ff00000U, 0x03000000U }, - { "NOP", "----0011001000001111000000000000", 0x0fffffffU, 0x0320f000U }, { "SBFX", "cccc0111101wwwwwddddvvvvv101nnnn", 0x0fe00070U, 0x07a00050U }, { "SEL", "cccc01101000nnnndddd11111011mmmm", 0x0ff00ff0U, 0x06800fb0U }, { "UBFX", "cccc0111111wwwwwddddvvvvv101nnnn", 0x0fe00070U, 0x07e00050U }, @@ -210,12 +214,12 @@ static const pvm_jit_decoder_arm32_instruction_info_t g_instructions[261] = { { "SMMUL", "cccc01110101dddd1111mmmm00R1nnnn", 0x0ff0f0d0U, 0x0750f010U }, { "SMMLA", "cccc01110101ddddaaaammmm00R1nnnn", 0x0ff000d0U, 0x07500010U }, { "SMMLS", "cccc01110101ddddaaaammmm11R1nnnn", 0x0ff000d0U, 0x075000d0U }, + { "SMUAD", "cccc01110000dddd1111mmmm00M1nnnn", 0x0ff0f0d0U, 0x0700f010U }, { "SMLAD", "cccc01110000ddddaaaammmm00M1nnnn", 0x0ff000d0U, 0x07000010U }, { "SMLALD", "cccc01110100ddddaaaammmm00M1nnnn", 0x0ff000d0U, 0x07400010U }, + { "SMUSD", "cccc01110000dddd1111mmmm01M1nnnn", 0x0ff0f0d0U, 0x0700f050U }, { "SMLSD", "cccc01110000ddddaaaammmm01M1nnnn", 0x0ff000d0U, 0x07000050U }, { "SMLSLD", "cccc01110100ddddaaaammmm01M1nnnn", 0x0ff000d0U, 0x07400050U }, - { "SMUAD", "cccc01110000dddd1111mmmm00M1nnnn", 0x0ff0f0d0U, 0x0700f010U }, - { "SMUSD", "cccc01110000dddd1111mmmm01M1nnnn", 0x0ff0f0d0U, 0x0700f050U }, { "SADD8", "cccc01100001nnnndddd11111001mmmm", 0x0ff00ff0U, 0x06100f90U }, { "SADD16", "cccc01100001nnnndddd11110001mmmm", 0x0ff00ff0U, 0x06100f10U }, { "SASX", "cccc01100001nnnndddd11110011mmmm", 0x0ff00ff0U, 0x06100f30U }, @@ -256,232 +260,3851 @@ static const pvm_jit_decoder_arm32_instruction_info_t g_instructions[261] = { { "QSUB", "cccc00010010nnnndddd00000101mmmm", 0x0ff00ff0U, 0x01200050U }, { "QDADD", "cccc00010100nnnndddd00000101mmmm", 0x0ff00ff0U, 0x01400050U }, { "QDSUB", "cccc00010110nnnndddd00000101mmmm", 0x0ff00ff0U, 0x01600050U }, - { "CPS", "111100010000---00000000---0-----", 0xfff1fe20U, 0xf1000000U }, - { "SETEND", "1111000100000001000000e000000000", 0xfffffdffU, 0xf1010000U }, { "MRS", "cccc000100001111dddd000000000000", 0x0fff0fffU, 0x010f0000U }, { "MSR (imm)", "cccc00110010mmmm1111rrrrvvvvvvvv", 0x0ff0f000U, 0x0320f000U }, { "MSR (reg)", "cccc00010010mmmm111100000000nnnn", 0x0ff0fff0U, 0x0120f000U }, - { "RFE", "1111100--0-1----0000101000000000", 0xfe50ffffU, 0xf8100a00U }, - { "SRS", "1111100--1-0110100000101000-----", 0xfe5fffe0U, 0xf84d0500U }, }; const decode_bucket_t g_decoder_lookup_table[4096] = { - [0x000] = { .instructions = { &g_instructions[25], }, .count = 1U }, - [0x001] = { .instructions = { &g_instructions[26], }, .count = 1U }, - [0x009] = { .instructions = { &g_instructions[194], }, .count = 1U }, - [0x00b] = { .instructions = { &g_instructions[157], }, .count = 1U }, - [0x00d] = { .instructions = { &g_instructions[140], }, .count = 1U }, - [0x00f] = { .instructions = { &g_instructions[155], }, .count = 1U }, - [0x01b] = { .instructions = { &g_instructions[143], }, .count = 1U }, - [0x01d] = { .instructions = { &g_instructions[146], }, .count = 1U }, - [0x01f] = { .instructions = { &g_instructions[149], }, .count = 1U }, - [0x020] = { .instructions = { &g_instructions[37], }, .count = 1U }, - [0x021] = { .instructions = { &g_instructions[38], }, .count = 1U }, - [0x029] = { .instructions = { &g_instructions[192], }, .count = 1U }, - [0x02b] = { .instructions = { &g_instructions[129], }, .count = 1U }, - [0x03b] = { .instructions = { &g_instructions[119], }, .count = 1U }, - [0x03d] = { .instructions = { &g_instructions[121], }, .count = 1U }, - [0x03f] = { .instructions = { &g_instructions[123], }, .count = 1U }, - [0x040] = { .instructions = { &g_instructions[58], }, .count = 1U }, - [0x041] = { .instructions = { &g_instructions[59], }, .count = 1U }, - [0x049] = { .instructions = { &g_instructions[197], }, .count = 1U }, - [0x04b] = { .instructions = { &g_instructions[156], }, .count = 1U }, - [0x04d] = { .instructions = { &g_instructions[139], }, .count = 1U }, - [0x04f] = { .instructions = { &g_instructions[154], }, .count = 1U }, - [0x05b] = { .instructions = { &g_instructions[141], &g_instructions[142], }, .count = 2U }, - [0x05d] = { .instructions = { &g_instructions[145], }, .count = 1U }, - [0x05f] = { .instructions = { &g_instructions[148], }, .count = 1U }, - [0x060] = { .instructions = { &g_instructions[49], }, .count = 1U }, - [0x061] = { .instructions = { &g_instructions[50], }, .count = 1U }, - [0x069] = { .instructions = { &g_instructions[193], }, .count = 1U }, - [0x06b] = { .instructions = { &g_instructions[128], }, .count = 1U }, - [0x07b] = { .instructions = { &g_instructions[117], &g_instructions[118], }, .count = 2U }, - [0x07d] = { .instructions = { &g_instructions[120], }, .count = 1U }, - [0x07f] = { .instructions = { &g_instructions[122], }, .count = 1U }, - [0x080] = { .instructions = { &g_instructions[22], }, .count = 1U }, - [0x081] = { .instructions = { &g_instructions[23], }, .count = 1U }, - [0x089] = { .instructions = { &g_instructions[199], }, .count = 1U }, - [0x0a0] = { .instructions = { &g_instructions[19], }, .count = 1U }, - [0x0a1] = { .instructions = { &g_instructions[20], }, .count = 1U }, - [0x0a9] = { .instructions = { &g_instructions[198], }, .count = 1U }, - [0x0c0] = { .instructions = { &g_instructions[55], }, .count = 1U }, - [0x0c1] = { .instructions = { &g_instructions[56], }, .count = 1U }, - [0x0c9] = { .instructions = { &g_instructions[196], }, .count = 1U }, - [0x0e0] = { .instructions = { &g_instructions[52], }, .count = 1U }, - [0x0e1] = { .instructions = { &g_instructions[53], }, .count = 1U }, - [0x0e9] = { .instructions = { &g_instructions[195], }, .count = 1U }, - [0x100] = { .instructions = { &g_instructions[254], &g_instructions[255], &g_instructions[256], }, .count = 3U }, - [0x104] = { .instructions = { &g_instructions[9], &g_instructions[10], }, .count = 2U }, - [0x105] = { .instructions = { &g_instructions[250], }, .count = 1U }, - [0x108] = { .instructions = { &g_instructions[201], }, .count = 1U }, - [0x109] = { .instructions = { &g_instructions[91], }, .count = 1U }, - [0x110] = { .instructions = { &g_instructions[64], }, .count = 1U }, - [0x111] = { .instructions = { &g_instructions[65], }, .count = 1U }, + [0x000] = { .instructions = { &g_instructions[29], }, .count = 1U }, + [0x001] = { .instructions = { &g_instructions[30], }, .count = 1U }, + [0x002] = { .instructions = { &g_instructions[29], }, .count = 1U }, + [0x003] = { .instructions = { &g_instructions[30], }, .count = 1U }, + [0x004] = { .instructions = { &g_instructions[29], }, .count = 1U }, + [0x005] = { .instructions = { &g_instructions[30], }, .count = 1U }, + [0x006] = { .instructions = { &g_instructions[29], }, .count = 1U }, + [0x007] = { .instructions = { &g_instructions[30], }, .count = 1U }, + [0x008] = { .instructions = { &g_instructions[29], }, .count = 1U }, + [0x009] = { .instructions = { &g_instructions[196], }, .count = 1U }, + [0x00a] = { .instructions = { &g_instructions[29], }, .count = 1U }, + [0x00b] = { .instructions = { &g_instructions[160], }, .count = 1U }, + [0x00c] = { .instructions = { &g_instructions[29], }, .count = 1U }, + [0x00d] = { .instructions = { &g_instructions[143], }, .count = 1U }, + [0x00e] = { .instructions = { &g_instructions[29], }, .count = 1U }, + [0x00f] = { .instructions = { &g_instructions[158], }, .count = 1U }, + [0x010] = { .instructions = { &g_instructions[29], }, .count = 1U }, + [0x011] = { .instructions = { &g_instructions[30], }, .count = 1U }, + [0x012] = { .instructions = { &g_instructions[29], }, .count = 1U }, + [0x013] = { .instructions = { &g_instructions[30], }, .count = 1U }, + [0x014] = { .instructions = { &g_instructions[29], }, .count = 1U }, + [0x015] = { .instructions = { &g_instructions[30], }, .count = 1U }, + [0x016] = { .instructions = { &g_instructions[29], }, .count = 1U }, + [0x017] = { .instructions = { &g_instructions[30], }, .count = 1U }, + [0x018] = { .instructions = { &g_instructions[29], }, .count = 1U }, + [0x019] = { .instructions = { &g_instructions[196], }, .count = 1U }, + [0x01a] = { .instructions = { &g_instructions[29], }, .count = 1U }, + [0x01b] = { .instructions = { &g_instructions[146], }, .count = 1U }, + [0x01c] = { .instructions = { &g_instructions[29], }, .count = 1U }, + [0x01d] = { .instructions = { &g_instructions[149], }, .count = 1U }, + [0x01e] = { .instructions = { &g_instructions[29], }, .count = 1U }, + [0x01f] = { .instructions = { &g_instructions[152], }, .count = 1U }, + [0x020] = { .instructions = { &g_instructions[41], }, .count = 1U }, + [0x021] = { .instructions = { &g_instructions[42], }, .count = 1U }, + [0x022] = { .instructions = { &g_instructions[41], }, .count = 1U }, + [0x023] = { .instructions = { &g_instructions[42], }, .count = 1U }, + [0x024] = { .instructions = { &g_instructions[41], }, .count = 1U }, + [0x025] = { .instructions = { &g_instructions[42], }, .count = 1U }, + [0x026] = { .instructions = { &g_instructions[41], }, .count = 1U }, + [0x027] = { .instructions = { &g_instructions[42], }, .count = 1U }, + [0x028] = { .instructions = { &g_instructions[41], }, .count = 1U }, + [0x029] = { .instructions = { &g_instructions[194], }, .count = 1U }, + [0x02a] = { .instructions = { &g_instructions[41], }, .count = 1U }, + [0x02b] = { .instructions = { &g_instructions[132], &g_instructions[160], }, .count = 2U }, + [0x02c] = { .instructions = { &g_instructions[41], }, .count = 1U }, + [0x02d] = { .instructions = { &g_instructions[143], }, .count = 1U }, + [0x02e] = { .instructions = { &g_instructions[41], }, .count = 1U }, + [0x02f] = { .instructions = { &g_instructions[158], }, .count = 1U }, + [0x030] = { .instructions = { &g_instructions[41], }, .count = 1U }, + [0x031] = { .instructions = { &g_instructions[42], }, .count = 1U }, + [0x032] = { .instructions = { &g_instructions[41], }, .count = 1U }, + [0x033] = { .instructions = { &g_instructions[42], }, .count = 1U }, + [0x034] = { .instructions = { &g_instructions[41], }, .count = 1U }, + [0x035] = { .instructions = { &g_instructions[42], }, .count = 1U }, + [0x036] = { .instructions = { &g_instructions[41], }, .count = 1U }, + [0x037] = { .instructions = { &g_instructions[42], }, .count = 1U }, + [0x038] = { .instructions = { &g_instructions[41], }, .count = 1U }, + [0x039] = { .instructions = { &g_instructions[194], }, .count = 1U }, + [0x03a] = { .instructions = { &g_instructions[41], }, .count = 1U }, + [0x03b] = { .instructions = { &g_instructions[122], &g_instructions[146], }, .count = 2U }, + [0x03c] = { .instructions = { &g_instructions[41], }, .count = 1U }, + [0x03d] = { .instructions = { &g_instructions[124], &g_instructions[149], }, .count = 2U }, + [0x03e] = { .instructions = { &g_instructions[41], }, .count = 1U }, + [0x03f] = { .instructions = { &g_instructions[126], &g_instructions[152], }, .count = 2U }, + [0x040] = { .instructions = { &g_instructions[62], }, .count = 1U }, + [0x041] = { .instructions = { &g_instructions[63], }, .count = 1U }, + [0x042] = { .instructions = { &g_instructions[62], }, .count = 1U }, + [0x043] = { .instructions = { &g_instructions[63], }, .count = 1U }, + [0x044] = { .instructions = { &g_instructions[62], }, .count = 1U }, + [0x045] = { .instructions = { &g_instructions[63], }, .count = 1U }, + [0x046] = { .instructions = { &g_instructions[62], }, .count = 1U }, + [0x047] = { .instructions = { &g_instructions[63], }, .count = 1U }, + [0x048] = { .instructions = { &g_instructions[62], }, .count = 1U }, + [0x049] = { .instructions = { &g_instructions[199], }, .count = 1U }, + [0x04a] = { .instructions = { &g_instructions[62], }, .count = 1U }, + [0x04b] = { .instructions = { &g_instructions[159], }, .count = 1U }, + [0x04c] = { .instructions = { &g_instructions[62], }, .count = 1U }, + [0x04d] = { .instructions = { &g_instructions[142], }, .count = 1U }, + [0x04e] = { .instructions = { &g_instructions[62], }, .count = 1U }, + [0x04f] = { .instructions = { &g_instructions[157], }, .count = 1U }, + [0x050] = { .instructions = { &g_instructions[62], }, .count = 1U }, + [0x051] = { .instructions = { &g_instructions[63], }, .count = 1U }, + [0x052] = { .instructions = { &g_instructions[62], }, .count = 1U }, + [0x053] = { .instructions = { &g_instructions[63], }, .count = 1U }, + [0x054] = { .instructions = { &g_instructions[62], }, .count = 1U }, + [0x055] = { .instructions = { &g_instructions[63], }, .count = 1U }, + [0x056] = { .instructions = { &g_instructions[62], }, .count = 1U }, + [0x057] = { .instructions = { &g_instructions[63], }, .count = 1U }, + [0x058] = { .instructions = { &g_instructions[62], }, .count = 1U }, + [0x05a] = { .instructions = { &g_instructions[62], }, .count = 1U }, + [0x05b] = { .instructions = { &g_instructions[144], &g_instructions[145], }, .count = 2U }, + [0x05c] = { .instructions = { &g_instructions[62], }, .count = 1U }, + [0x05d] = { .instructions = { &g_instructions[148], }, .count = 1U }, + [0x05e] = { .instructions = { &g_instructions[62], }, .count = 1U }, + [0x05f] = { .instructions = { &g_instructions[151], }, .count = 1U }, + [0x060] = { .instructions = { &g_instructions[53], }, .count = 1U }, + [0x061] = { .instructions = { &g_instructions[54], }, .count = 1U }, + [0x062] = { .instructions = { &g_instructions[53], }, .count = 1U }, + [0x063] = { .instructions = { &g_instructions[54], }, .count = 1U }, + [0x064] = { .instructions = { &g_instructions[53], }, .count = 1U }, + [0x065] = { .instructions = { &g_instructions[54], }, .count = 1U }, + [0x066] = { .instructions = { &g_instructions[53], }, .count = 1U }, + [0x067] = { .instructions = { &g_instructions[54], }, .count = 1U }, + [0x068] = { .instructions = { &g_instructions[53], }, .count = 1U }, + [0x069] = { .instructions = { &g_instructions[195], }, .count = 1U }, + [0x06a] = { .instructions = { &g_instructions[53], }, .count = 1U }, + [0x06b] = { .instructions = { &g_instructions[131], &g_instructions[159], }, .count = 2U }, + [0x06c] = { .instructions = { &g_instructions[53], }, .count = 1U }, + [0x06d] = { .instructions = { &g_instructions[142], }, .count = 1U }, + [0x06e] = { .instructions = { &g_instructions[53], }, .count = 1U }, + [0x06f] = { .instructions = { &g_instructions[157], }, .count = 1U }, + [0x070] = { .instructions = { &g_instructions[53], }, .count = 1U }, + [0x071] = { .instructions = { &g_instructions[54], }, .count = 1U }, + [0x072] = { .instructions = { &g_instructions[53], }, .count = 1U }, + [0x073] = { .instructions = { &g_instructions[54], }, .count = 1U }, + [0x074] = { .instructions = { &g_instructions[53], }, .count = 1U }, + [0x075] = { .instructions = { &g_instructions[54], }, .count = 1U }, + [0x076] = { .instructions = { &g_instructions[53], }, .count = 1U }, + [0x077] = { .instructions = { &g_instructions[54], }, .count = 1U }, + [0x078] = { .instructions = { &g_instructions[53], }, .count = 1U }, + [0x07a] = { .instructions = { &g_instructions[53], }, .count = 1U }, + [0x07b] = { .instructions = { &g_instructions[120], &g_instructions[121], &g_instructions[144], &g_instructions[145], }, .count = 4U }, + [0x07c] = { .instructions = { &g_instructions[53], }, .count = 1U }, + [0x07d] = { .instructions = { &g_instructions[123], &g_instructions[148], }, .count = 2U }, + [0x07e] = { .instructions = { &g_instructions[53], }, .count = 1U }, + [0x07f] = { .instructions = { &g_instructions[125], &g_instructions[151], }, .count = 2U }, + [0x080] = { .instructions = { &g_instructions[26], }, .count = 1U }, + [0x081] = { .instructions = { &g_instructions[27], }, .count = 1U }, + [0x082] = { .instructions = { &g_instructions[26], }, .count = 1U }, + [0x083] = { .instructions = { &g_instructions[27], }, .count = 1U }, + [0x084] = { .instructions = { &g_instructions[26], }, .count = 1U }, + [0x085] = { .instructions = { &g_instructions[27], }, .count = 1U }, + [0x086] = { .instructions = { &g_instructions[26], }, .count = 1U }, + [0x087] = { .instructions = { &g_instructions[27], }, .count = 1U }, + [0x088] = { .instructions = { &g_instructions[26], }, .count = 1U }, + [0x089] = { .instructions = { &g_instructions[201], }, .count = 1U }, + [0x08a] = { .instructions = { &g_instructions[26], }, .count = 1U }, + [0x08b] = { .instructions = { &g_instructions[160], }, .count = 1U }, + [0x08c] = { .instructions = { &g_instructions[26], }, .count = 1U }, + [0x08d] = { .instructions = { &g_instructions[143], }, .count = 1U }, + [0x08e] = { .instructions = { &g_instructions[26], }, .count = 1U }, + [0x08f] = { .instructions = { &g_instructions[158], }, .count = 1U }, + [0x090] = { .instructions = { &g_instructions[26], }, .count = 1U }, + [0x091] = { .instructions = { &g_instructions[27], }, .count = 1U }, + [0x092] = { .instructions = { &g_instructions[26], }, .count = 1U }, + [0x093] = { .instructions = { &g_instructions[27], }, .count = 1U }, + [0x094] = { .instructions = { &g_instructions[26], }, .count = 1U }, + [0x095] = { .instructions = { &g_instructions[27], }, .count = 1U }, + [0x096] = { .instructions = { &g_instructions[26], }, .count = 1U }, + [0x097] = { .instructions = { &g_instructions[27], }, .count = 1U }, + [0x098] = { .instructions = { &g_instructions[26], }, .count = 1U }, + [0x099] = { .instructions = { &g_instructions[201], }, .count = 1U }, + [0x09a] = { .instructions = { &g_instructions[26], }, .count = 1U }, + [0x09b] = { .instructions = { &g_instructions[146], }, .count = 1U }, + [0x09c] = { .instructions = { &g_instructions[26], }, .count = 1U }, + [0x09d] = { .instructions = { &g_instructions[149], }, .count = 1U }, + [0x09e] = { .instructions = { &g_instructions[26], }, .count = 1U }, + [0x09f] = { .instructions = { &g_instructions[152], }, .count = 1U }, + [0x0a0] = { .instructions = { &g_instructions[23], }, .count = 1U }, + [0x0a1] = { .instructions = { &g_instructions[24], }, .count = 1U }, + [0x0a2] = { .instructions = { &g_instructions[23], }, .count = 1U }, + [0x0a3] = { .instructions = { &g_instructions[24], }, .count = 1U }, + [0x0a4] = { .instructions = { &g_instructions[23], }, .count = 1U }, + [0x0a5] = { .instructions = { &g_instructions[24], }, .count = 1U }, + [0x0a6] = { .instructions = { &g_instructions[23], }, .count = 1U }, + [0x0a7] = { .instructions = { &g_instructions[24], }, .count = 1U }, + [0x0a8] = { .instructions = { &g_instructions[23], }, .count = 1U }, + [0x0a9] = { .instructions = { &g_instructions[200], }, .count = 1U }, + [0x0aa] = { .instructions = { &g_instructions[23], }, .count = 1U }, + [0x0ab] = { .instructions = { &g_instructions[132], &g_instructions[160], }, .count = 2U }, + [0x0ac] = { .instructions = { &g_instructions[23], }, .count = 1U }, + [0x0ad] = { .instructions = { &g_instructions[143], }, .count = 1U }, + [0x0ae] = { .instructions = { &g_instructions[23], }, .count = 1U }, + [0x0af] = { .instructions = { &g_instructions[158], }, .count = 1U }, + [0x0b0] = { .instructions = { &g_instructions[23], }, .count = 1U }, + [0x0b1] = { .instructions = { &g_instructions[24], }, .count = 1U }, + [0x0b2] = { .instructions = { &g_instructions[23], }, .count = 1U }, + [0x0b3] = { .instructions = { &g_instructions[24], }, .count = 1U }, + [0x0b4] = { .instructions = { &g_instructions[23], }, .count = 1U }, + [0x0b5] = { .instructions = { &g_instructions[24], }, .count = 1U }, + [0x0b6] = { .instructions = { &g_instructions[23], }, .count = 1U }, + [0x0b7] = { .instructions = { &g_instructions[24], }, .count = 1U }, + [0x0b8] = { .instructions = { &g_instructions[23], }, .count = 1U }, + [0x0b9] = { .instructions = { &g_instructions[200], }, .count = 1U }, + [0x0ba] = { .instructions = { &g_instructions[23], }, .count = 1U }, + [0x0bb] = { .instructions = { &g_instructions[122], &g_instructions[146], }, .count = 2U }, + [0x0bc] = { .instructions = { &g_instructions[23], }, .count = 1U }, + [0x0bd] = { .instructions = { &g_instructions[124], &g_instructions[149], }, .count = 2U }, + [0x0be] = { .instructions = { &g_instructions[23], }, .count = 1U }, + [0x0bf] = { .instructions = { &g_instructions[126], &g_instructions[152], }, .count = 2U }, + [0x0c0] = { .instructions = { &g_instructions[59], }, .count = 1U }, + [0x0c1] = { .instructions = { &g_instructions[60], }, .count = 1U }, + [0x0c2] = { .instructions = { &g_instructions[59], }, .count = 1U }, + [0x0c3] = { .instructions = { &g_instructions[60], }, .count = 1U }, + [0x0c4] = { .instructions = { &g_instructions[59], }, .count = 1U }, + [0x0c5] = { .instructions = { &g_instructions[60], }, .count = 1U }, + [0x0c6] = { .instructions = { &g_instructions[59], }, .count = 1U }, + [0x0c7] = { .instructions = { &g_instructions[60], }, .count = 1U }, + [0x0c8] = { .instructions = { &g_instructions[59], }, .count = 1U }, + [0x0c9] = { .instructions = { &g_instructions[198], }, .count = 1U }, + [0x0ca] = { .instructions = { &g_instructions[59], }, .count = 1U }, + [0x0cb] = { .instructions = { &g_instructions[159], }, .count = 1U }, + [0x0cc] = { .instructions = { &g_instructions[59], }, .count = 1U }, + [0x0cd] = { .instructions = { &g_instructions[142], }, .count = 1U }, + [0x0ce] = { .instructions = { &g_instructions[59], }, .count = 1U }, + [0x0cf] = { .instructions = { &g_instructions[157], }, .count = 1U }, + [0x0d0] = { .instructions = { &g_instructions[59], }, .count = 1U }, + [0x0d1] = { .instructions = { &g_instructions[60], }, .count = 1U }, + [0x0d2] = { .instructions = { &g_instructions[59], }, .count = 1U }, + [0x0d3] = { .instructions = { &g_instructions[60], }, .count = 1U }, + [0x0d4] = { .instructions = { &g_instructions[59], }, .count = 1U }, + [0x0d5] = { .instructions = { &g_instructions[60], }, .count = 1U }, + [0x0d6] = { .instructions = { &g_instructions[59], }, .count = 1U }, + [0x0d7] = { .instructions = { &g_instructions[60], }, .count = 1U }, + [0x0d8] = { .instructions = { &g_instructions[59], }, .count = 1U }, + [0x0d9] = { .instructions = { &g_instructions[198], }, .count = 1U }, + [0x0da] = { .instructions = { &g_instructions[59], }, .count = 1U }, + [0x0db] = { .instructions = { &g_instructions[144], &g_instructions[145], }, .count = 2U }, + [0x0dc] = { .instructions = { &g_instructions[59], }, .count = 1U }, + [0x0dd] = { .instructions = { &g_instructions[148], }, .count = 1U }, + [0x0de] = { .instructions = { &g_instructions[59], }, .count = 1U }, + [0x0df] = { .instructions = { &g_instructions[151], }, .count = 1U }, + [0x0e0] = { .instructions = { &g_instructions[56], }, .count = 1U }, + [0x0e1] = { .instructions = { &g_instructions[57], }, .count = 1U }, + [0x0e2] = { .instructions = { &g_instructions[56], }, .count = 1U }, + [0x0e3] = { .instructions = { &g_instructions[57], }, .count = 1U }, + [0x0e4] = { .instructions = { &g_instructions[56], }, .count = 1U }, + [0x0e5] = { .instructions = { &g_instructions[57], }, .count = 1U }, + [0x0e6] = { .instructions = { &g_instructions[56], }, .count = 1U }, + [0x0e7] = { .instructions = { &g_instructions[57], }, .count = 1U }, + [0x0e8] = { .instructions = { &g_instructions[56], }, .count = 1U }, + [0x0e9] = { .instructions = { &g_instructions[197], }, .count = 1U }, + [0x0ea] = { .instructions = { &g_instructions[56], }, .count = 1U }, + [0x0eb] = { .instructions = { &g_instructions[131], &g_instructions[159], }, .count = 2U }, + [0x0ec] = { .instructions = { &g_instructions[56], }, .count = 1U }, + [0x0ed] = { .instructions = { &g_instructions[142], }, .count = 1U }, + [0x0ee] = { .instructions = { &g_instructions[56], }, .count = 1U }, + [0x0ef] = { .instructions = { &g_instructions[157], }, .count = 1U }, + [0x0f0] = { .instructions = { &g_instructions[56], }, .count = 1U }, + [0x0f1] = { .instructions = { &g_instructions[57], }, .count = 1U }, + [0x0f2] = { .instructions = { &g_instructions[56], }, .count = 1U }, + [0x0f3] = { .instructions = { &g_instructions[57], }, .count = 1U }, + [0x0f4] = { .instructions = { &g_instructions[56], }, .count = 1U }, + [0x0f5] = { .instructions = { &g_instructions[57], }, .count = 1U }, + [0x0f6] = { .instructions = { &g_instructions[56], }, .count = 1U }, + [0x0f7] = { .instructions = { &g_instructions[57], }, .count = 1U }, + [0x0f8] = { .instructions = { &g_instructions[56], }, .count = 1U }, + [0x0f9] = { .instructions = { &g_instructions[197], }, .count = 1U }, + [0x0fa] = { .instructions = { &g_instructions[56], }, .count = 1U }, + [0x0fb] = { .instructions = { &g_instructions[120], &g_instructions[121], &g_instructions[144], &g_instructions[145], }, .count = 4U }, + [0x0fc] = { .instructions = { &g_instructions[56], }, .count = 1U }, + [0x0fd] = { .instructions = { &g_instructions[123], &g_instructions[148], }, .count = 2U }, + [0x0fe] = { .instructions = { &g_instructions[56], }, .count = 1U }, + [0x0ff] = { .instructions = { &g_instructions[125], &g_instructions[151], }, .count = 2U }, + [0x100] = { .instructions = { &g_instructions[11], &g_instructions[12], &g_instructions[256], }, .count = 3U }, + [0x101] = { .instructions = { &g_instructions[11], }, .count = 1U }, + [0x104] = { .instructions = { &g_instructions[11], &g_instructions[13], &g_instructions[14], }, .count = 3U }, + [0x105] = { .instructions = { &g_instructions[11], &g_instructions[252], }, .count = 2U }, + [0x108] = { .instructions = { &g_instructions[11], &g_instructions[203], }, .count = 2U }, + [0x109] = { .instructions = { &g_instructions[11], &g_instructions[94], }, .count = 2U }, + [0x10a] = { .instructions = { &g_instructions[203], }, .count = 1U }, + [0x10b] = { .instructions = { &g_instructions[160], }, .count = 1U }, + [0x10c] = { .instructions = { &g_instructions[11], &g_instructions[203], }, .count = 2U }, + [0x10d] = { .instructions = { &g_instructions[11], &g_instructions[143], }, .count = 2U }, + [0x10e] = { .instructions = { &g_instructions[203], }, .count = 1U }, + [0x10f] = { .instructions = { &g_instructions[158], }, .count = 1U }, + [0x110] = { .instructions = { &g_instructions[68], }, .count = 1U }, + [0x111] = { .instructions = { &g_instructions[69], }, .count = 1U }, + [0x112] = { .instructions = { &g_instructions[68], }, .count = 1U }, + [0x113] = { .instructions = { &g_instructions[69], }, .count = 1U }, + [0x114] = { .instructions = { &g_instructions[68], }, .count = 1U }, + [0x115] = { .instructions = { &g_instructions[69], }, .count = 1U }, + [0x116] = { .instructions = { &g_instructions[68], }, .count = 1U }, + [0x117] = { .instructions = { &g_instructions[69], }, .count = 1U }, + [0x118] = { .instructions = { &g_instructions[68], }, .count = 1U }, + [0x11a] = { .instructions = { &g_instructions[68], }, .count = 1U }, + [0x11b] = { .instructions = { &g_instructions[146], }, .count = 1U }, + [0x11c] = { .instructions = { &g_instructions[68], }, .count = 1U }, + [0x11d] = { .instructions = { &g_instructions[149], }, .count = 1U }, + [0x11e] = { .instructions = { &g_instructions[68], }, .count = 1U }, + [0x11f] = { .instructions = { &g_instructions[152], }, .count = 1U }, [0x120] = { .instructions = { &g_instructions[258], }, .count = 1U }, [0x121] = { .instructions = { &g_instructions[7], }, .count = 1U }, [0x122] = { .instructions = { &g_instructions[8], }, .count = 1U }, [0x123] = { .instructions = { &g_instructions[4], }, .count = 1U }, - [0x125] = { .instructions = { &g_instructions[251], }, .count = 1U }, - [0x127] = { .instructions = { &g_instructions[66], }, .count = 1U }, - [0x128] = { .instructions = { &g_instructions[203], }, .count = 1U }, - [0x12a] = { .instructions = { &g_instructions[204], }, .count = 1U }, - [0x130] = { .instructions = { &g_instructions[61], }, .count = 1U }, - [0x131] = { .instructions = { &g_instructions[62], }, .count = 1U }, - [0x145] = { .instructions = { &g_instructions[252], }, .count = 1U }, - [0x148] = { .instructions = { &g_instructions[200], }, .count = 1U }, - [0x149] = { .instructions = { &g_instructions[92], }, .count = 1U }, - [0x14d] = { .instructions = { &g_instructions[138], }, .count = 1U }, - [0x150] = { .instructions = { &g_instructions[34], }, .count = 1U }, - [0x151] = { .instructions = { &g_instructions[35], }, .count = 1U }, - [0x15d] = { .instructions = { &g_instructions[144], }, .count = 1U }, - [0x15f] = { .instructions = { &g_instructions[147], }, .count = 1U }, - [0x161] = { .instructions = { &g_instructions[171], }, .count = 1U }, - [0x165] = { .instructions = { &g_instructions[253], }, .count = 1U }, - [0x168] = { .instructions = { &g_instructions[202], }, .count = 1U }, - [0x170] = { .instructions = { &g_instructions[31], }, .count = 1U }, - [0x171] = { .instructions = { &g_instructions[32], }, .count = 1U }, - [0x180] = { .instructions = { &g_instructions[46], }, .count = 1U }, - [0x181] = { .instructions = { &g_instructions[47], }, .count = 1U }, - [0x189] = { .instructions = { &g_instructions[93], &g_instructions[94], &g_instructions[95], }, .count = 3U }, - [0x199] = { .instructions = { &g_instructions[96], &g_instructions[97], &g_instructions[98], }, .count = 3U }, - [0x1a0] = { .instructions = { &g_instructions[40], }, .count = 1U }, - [0x1a1] = { .instructions = { &g_instructions[41], }, .count = 1U }, - [0x1a9] = { .instructions = { &g_instructions[99], &g_instructions[100], }, .count = 2U }, - [0x1b9] = { .instructions = { &g_instructions[101], &g_instructions[102], }, .count = 2U }, - [0x1c0] = { .instructions = { &g_instructions[28], }, .count = 1U }, - [0x1c1] = { .instructions = { &g_instructions[29], }, .count = 1U }, - [0x1c9] = { .instructions = { &g_instructions[103], &g_instructions[104], &g_instructions[105], }, .count = 3U }, - [0x1d9] = { .instructions = { &g_instructions[106], &g_instructions[107], &g_instructions[108], }, .count = 3U }, - [0x1e0] = { .instructions = { &g_instructions[43], }, .count = 1U }, - [0x1e1] = { .instructions = { &g_instructions[44], }, .count = 1U }, - [0x1e9] = { .instructions = { &g_instructions[109], &g_instructions[110], &g_instructions[111], }, .count = 3U }, - [0x1f9] = { .instructions = { &g_instructions[112], &g_instructions[113], &g_instructions[114], }, .count = 3U }, - [0x200] = { .instructions = { &g_instructions[24], }, .count = 1U }, - [0x220] = { .instructions = { &g_instructions[36], }, .count = 1U }, - [0x240] = { .instructions = { &g_instructions[57], }, .count = 1U }, - [0x260] = { .instructions = { &g_instructions[48], }, .count = 1U }, - [0x280] = { .instructions = { &g_instructions[21], }, .count = 1U }, - [0x2a0] = { .instructions = { &g_instructions[18], }, .count = 1U }, - [0x2c0] = { .instructions = { &g_instructions[54], }, .count = 1U }, - [0x2e0] = { .instructions = { &g_instructions[51], }, .count = 1U }, - [0x300] = { .instructions = { &g_instructions[173], }, .count = 1U }, - [0x310] = { .instructions = { &g_instructions[63], }, .count = 1U }, - [0x320] = { .instructions = { &g_instructions[83], &g_instructions[84], &g_instructions[85], &g_instructions[86], &g_instructions[87], &g_instructions[88], &g_instructions[89], &g_instructions[174], &g_instructions[257], }, .count = 9U }, - [0x330] = { .instructions = { &g_instructions[60], }, .count = 1U }, - [0x340] = { .instructions = { &g_instructions[172], }, .count = 1U }, - [0x350] = { .instructions = { &g_instructions[33], }, .count = 1U }, - [0x370] = { .instructions = { &g_instructions[30], }, .count = 1U }, - [0x380] = { .instructions = { &g_instructions[45], }, .count = 1U }, - [0x3a0] = { .instructions = { &g_instructions[39], }, .count = 1U }, - [0x3c0] = { .instructions = { &g_instructions[27], }, .count = 1U }, - [0x3e0] = { .instructions = { &g_instructions[42], }, .count = 1U }, - [0x400] = { .instructions = { &g_instructions[150], }, .count = 1U }, - [0x410] = { .instructions = { &g_instructions[133], }, .count = 1U }, - [0x420] = { .instructions = { &g_instructions[130], }, .count = 1U }, - [0x430] = { .instructions = { &g_instructions[124], }, .count = 1U }, - [0x440] = { .instructions = { &g_instructions[152], }, .count = 1U }, - [0x450] = { .instructions = { &g_instructions[136], }, .count = 1U }, - [0x460] = { .instructions = { &g_instructions[126], }, .count = 1U }, - [0x470] = { .instructions = { &g_instructions[115], }, .count = 1U }, - [0x510] = { .instructions = { &g_instructions[81], &g_instructions[132], }, .count = 2U }, - [0x550] = { .instructions = { &g_instructions[135], }, .count = 1U }, - [0x571] = { .instructions = { &g_instructions[90], }, .count = 1U }, - [0x574] = { .instructions = { &g_instructions[1], }, .count = 1U }, - [0x575] = { .instructions = { &g_instructions[0], }, .count = 1U }, - [0x576] = { .instructions = { &g_instructions[2], }, .count = 1U }, - [0x600] = { .instructions = { &g_instructions[151], }, .count = 1U }, - [0x610] = { .instructions = { &g_instructions[134], }, .count = 1U }, - [0x611] = { .instructions = { &g_instructions[215], }, .count = 1U }, - [0x613] = { .instructions = { &g_instructions[216], }, .count = 1U }, - [0x615] = { .instructions = { &g_instructions[217], }, .count = 1U }, - [0x617] = { .instructions = { &g_instructions[219], }, .count = 1U }, - [0x619] = { .instructions = { &g_instructions[214], }, .count = 1U }, - [0x61f] = { .instructions = { &g_instructions[218], }, .count = 1U }, - [0x620] = { .instructions = { &g_instructions[131], }, .count = 1U }, - [0x621] = { .instructions = { &g_instructions[227], }, .count = 1U }, - [0x623] = { .instructions = { &g_instructions[228], }, .count = 1U }, - [0x625] = { .instructions = { &g_instructions[229], }, .count = 1U }, - [0x627] = { .instructions = { &g_instructions[231], }, .count = 1U }, - [0x629] = { .instructions = { &g_instructions[226], }, .count = 1U }, - [0x62f] = { .instructions = { &g_instructions[230], }, .count = 1U }, - [0x630] = { .instructions = { &g_instructions[125], }, .count = 1U }, - [0x631] = { .instructions = { &g_instructions[239], }, .count = 1U }, - [0x633] = { .instructions = { &g_instructions[240], }, .count = 1U }, - [0x635] = { .instructions = { &g_instructions[241], }, .count = 1U }, - [0x637] = { .instructions = { &g_instructions[243], }, .count = 1U }, - [0x639] = { .instructions = { &g_instructions[238], }, .count = 1U }, - [0x63f] = { .instructions = { &g_instructions[242], }, .count = 1U }, - [0x640] = { .instructions = { &g_instructions[153], }, .count = 1U }, - [0x650] = { .instructions = { &g_instructions[137], }, .count = 1U }, - [0x651] = { .instructions = { &g_instructions[221], }, .count = 1U }, - [0x653] = { .instructions = { &g_instructions[222], }, .count = 1U }, - [0x655] = { .instructions = { &g_instructions[223], }, .count = 1U }, - [0x657] = { .instructions = { &g_instructions[225], }, .count = 1U }, - [0x659] = { .instructions = { &g_instructions[220], }, .count = 1U }, - [0x65f] = { .instructions = { &g_instructions[224], }, .count = 1U }, - [0x660] = { .instructions = { &g_instructions[127], }, .count = 1U }, - [0x661] = { .instructions = { &g_instructions[233], }, .count = 1U }, - [0x663] = { .instructions = { &g_instructions[234], }, .count = 1U }, - [0x665] = { .instructions = { &g_instructions[235], }, .count = 1U }, - [0x667] = { .instructions = { &g_instructions[237], }, .count = 1U }, - [0x669] = { .instructions = { &g_instructions[232], }, .count = 1U }, - [0x66f] = { .instructions = { &g_instructions[236], }, .count = 1U }, - [0x670] = { .instructions = { &g_instructions[116], }, .count = 1U }, - [0x671] = { .instructions = { &g_instructions[245], }, .count = 1U }, - [0x673] = { .instructions = { &g_instructions[246], }, .count = 1U }, - [0x675] = { .instructions = { &g_instructions[247], }, .count = 1U }, - [0x677] = { .instructions = { &g_instructions[249], }, .count = 1U }, - [0x679] = { .instructions = { &g_instructions[244], }, .count = 1U }, - [0x67f] = { .instructions = { &g_instructions[248], }, .count = 1U }, - [0x681] = { .instructions = { &g_instructions[180], }, .count = 1U }, - [0x685] = { .instructions = { &g_instructions[181], }, .count = 1U }, - [0x687] = { .instructions = { &g_instructions[70], &g_instructions[73], }, .count = 2U }, - [0x68b] = { .instructions = { &g_instructions[176], }, .count = 1U }, - [0x6a1] = { .instructions = { &g_instructions[186], }, .count = 1U }, - [0x6a3] = { .instructions = { &g_instructions[187], }, .count = 1U }, - [0x6a7] = { .instructions = { &g_instructions[69], &g_instructions[72], }, .count = 2U }, - [0x6b3] = { .instructions = { &g_instructions[183], }, .count = 1U }, - [0x6b7] = { .instructions = { &g_instructions[71], &g_instructions[74], }, .count = 2U }, - [0x6bb] = { .instructions = { &g_instructions[184], }, .count = 1U }, - [0x6c7] = { .instructions = { &g_instructions[76], &g_instructions[79], }, .count = 2U }, - [0x6e1] = { .instructions = { &g_instructions[188], }, .count = 1U }, - [0x6e3] = { .instructions = { &g_instructions[189], }, .count = 1U }, - [0x6e7] = { .instructions = { &g_instructions[75], &g_instructions[78], }, .count = 2U }, - [0x6f3] = { .instructions = { &g_instructions[182], }, .count = 1U }, - [0x6f7] = { .instructions = { &g_instructions[77], &g_instructions[80], }, .count = 2U }, - [0x6fb] = { .instructions = { &g_instructions[185], }, .count = 1U }, - [0x701] = { .instructions = { &g_instructions[208], &g_instructions[212], }, .count = 2U }, - [0x705] = { .instructions = { &g_instructions[210], &g_instructions[213], }, .count = 2U }, - [0x710] = { .instructions = { &g_instructions[82], }, .count = 1U }, - [0x711] = { .instructions = { &g_instructions[190], }, .count = 1U }, - [0x731] = { .instructions = { &g_instructions[191], }, .count = 1U }, - [0x741] = { .instructions = { &g_instructions[209], }, .count = 1U }, - [0x745] = { .instructions = { &g_instructions[211], }, .count = 1U }, - [0x751] = { .instructions = { &g_instructions[205], &g_instructions[206], }, .count = 2U }, - [0x75d] = { .instructions = { &g_instructions[207], }, .count = 1U }, - [0x781] = { .instructions = { &g_instructions[178], &g_instructions[179], }, .count = 2U }, - [0x7a5] = { .instructions = { &g_instructions[175], }, .count = 1U }, - [0x7c1] = { .instructions = { &g_instructions[169], &g_instructions[170], }, .count = 2U }, - [0x7e5] = { .instructions = { &g_instructions[177], }, .count = 1U }, - [0x7ff] = { .instructions = { &g_instructions[68], }, .count = 1U }, - [0x800] = { .instructions = { &g_instructions[165], }, .count = 1U }, - [0x810] = { .instructions = { &g_instructions[159], &g_instructions[259], }, .count = 2U }, - [0x840] = { .instructions = { &g_instructions[168], &g_instructions[260], }, .count = 2U }, - [0x850] = { .instructions = { &g_instructions[162], &g_instructions[163], }, .count = 2U }, - [0x880] = { .instructions = { &g_instructions[164], }, .count = 1U }, - [0x890] = { .instructions = { &g_instructions[158], }, .count = 1U }, - [0x900] = { .instructions = { &g_instructions[166], }, .count = 1U }, - [0x910] = { .instructions = { &g_instructions[160], }, .count = 1U }, - [0x980] = { .instructions = { &g_instructions[167], }, .count = 1U }, - [0x990] = { .instructions = { &g_instructions[161], }, .count = 1U }, + [0x124] = { .instructions = { &g_instructions[13], &g_instructions[14], }, .count = 2U }, + [0x125] = { .instructions = { &g_instructions[253], }, .count = 1U }, + [0x127] = { .instructions = { &g_instructions[70], }, .count = 1U }, + [0x128] = { .instructions = { &g_instructions[205], }, .count = 1U }, + [0x12a] = { .instructions = { &g_instructions[206], }, .count = 1U }, + [0x12b] = { .instructions = { &g_instructions[160], }, .count = 1U }, + [0x12c] = { .instructions = { &g_instructions[205], }, .count = 1U }, + [0x12d] = { .instructions = { &g_instructions[143], }, .count = 1U }, + [0x12e] = { .instructions = { &g_instructions[206], }, .count = 1U }, + [0x12f] = { .instructions = { &g_instructions[158], }, .count = 1U }, + [0x130] = { .instructions = { &g_instructions[65], }, .count = 1U }, + [0x131] = { .instructions = { &g_instructions[66], }, .count = 1U }, + [0x132] = { .instructions = { &g_instructions[65], }, .count = 1U }, + [0x133] = { .instructions = { &g_instructions[66], }, .count = 1U }, + [0x134] = { .instructions = { &g_instructions[65], }, .count = 1U }, + [0x135] = { .instructions = { &g_instructions[66], }, .count = 1U }, + [0x136] = { .instructions = { &g_instructions[65], }, .count = 1U }, + [0x137] = { .instructions = { &g_instructions[66], }, .count = 1U }, + [0x138] = { .instructions = { &g_instructions[65], }, .count = 1U }, + [0x13a] = { .instructions = { &g_instructions[65], }, .count = 1U }, + [0x13b] = { .instructions = { &g_instructions[146], }, .count = 1U }, + [0x13c] = { .instructions = { &g_instructions[65], }, .count = 1U }, + [0x13d] = { .instructions = { &g_instructions[149], }, .count = 1U }, + [0x13e] = { .instructions = { &g_instructions[65], }, .count = 1U }, + [0x13f] = { .instructions = { &g_instructions[152], }, .count = 1U }, + [0x144] = { .instructions = { &g_instructions[13], &g_instructions[14], }, .count = 2U }, + [0x145] = { .instructions = { &g_instructions[254], }, .count = 1U }, + [0x148] = { .instructions = { &g_instructions[202], }, .count = 1U }, + [0x149] = { .instructions = { &g_instructions[95], }, .count = 1U }, + [0x14a] = { .instructions = { &g_instructions[202], }, .count = 1U }, + [0x14b] = { .instructions = { &g_instructions[159], }, .count = 1U }, + [0x14c] = { .instructions = { &g_instructions[202], }, .count = 1U }, + [0x14d] = { .instructions = { &g_instructions[141], &g_instructions[142], }, .count = 2U }, + [0x14e] = { .instructions = { &g_instructions[202], }, .count = 1U }, + [0x14f] = { .instructions = { &g_instructions[157], }, .count = 1U }, + [0x150] = { .instructions = { &g_instructions[38], }, .count = 1U }, + [0x151] = { .instructions = { &g_instructions[39], }, .count = 1U }, + [0x152] = { .instructions = { &g_instructions[38], }, .count = 1U }, + [0x153] = { .instructions = { &g_instructions[39], }, .count = 1U }, + [0x154] = { .instructions = { &g_instructions[38], }, .count = 1U }, + [0x155] = { .instructions = { &g_instructions[39], }, .count = 1U }, + [0x156] = { .instructions = { &g_instructions[38], }, .count = 1U }, + [0x157] = { .instructions = { &g_instructions[39], }, .count = 1U }, + [0x158] = { .instructions = { &g_instructions[38], }, .count = 1U }, + [0x15a] = { .instructions = { &g_instructions[38], }, .count = 1U }, + [0x15b] = { .instructions = { &g_instructions[144], &g_instructions[145], }, .count = 2U }, + [0x15c] = { .instructions = { &g_instructions[38], }, .count = 1U }, + [0x15d] = { .instructions = { &g_instructions[147], &g_instructions[148], }, .count = 2U }, + [0x15e] = { .instructions = { &g_instructions[38], }, .count = 1U }, + [0x15f] = { .instructions = { &g_instructions[150], &g_instructions[151], }, .count = 2U }, + [0x161] = { .instructions = { &g_instructions[174], }, .count = 1U }, + [0x164] = { .instructions = { &g_instructions[13], &g_instructions[14], }, .count = 2U }, + [0x165] = { .instructions = { &g_instructions[255], }, .count = 1U }, + [0x168] = { .instructions = { &g_instructions[204], }, .count = 1U }, + [0x16a] = { .instructions = { &g_instructions[204], }, .count = 1U }, + [0x16b] = { .instructions = { &g_instructions[159], }, .count = 1U }, + [0x16c] = { .instructions = { &g_instructions[204], }, .count = 1U }, + [0x16d] = { .instructions = { &g_instructions[142], }, .count = 1U }, + [0x16e] = { .instructions = { &g_instructions[204], }, .count = 1U }, + [0x16f] = { .instructions = { &g_instructions[157], }, .count = 1U }, + [0x170] = { .instructions = { &g_instructions[35], }, .count = 1U }, + [0x171] = { .instructions = { &g_instructions[36], }, .count = 1U }, + [0x172] = { .instructions = { &g_instructions[35], }, .count = 1U }, + [0x173] = { .instructions = { &g_instructions[36], }, .count = 1U }, + [0x174] = { .instructions = { &g_instructions[35], }, .count = 1U }, + [0x175] = { .instructions = { &g_instructions[36], }, .count = 1U }, + [0x176] = { .instructions = { &g_instructions[35], }, .count = 1U }, + [0x177] = { .instructions = { &g_instructions[36], }, .count = 1U }, + [0x178] = { .instructions = { &g_instructions[35], }, .count = 1U }, + [0x17a] = { .instructions = { &g_instructions[35], }, .count = 1U }, + [0x17b] = { .instructions = { &g_instructions[144], &g_instructions[145], }, .count = 2U }, + [0x17c] = { .instructions = { &g_instructions[35], }, .count = 1U }, + [0x17d] = { .instructions = { &g_instructions[148], }, .count = 1U }, + [0x17e] = { .instructions = { &g_instructions[35], }, .count = 1U }, + [0x17f] = { .instructions = { &g_instructions[151], }, .count = 1U }, + [0x180] = { .instructions = { &g_instructions[50], }, .count = 1U }, + [0x181] = { .instructions = { &g_instructions[51], }, .count = 1U }, + [0x182] = { .instructions = { &g_instructions[50], }, .count = 1U }, + [0x183] = { .instructions = { &g_instructions[51], }, .count = 1U }, + [0x184] = { .instructions = { &g_instructions[50], }, .count = 1U }, + [0x185] = { .instructions = { &g_instructions[51], }, .count = 1U }, + [0x186] = { .instructions = { &g_instructions[50], }, .count = 1U }, + [0x187] = { .instructions = { &g_instructions[51], }, .count = 1U }, + [0x188] = { .instructions = { &g_instructions[50], }, .count = 1U }, + [0x189] = { .instructions = { &g_instructions[96], &g_instructions[97], &g_instructions[98], }, .count = 3U }, + [0x18a] = { .instructions = { &g_instructions[50], }, .count = 1U }, + [0x18b] = { .instructions = { &g_instructions[160], }, .count = 1U }, + [0x18c] = { .instructions = { &g_instructions[50], }, .count = 1U }, + [0x18d] = { .instructions = { &g_instructions[143], }, .count = 1U }, + [0x18e] = { .instructions = { &g_instructions[50], }, .count = 1U }, + [0x18f] = { .instructions = { &g_instructions[158], }, .count = 1U }, + [0x190] = { .instructions = { &g_instructions[50], }, .count = 1U }, + [0x191] = { .instructions = { &g_instructions[51], }, .count = 1U }, + [0x192] = { .instructions = { &g_instructions[50], }, .count = 1U }, + [0x193] = { .instructions = { &g_instructions[51], }, .count = 1U }, + [0x194] = { .instructions = { &g_instructions[50], }, .count = 1U }, + [0x195] = { .instructions = { &g_instructions[51], }, .count = 1U }, + [0x196] = { .instructions = { &g_instructions[50], }, .count = 1U }, + [0x197] = { .instructions = { &g_instructions[51], }, .count = 1U }, + [0x198] = { .instructions = { &g_instructions[50], }, .count = 1U }, + [0x199] = { .instructions = { &g_instructions[99], &g_instructions[100], &g_instructions[101], }, .count = 3U }, + [0x19a] = { .instructions = { &g_instructions[50], }, .count = 1U }, + [0x19b] = { .instructions = { &g_instructions[146], }, .count = 1U }, + [0x19c] = { .instructions = { &g_instructions[50], }, .count = 1U }, + [0x19d] = { .instructions = { &g_instructions[149], }, .count = 1U }, + [0x19e] = { .instructions = { &g_instructions[50], }, .count = 1U }, + [0x19f] = { .instructions = { &g_instructions[152], }, .count = 1U }, + [0x1a0] = { .instructions = { &g_instructions[44], }, .count = 1U }, + [0x1a1] = { .instructions = { &g_instructions[45], }, .count = 1U }, + [0x1a2] = { .instructions = { &g_instructions[44], }, .count = 1U }, + [0x1a3] = { .instructions = { &g_instructions[45], }, .count = 1U }, + [0x1a4] = { .instructions = { &g_instructions[44], }, .count = 1U }, + [0x1a5] = { .instructions = { &g_instructions[45], }, .count = 1U }, + [0x1a6] = { .instructions = { &g_instructions[44], }, .count = 1U }, + [0x1a7] = { .instructions = { &g_instructions[45], }, .count = 1U }, + [0x1a8] = { .instructions = { &g_instructions[44], }, .count = 1U }, + [0x1a9] = { .instructions = { &g_instructions[102], &g_instructions[103], }, .count = 2U }, + [0x1aa] = { .instructions = { &g_instructions[44], }, .count = 1U }, + [0x1ab] = { .instructions = { &g_instructions[160], }, .count = 1U }, + [0x1ac] = { .instructions = { &g_instructions[44], }, .count = 1U }, + [0x1ad] = { .instructions = { &g_instructions[143], }, .count = 1U }, + [0x1ae] = { .instructions = { &g_instructions[44], }, .count = 1U }, + [0x1af] = { .instructions = { &g_instructions[158], }, .count = 1U }, + [0x1b0] = { .instructions = { &g_instructions[44], }, .count = 1U }, + [0x1b1] = { .instructions = { &g_instructions[45], }, .count = 1U }, + [0x1b2] = { .instructions = { &g_instructions[44], }, .count = 1U }, + [0x1b3] = { .instructions = { &g_instructions[45], }, .count = 1U }, + [0x1b4] = { .instructions = { &g_instructions[44], }, .count = 1U }, + [0x1b5] = { .instructions = { &g_instructions[45], }, .count = 1U }, + [0x1b6] = { .instructions = { &g_instructions[44], }, .count = 1U }, + [0x1b7] = { .instructions = { &g_instructions[45], }, .count = 1U }, + [0x1b8] = { .instructions = { &g_instructions[44], }, .count = 1U }, + [0x1b9] = { .instructions = { &g_instructions[104], &g_instructions[105], }, .count = 2U }, + [0x1ba] = { .instructions = { &g_instructions[44], }, .count = 1U }, + [0x1bb] = { .instructions = { &g_instructions[146], }, .count = 1U }, + [0x1bc] = { .instructions = { &g_instructions[44], }, .count = 1U }, + [0x1bd] = { .instructions = { &g_instructions[149], }, .count = 1U }, + [0x1be] = { .instructions = { &g_instructions[44], }, .count = 1U }, + [0x1bf] = { .instructions = { &g_instructions[152], }, .count = 1U }, + [0x1c0] = { .instructions = { &g_instructions[32], }, .count = 1U }, + [0x1c1] = { .instructions = { &g_instructions[33], }, .count = 1U }, + [0x1c2] = { .instructions = { &g_instructions[32], }, .count = 1U }, + [0x1c3] = { .instructions = { &g_instructions[33], }, .count = 1U }, + [0x1c4] = { .instructions = { &g_instructions[32], }, .count = 1U }, + [0x1c5] = { .instructions = { &g_instructions[33], }, .count = 1U }, + [0x1c6] = { .instructions = { &g_instructions[32], }, .count = 1U }, + [0x1c7] = { .instructions = { &g_instructions[33], }, .count = 1U }, + [0x1c8] = { .instructions = { &g_instructions[32], }, .count = 1U }, + [0x1c9] = { .instructions = { &g_instructions[106], &g_instructions[107], &g_instructions[108], }, .count = 3U }, + [0x1ca] = { .instructions = { &g_instructions[32], }, .count = 1U }, + [0x1cb] = { .instructions = { &g_instructions[159], }, .count = 1U }, + [0x1cc] = { .instructions = { &g_instructions[32], }, .count = 1U }, + [0x1cd] = { .instructions = { &g_instructions[141], &g_instructions[142], }, .count = 2U }, + [0x1ce] = { .instructions = { &g_instructions[32], }, .count = 1U }, + [0x1cf] = { .instructions = { &g_instructions[157], }, .count = 1U }, + [0x1d0] = { .instructions = { &g_instructions[32], }, .count = 1U }, + [0x1d1] = { .instructions = { &g_instructions[33], }, .count = 1U }, + [0x1d2] = { .instructions = { &g_instructions[32], }, .count = 1U }, + [0x1d3] = { .instructions = { &g_instructions[33], }, .count = 1U }, + [0x1d4] = { .instructions = { &g_instructions[32], }, .count = 1U }, + [0x1d5] = { .instructions = { &g_instructions[33], }, .count = 1U }, + [0x1d6] = { .instructions = { &g_instructions[32], }, .count = 1U }, + [0x1d7] = { .instructions = { &g_instructions[33], }, .count = 1U }, + [0x1d8] = { .instructions = { &g_instructions[32], }, .count = 1U }, + [0x1d9] = { .instructions = { &g_instructions[109], &g_instructions[110], &g_instructions[111], }, .count = 3U }, + [0x1da] = { .instructions = { &g_instructions[32], }, .count = 1U }, + [0x1db] = { .instructions = { &g_instructions[144], &g_instructions[145], }, .count = 2U }, + [0x1dc] = { .instructions = { &g_instructions[32], }, .count = 1U }, + [0x1dd] = { .instructions = { &g_instructions[147], &g_instructions[148], }, .count = 2U }, + [0x1de] = { .instructions = { &g_instructions[32], }, .count = 1U }, + [0x1df] = { .instructions = { &g_instructions[150], &g_instructions[151], }, .count = 2U }, + [0x1e0] = { .instructions = { &g_instructions[47], }, .count = 1U }, + [0x1e1] = { .instructions = { &g_instructions[48], }, .count = 1U }, + [0x1e2] = { .instructions = { &g_instructions[47], }, .count = 1U }, + [0x1e3] = { .instructions = { &g_instructions[48], }, .count = 1U }, + [0x1e4] = { .instructions = { &g_instructions[47], }, .count = 1U }, + [0x1e5] = { .instructions = { &g_instructions[48], }, .count = 1U }, + [0x1e6] = { .instructions = { &g_instructions[47], }, .count = 1U }, + [0x1e7] = { .instructions = { &g_instructions[48], }, .count = 1U }, + [0x1e8] = { .instructions = { &g_instructions[47], }, .count = 1U }, + [0x1e9] = { .instructions = { &g_instructions[112], &g_instructions[113], &g_instructions[114], }, .count = 3U }, + [0x1ea] = { .instructions = { &g_instructions[47], }, .count = 1U }, + [0x1eb] = { .instructions = { &g_instructions[159], }, .count = 1U }, + [0x1ec] = { .instructions = { &g_instructions[47], }, .count = 1U }, + [0x1ed] = { .instructions = { &g_instructions[142], }, .count = 1U }, + [0x1ee] = { .instructions = { &g_instructions[47], }, .count = 1U }, + [0x1ef] = { .instructions = { &g_instructions[157], }, .count = 1U }, + [0x1f0] = { .instructions = { &g_instructions[47], }, .count = 1U }, + [0x1f1] = { .instructions = { &g_instructions[48], }, .count = 1U }, + [0x1f2] = { .instructions = { &g_instructions[47], }, .count = 1U }, + [0x1f3] = { .instructions = { &g_instructions[48], }, .count = 1U }, + [0x1f4] = { .instructions = { &g_instructions[47], }, .count = 1U }, + [0x1f5] = { .instructions = { &g_instructions[48], }, .count = 1U }, + [0x1f6] = { .instructions = { &g_instructions[47], }, .count = 1U }, + [0x1f7] = { .instructions = { &g_instructions[48], }, .count = 1U }, + [0x1f8] = { .instructions = { &g_instructions[47], }, .count = 1U }, + [0x1f9] = { .instructions = { &g_instructions[115], &g_instructions[116], &g_instructions[117], }, .count = 3U }, + [0x1fa] = { .instructions = { &g_instructions[47], }, .count = 1U }, + [0x1fb] = { .instructions = { &g_instructions[144], &g_instructions[145], }, .count = 2U }, + [0x1fc] = { .instructions = { &g_instructions[47], }, .count = 1U }, + [0x1fd] = { .instructions = { &g_instructions[148], }, .count = 1U }, + [0x1fe] = { .instructions = { &g_instructions[47], }, .count = 1U }, + [0x1ff] = { .instructions = { &g_instructions[151], }, .count = 1U }, + [0x200] = { .instructions = { &g_instructions[28], }, .count = 1U }, + [0x201] = { .instructions = { &g_instructions[28], }, .count = 1U }, + [0x202] = { .instructions = { &g_instructions[28], }, .count = 1U }, + [0x203] = { .instructions = { &g_instructions[28], }, .count = 1U }, + [0x204] = { .instructions = { &g_instructions[28], }, .count = 1U }, + [0x205] = { .instructions = { &g_instructions[28], }, .count = 1U }, + [0x206] = { .instructions = { &g_instructions[28], }, .count = 1U }, + [0x207] = { .instructions = { &g_instructions[28], }, .count = 1U }, + [0x208] = { .instructions = { &g_instructions[28], }, .count = 1U }, + [0x209] = { .instructions = { &g_instructions[28], }, .count = 1U }, + [0x20a] = { .instructions = { &g_instructions[28], }, .count = 1U }, + [0x20b] = { .instructions = { &g_instructions[28], }, .count = 1U }, + [0x20c] = { .instructions = { &g_instructions[28], }, .count = 1U }, + [0x20d] = { .instructions = { &g_instructions[28], }, .count = 1U }, + [0x20e] = { .instructions = { &g_instructions[28], }, .count = 1U }, + [0x20f] = { .instructions = { &g_instructions[28], }, .count = 1U }, + [0x210] = { .instructions = { &g_instructions[28], }, .count = 1U }, + [0x211] = { .instructions = { &g_instructions[28], }, .count = 1U }, + [0x212] = { .instructions = { &g_instructions[28], }, .count = 1U }, + [0x213] = { .instructions = { &g_instructions[28], }, .count = 1U }, + [0x214] = { .instructions = { &g_instructions[28], }, .count = 1U }, + [0x215] = { .instructions = { &g_instructions[28], }, .count = 1U }, + [0x216] = { .instructions = { &g_instructions[28], }, .count = 1U }, + [0x217] = { .instructions = { &g_instructions[28], }, .count = 1U }, + [0x218] = { .instructions = { &g_instructions[28], }, .count = 1U }, + [0x219] = { .instructions = { &g_instructions[28], }, .count = 1U }, + [0x21a] = { .instructions = { &g_instructions[28], }, .count = 1U }, + [0x21b] = { .instructions = { &g_instructions[28], }, .count = 1U }, + [0x21c] = { .instructions = { &g_instructions[28], }, .count = 1U }, + [0x21d] = { .instructions = { &g_instructions[28], }, .count = 1U }, + [0x21e] = { .instructions = { &g_instructions[28], }, .count = 1U }, + [0x21f] = { .instructions = { &g_instructions[28], }, .count = 1U }, + [0x220] = { .instructions = { &g_instructions[40], }, .count = 1U }, + [0x221] = { .instructions = { &g_instructions[40], }, .count = 1U }, + [0x222] = { .instructions = { &g_instructions[40], }, .count = 1U }, + [0x223] = { .instructions = { &g_instructions[40], }, .count = 1U }, + [0x224] = { .instructions = { &g_instructions[40], }, .count = 1U }, + [0x225] = { .instructions = { &g_instructions[40], }, .count = 1U }, + [0x226] = { .instructions = { &g_instructions[40], }, .count = 1U }, + [0x227] = { .instructions = { &g_instructions[40], }, .count = 1U }, + [0x228] = { .instructions = { &g_instructions[40], }, .count = 1U }, + [0x229] = { .instructions = { &g_instructions[40], }, .count = 1U }, + [0x22a] = { .instructions = { &g_instructions[40], }, .count = 1U }, + [0x22b] = { .instructions = { &g_instructions[40], }, .count = 1U }, + [0x22c] = { .instructions = { &g_instructions[40], }, .count = 1U }, + [0x22d] = { .instructions = { &g_instructions[40], }, .count = 1U }, + [0x22e] = { .instructions = { &g_instructions[40], }, .count = 1U }, + [0x22f] = { .instructions = { &g_instructions[40], }, .count = 1U }, + [0x230] = { .instructions = { &g_instructions[40], }, .count = 1U }, + [0x231] = { .instructions = { &g_instructions[40], }, .count = 1U }, + [0x232] = { .instructions = { &g_instructions[40], }, .count = 1U }, + [0x233] = { .instructions = { &g_instructions[40], }, .count = 1U }, + [0x234] = { .instructions = { &g_instructions[40], }, .count = 1U }, + [0x235] = { .instructions = { &g_instructions[40], }, .count = 1U }, + [0x236] = { .instructions = { &g_instructions[40], }, .count = 1U }, + [0x237] = { .instructions = { &g_instructions[40], }, .count = 1U }, + [0x238] = { .instructions = { &g_instructions[40], }, .count = 1U }, + [0x239] = { .instructions = { &g_instructions[40], }, .count = 1U }, + [0x23a] = { .instructions = { &g_instructions[40], }, .count = 1U }, + [0x23b] = { .instructions = { &g_instructions[40], }, .count = 1U }, + [0x23c] = { .instructions = { &g_instructions[40], }, .count = 1U }, + [0x23d] = { .instructions = { &g_instructions[40], }, .count = 1U }, + [0x23e] = { .instructions = { &g_instructions[40], }, .count = 1U }, + [0x23f] = { .instructions = { &g_instructions[40], }, .count = 1U }, + [0x240] = { .instructions = { &g_instructions[61], }, .count = 1U }, + [0x241] = { .instructions = { &g_instructions[61], }, .count = 1U }, + [0x242] = { .instructions = { &g_instructions[61], }, .count = 1U }, + [0x243] = { .instructions = { &g_instructions[61], }, .count = 1U }, + [0x244] = { .instructions = { &g_instructions[61], }, .count = 1U }, + [0x245] = { .instructions = { &g_instructions[61], }, .count = 1U }, + [0x246] = { .instructions = { &g_instructions[61], }, .count = 1U }, + [0x247] = { .instructions = { &g_instructions[61], }, .count = 1U }, + [0x248] = { .instructions = { &g_instructions[61], }, .count = 1U }, + [0x249] = { .instructions = { &g_instructions[61], }, .count = 1U }, + [0x24a] = { .instructions = { &g_instructions[61], }, .count = 1U }, + [0x24b] = { .instructions = { &g_instructions[61], }, .count = 1U }, + [0x24c] = { .instructions = { &g_instructions[61], }, .count = 1U }, + [0x24d] = { .instructions = { &g_instructions[61], }, .count = 1U }, + [0x24e] = { .instructions = { &g_instructions[61], }, .count = 1U }, + [0x24f] = { .instructions = { &g_instructions[61], }, .count = 1U }, + [0x250] = { .instructions = { &g_instructions[61], }, .count = 1U }, + [0x251] = { .instructions = { &g_instructions[61], }, .count = 1U }, + [0x252] = { .instructions = { &g_instructions[61], }, .count = 1U }, + [0x253] = { .instructions = { &g_instructions[61], }, .count = 1U }, + [0x254] = { .instructions = { &g_instructions[61], }, .count = 1U }, + [0x255] = { .instructions = { &g_instructions[61], }, .count = 1U }, + [0x256] = { .instructions = { &g_instructions[61], }, .count = 1U }, + [0x257] = { .instructions = { &g_instructions[61], }, .count = 1U }, + [0x258] = { .instructions = { &g_instructions[61], }, .count = 1U }, + [0x259] = { .instructions = { &g_instructions[61], }, .count = 1U }, + [0x25a] = { .instructions = { &g_instructions[61], }, .count = 1U }, + [0x25b] = { .instructions = { &g_instructions[61], }, .count = 1U }, + [0x25c] = { .instructions = { &g_instructions[61], }, .count = 1U }, + [0x25d] = { .instructions = { &g_instructions[61], }, .count = 1U }, + [0x25e] = { .instructions = { &g_instructions[61], }, .count = 1U }, + [0x25f] = { .instructions = { &g_instructions[61], }, .count = 1U }, + [0x260] = { .instructions = { &g_instructions[52], }, .count = 1U }, + [0x261] = { .instructions = { &g_instructions[52], }, .count = 1U }, + [0x262] = { .instructions = { &g_instructions[52], }, .count = 1U }, + [0x263] = { .instructions = { &g_instructions[52], }, .count = 1U }, + [0x264] = { .instructions = { &g_instructions[52], }, .count = 1U }, + [0x265] = { .instructions = { &g_instructions[52], }, .count = 1U }, + [0x266] = { .instructions = { &g_instructions[52], }, .count = 1U }, + [0x267] = { .instructions = { &g_instructions[52], }, .count = 1U }, + [0x268] = { .instructions = { &g_instructions[52], }, .count = 1U }, + [0x269] = { .instructions = { &g_instructions[52], }, .count = 1U }, + [0x26a] = { .instructions = { &g_instructions[52], }, .count = 1U }, + [0x26b] = { .instructions = { &g_instructions[52], }, .count = 1U }, + [0x26c] = { .instructions = { &g_instructions[52], }, .count = 1U }, + [0x26d] = { .instructions = { &g_instructions[52], }, .count = 1U }, + [0x26e] = { .instructions = { &g_instructions[52], }, .count = 1U }, + [0x26f] = { .instructions = { &g_instructions[52], }, .count = 1U }, + [0x270] = { .instructions = { &g_instructions[52], }, .count = 1U }, + [0x271] = { .instructions = { &g_instructions[52], }, .count = 1U }, + [0x272] = { .instructions = { &g_instructions[52], }, .count = 1U }, + [0x273] = { .instructions = { &g_instructions[52], }, .count = 1U }, + [0x274] = { .instructions = { &g_instructions[52], }, .count = 1U }, + [0x275] = { .instructions = { &g_instructions[52], }, .count = 1U }, + [0x276] = { .instructions = { &g_instructions[52], }, .count = 1U }, + [0x277] = { .instructions = { &g_instructions[52], }, .count = 1U }, + [0x278] = { .instructions = { &g_instructions[52], }, .count = 1U }, + [0x279] = { .instructions = { &g_instructions[52], }, .count = 1U }, + [0x27a] = { .instructions = { &g_instructions[52], }, .count = 1U }, + [0x27b] = { .instructions = { &g_instructions[52], }, .count = 1U }, + [0x27c] = { .instructions = { &g_instructions[52], }, .count = 1U }, + [0x27d] = { .instructions = { &g_instructions[52], }, .count = 1U }, + [0x27e] = { .instructions = { &g_instructions[52], }, .count = 1U }, + [0x27f] = { .instructions = { &g_instructions[52], }, .count = 1U }, + [0x280] = { .instructions = { &g_instructions[25], }, .count = 1U }, + [0x281] = { .instructions = { &g_instructions[25], }, .count = 1U }, + [0x282] = { .instructions = { &g_instructions[25], }, .count = 1U }, + [0x283] = { .instructions = { &g_instructions[25], }, .count = 1U }, + [0x284] = { .instructions = { &g_instructions[25], }, .count = 1U }, + [0x285] = { .instructions = { &g_instructions[25], }, .count = 1U }, + [0x286] = { .instructions = { &g_instructions[25], }, .count = 1U }, + [0x287] = { .instructions = { &g_instructions[25], }, .count = 1U }, + [0x288] = { .instructions = { &g_instructions[25], }, .count = 1U }, + [0x289] = { .instructions = { &g_instructions[25], }, .count = 1U }, + [0x28a] = { .instructions = { &g_instructions[25], }, .count = 1U }, + [0x28b] = { .instructions = { &g_instructions[25], }, .count = 1U }, + [0x28c] = { .instructions = { &g_instructions[25], }, .count = 1U }, + [0x28d] = { .instructions = { &g_instructions[25], }, .count = 1U }, + [0x28e] = { .instructions = { &g_instructions[25], }, .count = 1U }, + [0x28f] = { .instructions = { &g_instructions[25], }, .count = 1U }, + [0x290] = { .instructions = { &g_instructions[25], }, .count = 1U }, + [0x291] = { .instructions = { &g_instructions[25], }, .count = 1U }, + [0x292] = { .instructions = { &g_instructions[25], }, .count = 1U }, + [0x293] = { .instructions = { &g_instructions[25], }, .count = 1U }, + [0x294] = { .instructions = { &g_instructions[25], }, .count = 1U }, + [0x295] = { .instructions = { &g_instructions[25], }, .count = 1U }, + [0x296] = { .instructions = { &g_instructions[25], }, .count = 1U }, + [0x297] = { .instructions = { &g_instructions[25], }, .count = 1U }, + [0x298] = { .instructions = { &g_instructions[25], }, .count = 1U }, + [0x299] = { .instructions = { &g_instructions[25], }, .count = 1U }, + [0x29a] = { .instructions = { &g_instructions[25], }, .count = 1U }, + [0x29b] = { .instructions = { &g_instructions[25], }, .count = 1U }, + [0x29c] = { .instructions = { &g_instructions[25], }, .count = 1U }, + [0x29d] = { .instructions = { &g_instructions[25], }, .count = 1U }, + [0x29e] = { .instructions = { &g_instructions[25], }, .count = 1U }, + [0x29f] = { .instructions = { &g_instructions[25], }, .count = 1U }, + [0x2a0] = { .instructions = { &g_instructions[22], }, .count = 1U }, + [0x2a1] = { .instructions = { &g_instructions[22], }, .count = 1U }, + [0x2a2] = { .instructions = { &g_instructions[22], }, .count = 1U }, + [0x2a3] = { .instructions = { &g_instructions[22], }, .count = 1U }, + [0x2a4] = { .instructions = { &g_instructions[22], }, .count = 1U }, + [0x2a5] = { .instructions = { &g_instructions[22], }, .count = 1U }, + [0x2a6] = { .instructions = { &g_instructions[22], }, .count = 1U }, + [0x2a7] = { .instructions = { &g_instructions[22], }, .count = 1U }, + [0x2a8] = { .instructions = { &g_instructions[22], }, .count = 1U }, + [0x2a9] = { .instructions = { &g_instructions[22], }, .count = 1U }, + [0x2aa] = { .instructions = { &g_instructions[22], }, .count = 1U }, + [0x2ab] = { .instructions = { &g_instructions[22], }, .count = 1U }, + [0x2ac] = { .instructions = { &g_instructions[22], }, .count = 1U }, + [0x2ad] = { .instructions = { &g_instructions[22], }, .count = 1U }, + [0x2ae] = { .instructions = { &g_instructions[22], }, .count = 1U }, + [0x2af] = { .instructions = { &g_instructions[22], }, .count = 1U }, + [0x2b0] = { .instructions = { &g_instructions[22], }, .count = 1U }, + [0x2b1] = { .instructions = { &g_instructions[22], }, .count = 1U }, + [0x2b2] = { .instructions = { &g_instructions[22], }, .count = 1U }, + [0x2b3] = { .instructions = { &g_instructions[22], }, .count = 1U }, + [0x2b4] = { .instructions = { &g_instructions[22], }, .count = 1U }, + [0x2b5] = { .instructions = { &g_instructions[22], }, .count = 1U }, + [0x2b6] = { .instructions = { &g_instructions[22], }, .count = 1U }, + [0x2b7] = { .instructions = { &g_instructions[22], }, .count = 1U }, + [0x2b8] = { .instructions = { &g_instructions[22], }, .count = 1U }, + [0x2b9] = { .instructions = { &g_instructions[22], }, .count = 1U }, + [0x2ba] = { .instructions = { &g_instructions[22], }, .count = 1U }, + [0x2bb] = { .instructions = { &g_instructions[22], }, .count = 1U }, + [0x2bc] = { .instructions = { &g_instructions[22], }, .count = 1U }, + [0x2bd] = { .instructions = { &g_instructions[22], }, .count = 1U }, + [0x2be] = { .instructions = { &g_instructions[22], }, .count = 1U }, + [0x2bf] = { .instructions = { &g_instructions[22], }, .count = 1U }, + [0x2c0] = { .instructions = { &g_instructions[58], }, .count = 1U }, + [0x2c1] = { .instructions = { &g_instructions[58], }, .count = 1U }, + [0x2c2] = { .instructions = { &g_instructions[58], }, .count = 1U }, + [0x2c3] = { .instructions = { &g_instructions[58], }, .count = 1U }, + [0x2c4] = { .instructions = { &g_instructions[58], }, .count = 1U }, + [0x2c5] = { .instructions = { &g_instructions[58], }, .count = 1U }, + [0x2c6] = { .instructions = { &g_instructions[58], }, .count = 1U }, + [0x2c7] = { .instructions = { &g_instructions[58], }, .count = 1U }, + [0x2c8] = { .instructions = { &g_instructions[58], }, .count = 1U }, + [0x2c9] = { .instructions = { &g_instructions[58], }, .count = 1U }, + [0x2ca] = { .instructions = { &g_instructions[58], }, .count = 1U }, + [0x2cb] = { .instructions = { &g_instructions[58], }, .count = 1U }, + [0x2cc] = { .instructions = { &g_instructions[58], }, .count = 1U }, + [0x2cd] = { .instructions = { &g_instructions[58], }, .count = 1U }, + [0x2ce] = { .instructions = { &g_instructions[58], }, .count = 1U }, + [0x2cf] = { .instructions = { &g_instructions[58], }, .count = 1U }, + [0x2d0] = { .instructions = { &g_instructions[58], }, .count = 1U }, + [0x2d1] = { .instructions = { &g_instructions[58], }, .count = 1U }, + [0x2d2] = { .instructions = { &g_instructions[58], }, .count = 1U }, + [0x2d3] = { .instructions = { &g_instructions[58], }, .count = 1U }, + [0x2d4] = { .instructions = { &g_instructions[58], }, .count = 1U }, + [0x2d5] = { .instructions = { &g_instructions[58], }, .count = 1U }, + [0x2d6] = { .instructions = { &g_instructions[58], }, .count = 1U }, + [0x2d7] = { .instructions = { &g_instructions[58], }, .count = 1U }, + [0x2d8] = { .instructions = { &g_instructions[58], }, .count = 1U }, + [0x2d9] = { .instructions = { &g_instructions[58], }, .count = 1U }, + [0x2da] = { .instructions = { &g_instructions[58], }, .count = 1U }, + [0x2db] = { .instructions = { &g_instructions[58], }, .count = 1U }, + [0x2dc] = { .instructions = { &g_instructions[58], }, .count = 1U }, + [0x2dd] = { .instructions = { &g_instructions[58], }, .count = 1U }, + [0x2de] = { .instructions = { &g_instructions[58], }, .count = 1U }, + [0x2df] = { .instructions = { &g_instructions[58], }, .count = 1U }, + [0x2e0] = { .instructions = { &g_instructions[55], }, .count = 1U }, + [0x2e1] = { .instructions = { &g_instructions[55], }, .count = 1U }, + [0x2e2] = { .instructions = { &g_instructions[55], }, .count = 1U }, + [0x2e3] = { .instructions = { &g_instructions[55], }, .count = 1U }, + [0x2e4] = { .instructions = { &g_instructions[55], }, .count = 1U }, + [0x2e5] = { .instructions = { &g_instructions[55], }, .count = 1U }, + [0x2e6] = { .instructions = { &g_instructions[55], }, .count = 1U }, + [0x2e7] = { .instructions = { &g_instructions[55], }, .count = 1U }, + [0x2e8] = { .instructions = { &g_instructions[55], }, .count = 1U }, + [0x2e9] = { .instructions = { &g_instructions[55], }, .count = 1U }, + [0x2ea] = { .instructions = { &g_instructions[55], }, .count = 1U }, + [0x2eb] = { .instructions = { &g_instructions[55], }, .count = 1U }, + [0x2ec] = { .instructions = { &g_instructions[55], }, .count = 1U }, + [0x2ed] = { .instructions = { &g_instructions[55], }, .count = 1U }, + [0x2ee] = { .instructions = { &g_instructions[55], }, .count = 1U }, + [0x2ef] = { .instructions = { &g_instructions[55], }, .count = 1U }, + [0x2f0] = { .instructions = { &g_instructions[55], }, .count = 1U }, + [0x2f1] = { .instructions = { &g_instructions[55], }, .count = 1U }, + [0x2f2] = { .instructions = { &g_instructions[55], }, .count = 1U }, + [0x2f3] = { .instructions = { &g_instructions[55], }, .count = 1U }, + [0x2f4] = { .instructions = { &g_instructions[55], }, .count = 1U }, + [0x2f5] = { .instructions = { &g_instructions[55], }, .count = 1U }, + [0x2f6] = { .instructions = { &g_instructions[55], }, .count = 1U }, + [0x2f7] = { .instructions = { &g_instructions[55], }, .count = 1U }, + [0x2f8] = { .instructions = { &g_instructions[55], }, .count = 1U }, + [0x2f9] = { .instructions = { &g_instructions[55], }, .count = 1U }, + [0x2fa] = { .instructions = { &g_instructions[55], }, .count = 1U }, + [0x2fb] = { .instructions = { &g_instructions[55], }, .count = 1U }, + [0x2fc] = { .instructions = { &g_instructions[55], }, .count = 1U }, + [0x2fd] = { .instructions = { &g_instructions[55], }, .count = 1U }, + [0x2fe] = { .instructions = { &g_instructions[55], }, .count = 1U }, + [0x2ff] = { .instructions = { &g_instructions[55], }, .count = 1U }, + [0x300] = { .instructions = { &g_instructions[176], }, .count = 1U }, + [0x301] = { .instructions = { &g_instructions[176], }, .count = 1U }, + [0x302] = { .instructions = { &g_instructions[176], }, .count = 1U }, + [0x303] = { .instructions = { &g_instructions[176], }, .count = 1U }, + [0x304] = { .instructions = { &g_instructions[176], }, .count = 1U }, + [0x305] = { .instructions = { &g_instructions[176], }, .count = 1U }, + [0x306] = { .instructions = { &g_instructions[176], }, .count = 1U }, + [0x307] = { .instructions = { &g_instructions[176], }, .count = 1U }, + [0x308] = { .instructions = { &g_instructions[176], }, .count = 1U }, + [0x309] = { .instructions = { &g_instructions[176], }, .count = 1U }, + [0x30a] = { .instructions = { &g_instructions[176], }, .count = 1U }, + [0x30b] = { .instructions = { &g_instructions[176], }, .count = 1U }, + [0x30c] = { .instructions = { &g_instructions[176], }, .count = 1U }, + [0x30d] = { .instructions = { &g_instructions[176], }, .count = 1U }, + [0x30e] = { .instructions = { &g_instructions[176], }, .count = 1U }, + [0x30f] = { .instructions = { &g_instructions[176], }, .count = 1U }, + [0x310] = { .instructions = { &g_instructions[67], }, .count = 1U }, + [0x311] = { .instructions = { &g_instructions[67], }, .count = 1U }, + [0x312] = { .instructions = { &g_instructions[67], }, .count = 1U }, + [0x313] = { .instructions = { &g_instructions[67], }, .count = 1U }, + [0x314] = { .instructions = { &g_instructions[67], }, .count = 1U }, + [0x315] = { .instructions = { &g_instructions[67], }, .count = 1U }, + [0x316] = { .instructions = { &g_instructions[67], }, .count = 1U }, + [0x317] = { .instructions = { &g_instructions[67], }, .count = 1U }, + [0x318] = { .instructions = { &g_instructions[67], }, .count = 1U }, + [0x319] = { .instructions = { &g_instructions[67], }, .count = 1U }, + [0x31a] = { .instructions = { &g_instructions[67], }, .count = 1U }, + [0x31b] = { .instructions = { &g_instructions[67], }, .count = 1U }, + [0x31c] = { .instructions = { &g_instructions[67], }, .count = 1U }, + [0x31d] = { .instructions = { &g_instructions[67], }, .count = 1U }, + [0x31e] = { .instructions = { &g_instructions[67], }, .count = 1U }, + [0x31f] = { .instructions = { &g_instructions[67], }, .count = 1U }, + [0x320] = { .instructions = { &g_instructions[87], &g_instructions[88], &g_instructions[89], &g_instructions[90], &g_instructions[91], &g_instructions[92], &g_instructions[257], }, .count = 7U }, + [0x321] = { .instructions = { &g_instructions[257], }, .count = 1U }, + [0x322] = { .instructions = { &g_instructions[257], }, .count = 1U }, + [0x323] = { .instructions = { &g_instructions[257], }, .count = 1U }, + [0x324] = { .instructions = { &g_instructions[257], }, .count = 1U }, + [0x325] = { .instructions = { &g_instructions[257], }, .count = 1U }, + [0x326] = { .instructions = { &g_instructions[257], }, .count = 1U }, + [0x327] = { .instructions = { &g_instructions[257], }, .count = 1U }, + [0x328] = { .instructions = { &g_instructions[257], }, .count = 1U }, + [0x329] = { .instructions = { &g_instructions[257], }, .count = 1U }, + [0x32a] = { .instructions = { &g_instructions[257], }, .count = 1U }, + [0x32b] = { .instructions = { &g_instructions[257], }, .count = 1U }, + [0x32c] = { .instructions = { &g_instructions[257], }, .count = 1U }, + [0x32d] = { .instructions = { &g_instructions[257], }, .count = 1U }, + [0x32e] = { .instructions = { &g_instructions[257], }, .count = 1U }, + [0x32f] = { .instructions = { &g_instructions[257], }, .count = 1U }, + [0x330] = { .instructions = { &g_instructions[64], }, .count = 1U }, + [0x331] = { .instructions = { &g_instructions[64], }, .count = 1U }, + [0x332] = { .instructions = { &g_instructions[64], }, .count = 1U }, + [0x333] = { .instructions = { &g_instructions[64], }, .count = 1U }, + [0x334] = { .instructions = { &g_instructions[64], }, .count = 1U }, + [0x335] = { .instructions = { &g_instructions[64], }, .count = 1U }, + [0x336] = { .instructions = { &g_instructions[64], }, .count = 1U }, + [0x337] = { .instructions = { &g_instructions[64], }, .count = 1U }, + [0x338] = { .instructions = { &g_instructions[64], }, .count = 1U }, + [0x339] = { .instructions = { &g_instructions[64], }, .count = 1U }, + [0x33a] = { .instructions = { &g_instructions[64], }, .count = 1U }, + [0x33b] = { .instructions = { &g_instructions[64], }, .count = 1U }, + [0x33c] = { .instructions = { &g_instructions[64], }, .count = 1U }, + [0x33d] = { .instructions = { &g_instructions[64], }, .count = 1U }, + [0x33e] = { .instructions = { &g_instructions[64], }, .count = 1U }, + [0x33f] = { .instructions = { &g_instructions[64], }, .count = 1U }, + [0x340] = { .instructions = { &g_instructions[175], }, .count = 1U }, + [0x341] = { .instructions = { &g_instructions[175], }, .count = 1U }, + [0x342] = { .instructions = { &g_instructions[175], }, .count = 1U }, + [0x343] = { .instructions = { &g_instructions[175], }, .count = 1U }, + [0x344] = { .instructions = { &g_instructions[175], }, .count = 1U }, + [0x345] = { .instructions = { &g_instructions[175], }, .count = 1U }, + [0x346] = { .instructions = { &g_instructions[175], }, .count = 1U }, + [0x347] = { .instructions = { &g_instructions[175], }, .count = 1U }, + [0x348] = { .instructions = { &g_instructions[175], }, .count = 1U }, + [0x349] = { .instructions = { &g_instructions[175], }, .count = 1U }, + [0x34a] = { .instructions = { &g_instructions[175], }, .count = 1U }, + [0x34b] = { .instructions = { &g_instructions[175], }, .count = 1U }, + [0x34c] = { .instructions = { &g_instructions[175], }, .count = 1U }, + [0x34d] = { .instructions = { &g_instructions[175], }, .count = 1U }, + [0x34e] = { .instructions = { &g_instructions[175], }, .count = 1U }, + [0x34f] = { .instructions = { &g_instructions[175], }, .count = 1U }, + [0x350] = { .instructions = { &g_instructions[37], }, .count = 1U }, + [0x351] = { .instructions = { &g_instructions[37], }, .count = 1U }, + [0x352] = { .instructions = { &g_instructions[37], }, .count = 1U }, + [0x353] = { .instructions = { &g_instructions[37], }, .count = 1U }, + [0x354] = { .instructions = { &g_instructions[37], }, .count = 1U }, + [0x355] = { .instructions = { &g_instructions[37], }, .count = 1U }, + [0x356] = { .instructions = { &g_instructions[37], }, .count = 1U }, + [0x357] = { .instructions = { &g_instructions[37], }, .count = 1U }, + [0x358] = { .instructions = { &g_instructions[37], }, .count = 1U }, + [0x359] = { .instructions = { &g_instructions[37], }, .count = 1U }, + [0x35a] = { .instructions = { &g_instructions[37], }, .count = 1U }, + [0x35b] = { .instructions = { &g_instructions[37], }, .count = 1U }, + [0x35c] = { .instructions = { &g_instructions[37], }, .count = 1U }, + [0x35d] = { .instructions = { &g_instructions[37], }, .count = 1U }, + [0x35e] = { .instructions = { &g_instructions[37], }, .count = 1U }, + [0x35f] = { .instructions = { &g_instructions[37], }, .count = 1U }, + [0x370] = { .instructions = { &g_instructions[34], }, .count = 1U }, + [0x371] = { .instructions = { &g_instructions[34], }, .count = 1U }, + [0x372] = { .instructions = { &g_instructions[34], }, .count = 1U }, + [0x373] = { .instructions = { &g_instructions[34], }, .count = 1U }, + [0x374] = { .instructions = { &g_instructions[34], }, .count = 1U }, + [0x375] = { .instructions = { &g_instructions[34], }, .count = 1U }, + [0x376] = { .instructions = { &g_instructions[34], }, .count = 1U }, + [0x377] = { .instructions = { &g_instructions[34], }, .count = 1U }, + [0x378] = { .instructions = { &g_instructions[34], }, .count = 1U }, + [0x379] = { .instructions = { &g_instructions[34], }, .count = 1U }, + [0x37a] = { .instructions = { &g_instructions[34], }, .count = 1U }, + [0x37b] = { .instructions = { &g_instructions[34], }, .count = 1U }, + [0x37c] = { .instructions = { &g_instructions[34], }, .count = 1U }, + [0x37d] = { .instructions = { &g_instructions[34], }, .count = 1U }, + [0x37e] = { .instructions = { &g_instructions[34], }, .count = 1U }, + [0x37f] = { .instructions = { &g_instructions[34], }, .count = 1U }, + [0x380] = { .instructions = { &g_instructions[49], }, .count = 1U }, + [0x381] = { .instructions = { &g_instructions[49], }, .count = 1U }, + [0x382] = { .instructions = { &g_instructions[49], }, .count = 1U }, + [0x383] = { .instructions = { &g_instructions[49], }, .count = 1U }, + [0x384] = { .instructions = { &g_instructions[49], }, .count = 1U }, + [0x385] = { .instructions = { &g_instructions[49], }, .count = 1U }, + [0x386] = { .instructions = { &g_instructions[49], }, .count = 1U }, + [0x387] = { .instructions = { &g_instructions[49], }, .count = 1U }, + [0x388] = { .instructions = { &g_instructions[49], }, .count = 1U }, + [0x389] = { .instructions = { &g_instructions[49], }, .count = 1U }, + [0x38a] = { .instructions = { &g_instructions[49], }, .count = 1U }, + [0x38b] = { .instructions = { &g_instructions[49], }, .count = 1U }, + [0x38c] = { .instructions = { &g_instructions[49], }, .count = 1U }, + [0x38d] = { .instructions = { &g_instructions[49], }, .count = 1U }, + [0x38e] = { .instructions = { &g_instructions[49], }, .count = 1U }, + [0x38f] = { .instructions = { &g_instructions[49], }, .count = 1U }, + [0x390] = { .instructions = { &g_instructions[49], }, .count = 1U }, + [0x391] = { .instructions = { &g_instructions[49], }, .count = 1U }, + [0x392] = { .instructions = { &g_instructions[49], }, .count = 1U }, + [0x393] = { .instructions = { &g_instructions[49], }, .count = 1U }, + [0x394] = { .instructions = { &g_instructions[49], }, .count = 1U }, + [0x395] = { .instructions = { &g_instructions[49], }, .count = 1U }, + [0x396] = { .instructions = { &g_instructions[49], }, .count = 1U }, + [0x397] = { .instructions = { &g_instructions[49], }, .count = 1U }, + [0x398] = { .instructions = { &g_instructions[49], }, .count = 1U }, + [0x399] = { .instructions = { &g_instructions[49], }, .count = 1U }, + [0x39a] = { .instructions = { &g_instructions[49], }, .count = 1U }, + [0x39b] = { .instructions = { &g_instructions[49], }, .count = 1U }, + [0x39c] = { .instructions = { &g_instructions[49], }, .count = 1U }, + [0x39d] = { .instructions = { &g_instructions[49], }, .count = 1U }, + [0x39e] = { .instructions = { &g_instructions[49], }, .count = 1U }, + [0x39f] = { .instructions = { &g_instructions[49], }, .count = 1U }, + [0x3a0] = { .instructions = { &g_instructions[43], }, .count = 1U }, + [0x3a1] = { .instructions = { &g_instructions[43], }, .count = 1U }, + [0x3a2] = { .instructions = { &g_instructions[43], }, .count = 1U }, + [0x3a3] = { .instructions = { &g_instructions[43], }, .count = 1U }, + [0x3a4] = { .instructions = { &g_instructions[43], }, .count = 1U }, + [0x3a5] = { .instructions = { &g_instructions[43], }, .count = 1U }, + [0x3a6] = { .instructions = { &g_instructions[43], }, .count = 1U }, + [0x3a7] = { .instructions = { &g_instructions[43], }, .count = 1U }, + [0x3a8] = { .instructions = { &g_instructions[43], }, .count = 1U }, + [0x3a9] = { .instructions = { &g_instructions[43], }, .count = 1U }, + [0x3aa] = { .instructions = { &g_instructions[43], }, .count = 1U }, + [0x3ab] = { .instructions = { &g_instructions[43], }, .count = 1U }, + [0x3ac] = { .instructions = { &g_instructions[43], }, .count = 1U }, + [0x3ad] = { .instructions = { &g_instructions[43], }, .count = 1U }, + [0x3ae] = { .instructions = { &g_instructions[43], }, .count = 1U }, + [0x3af] = { .instructions = { &g_instructions[43], }, .count = 1U }, + [0x3b0] = { .instructions = { &g_instructions[43], }, .count = 1U }, + [0x3b1] = { .instructions = { &g_instructions[43], }, .count = 1U }, + [0x3b2] = { .instructions = { &g_instructions[43], }, .count = 1U }, + [0x3b3] = { .instructions = { &g_instructions[43], }, .count = 1U }, + [0x3b4] = { .instructions = { &g_instructions[43], }, .count = 1U }, + [0x3b5] = { .instructions = { &g_instructions[43], }, .count = 1U }, + [0x3b6] = { .instructions = { &g_instructions[43], }, .count = 1U }, + [0x3b7] = { .instructions = { &g_instructions[43], }, .count = 1U }, + [0x3b8] = { .instructions = { &g_instructions[43], }, .count = 1U }, + [0x3b9] = { .instructions = { &g_instructions[43], }, .count = 1U }, + [0x3ba] = { .instructions = { &g_instructions[43], }, .count = 1U }, + [0x3bb] = { .instructions = { &g_instructions[43], }, .count = 1U }, + [0x3bc] = { .instructions = { &g_instructions[43], }, .count = 1U }, + [0x3bd] = { .instructions = { &g_instructions[43], }, .count = 1U }, + [0x3be] = { .instructions = { &g_instructions[43], }, .count = 1U }, + [0x3bf] = { .instructions = { &g_instructions[43], }, .count = 1U }, + [0x3c0] = { .instructions = { &g_instructions[31], }, .count = 1U }, + [0x3c1] = { .instructions = { &g_instructions[31], }, .count = 1U }, + [0x3c2] = { .instructions = { &g_instructions[31], }, .count = 1U }, + [0x3c3] = { .instructions = { &g_instructions[31], }, .count = 1U }, + [0x3c4] = { .instructions = { &g_instructions[31], }, .count = 1U }, + [0x3c5] = { .instructions = { &g_instructions[31], }, .count = 1U }, + [0x3c6] = { .instructions = { &g_instructions[31], }, .count = 1U }, + [0x3c7] = { .instructions = { &g_instructions[31], }, .count = 1U }, + [0x3c8] = { .instructions = { &g_instructions[31], }, .count = 1U }, + [0x3c9] = { .instructions = { &g_instructions[31], }, .count = 1U }, + [0x3ca] = { .instructions = { &g_instructions[31], }, .count = 1U }, + [0x3cb] = { .instructions = { &g_instructions[31], }, .count = 1U }, + [0x3cc] = { .instructions = { &g_instructions[31], }, .count = 1U }, + [0x3cd] = { .instructions = { &g_instructions[31], }, .count = 1U }, + [0x3ce] = { .instructions = { &g_instructions[31], }, .count = 1U }, + [0x3cf] = { .instructions = { &g_instructions[31], }, .count = 1U }, + [0x3d0] = { .instructions = { &g_instructions[31], }, .count = 1U }, + [0x3d1] = { .instructions = { &g_instructions[31], }, .count = 1U }, + [0x3d2] = { .instructions = { &g_instructions[31], }, .count = 1U }, + [0x3d3] = { .instructions = { &g_instructions[31], }, .count = 1U }, + [0x3d4] = { .instructions = { &g_instructions[31], }, .count = 1U }, + [0x3d5] = { .instructions = { &g_instructions[31], }, .count = 1U }, + [0x3d6] = { .instructions = { &g_instructions[31], }, .count = 1U }, + [0x3d7] = { .instructions = { &g_instructions[31], }, .count = 1U }, + [0x3d8] = { .instructions = { &g_instructions[31], }, .count = 1U }, + [0x3d9] = { .instructions = { &g_instructions[31], }, .count = 1U }, + [0x3da] = { .instructions = { &g_instructions[31], }, .count = 1U }, + [0x3db] = { .instructions = { &g_instructions[31], }, .count = 1U }, + [0x3dc] = { .instructions = { &g_instructions[31], }, .count = 1U }, + [0x3dd] = { .instructions = { &g_instructions[31], }, .count = 1U }, + [0x3de] = { .instructions = { &g_instructions[31], }, .count = 1U }, + [0x3df] = { .instructions = { &g_instructions[31], }, .count = 1U }, + [0x3e0] = { .instructions = { &g_instructions[46], }, .count = 1U }, + [0x3e1] = { .instructions = { &g_instructions[46], }, .count = 1U }, + [0x3e2] = { .instructions = { &g_instructions[46], }, .count = 1U }, + [0x3e3] = { .instructions = { &g_instructions[46], }, .count = 1U }, + [0x3e4] = { .instructions = { &g_instructions[46], }, .count = 1U }, + [0x3e5] = { .instructions = { &g_instructions[46], }, .count = 1U }, + [0x3e6] = { .instructions = { &g_instructions[46], }, .count = 1U }, + [0x3e7] = { .instructions = { &g_instructions[46], }, .count = 1U }, + [0x3e8] = { .instructions = { &g_instructions[46], }, .count = 1U }, + [0x3e9] = { .instructions = { &g_instructions[46], }, .count = 1U }, + [0x3ea] = { .instructions = { &g_instructions[46], }, .count = 1U }, + [0x3eb] = { .instructions = { &g_instructions[46], }, .count = 1U }, + [0x3ec] = { .instructions = { &g_instructions[46], }, .count = 1U }, + [0x3ed] = { .instructions = { &g_instructions[46], }, .count = 1U }, + [0x3ee] = { .instructions = { &g_instructions[46], }, .count = 1U }, + [0x3ef] = { .instructions = { &g_instructions[46], }, .count = 1U }, + [0x3f0] = { .instructions = { &g_instructions[46], }, .count = 1U }, + [0x3f1] = { .instructions = { &g_instructions[46], }, .count = 1U }, + [0x3f2] = { .instructions = { &g_instructions[46], }, .count = 1U }, + [0x3f3] = { .instructions = { &g_instructions[46], }, .count = 1U }, + [0x3f4] = { .instructions = { &g_instructions[46], }, .count = 1U }, + [0x3f5] = { .instructions = { &g_instructions[46], }, .count = 1U }, + [0x3f6] = { .instructions = { &g_instructions[46], }, .count = 1U }, + [0x3f7] = { .instructions = { &g_instructions[46], }, .count = 1U }, + [0x3f8] = { .instructions = { &g_instructions[46], }, .count = 1U }, + [0x3f9] = { .instructions = { &g_instructions[46], }, .count = 1U }, + [0x3fa] = { .instructions = { &g_instructions[46], }, .count = 1U }, + [0x3fb] = { .instructions = { &g_instructions[46], }, .count = 1U }, + [0x3fc] = { .instructions = { &g_instructions[46], }, .count = 1U }, + [0x3fd] = { .instructions = { &g_instructions[46], }, .count = 1U }, + [0x3fe] = { .instructions = { &g_instructions[46], }, .count = 1U }, + [0x3ff] = { .instructions = { &g_instructions[46], }, .count = 1U }, + [0x400] = { .instructions = { &g_instructions[153], }, .count = 1U }, + [0x401] = { .instructions = { &g_instructions[153], }, .count = 1U }, + [0x402] = { .instructions = { &g_instructions[153], }, .count = 1U }, + [0x403] = { .instructions = { &g_instructions[153], }, .count = 1U }, + [0x404] = { .instructions = { &g_instructions[153], }, .count = 1U }, + [0x405] = { .instructions = { &g_instructions[153], }, .count = 1U }, + [0x406] = { .instructions = { &g_instructions[153], }, .count = 1U }, + [0x407] = { .instructions = { &g_instructions[153], }, .count = 1U }, + [0x408] = { .instructions = { &g_instructions[153], }, .count = 1U }, + [0x409] = { .instructions = { &g_instructions[153], }, .count = 1U }, + [0x40a] = { .instructions = { &g_instructions[153], }, .count = 1U }, + [0x40b] = { .instructions = { &g_instructions[153], }, .count = 1U }, + [0x40c] = { .instructions = { &g_instructions[153], }, .count = 1U }, + [0x40d] = { .instructions = { &g_instructions[153], }, .count = 1U }, + [0x40e] = { .instructions = { &g_instructions[153], }, .count = 1U }, + [0x40f] = { .instructions = { &g_instructions[153], }, .count = 1U }, + [0x410] = { .instructions = { &g_instructions[136], }, .count = 1U }, + [0x411] = { .instructions = { &g_instructions[136], }, .count = 1U }, + [0x412] = { .instructions = { &g_instructions[136], }, .count = 1U }, + [0x413] = { .instructions = { &g_instructions[136], }, .count = 1U }, + [0x414] = { .instructions = { &g_instructions[136], }, .count = 1U }, + [0x415] = { .instructions = { &g_instructions[136], }, .count = 1U }, + [0x416] = { .instructions = { &g_instructions[136], }, .count = 1U }, + [0x417] = { .instructions = { &g_instructions[136], }, .count = 1U }, + [0x418] = { .instructions = { &g_instructions[136], }, .count = 1U }, + [0x419] = { .instructions = { &g_instructions[136], }, .count = 1U }, + [0x41a] = { .instructions = { &g_instructions[136], }, .count = 1U }, + [0x41b] = { .instructions = { &g_instructions[136], }, .count = 1U }, + [0x41c] = { .instructions = { &g_instructions[136], }, .count = 1U }, + [0x41d] = { .instructions = { &g_instructions[136], }, .count = 1U }, + [0x41e] = { .instructions = { &g_instructions[136], }, .count = 1U }, + [0x41f] = { .instructions = { &g_instructions[136], }, .count = 1U }, + [0x420] = { .instructions = { &g_instructions[133], &g_instructions[153], }, .count = 2U }, + [0x421] = { .instructions = { &g_instructions[133], &g_instructions[153], }, .count = 2U }, + [0x422] = { .instructions = { &g_instructions[133], &g_instructions[153], }, .count = 2U }, + [0x423] = { .instructions = { &g_instructions[133], &g_instructions[153], }, .count = 2U }, + [0x424] = { .instructions = { &g_instructions[133], &g_instructions[153], }, .count = 2U }, + [0x425] = { .instructions = { &g_instructions[133], &g_instructions[153], }, .count = 2U }, + [0x426] = { .instructions = { &g_instructions[133], &g_instructions[153], }, .count = 2U }, + [0x427] = { .instructions = { &g_instructions[133], &g_instructions[153], }, .count = 2U }, + [0x428] = { .instructions = { &g_instructions[133], &g_instructions[153], }, .count = 2U }, + [0x429] = { .instructions = { &g_instructions[133], &g_instructions[153], }, .count = 2U }, + [0x42a] = { .instructions = { &g_instructions[133], &g_instructions[153], }, .count = 2U }, + [0x42b] = { .instructions = { &g_instructions[133], &g_instructions[153], }, .count = 2U }, + [0x42c] = { .instructions = { &g_instructions[133], &g_instructions[153], }, .count = 2U }, + [0x42d] = { .instructions = { &g_instructions[133], &g_instructions[153], }, .count = 2U }, + [0x42e] = { .instructions = { &g_instructions[133], &g_instructions[153], }, .count = 2U }, + [0x42f] = { .instructions = { &g_instructions[133], &g_instructions[153], }, .count = 2U }, + [0x430] = { .instructions = { &g_instructions[127], &g_instructions[136], }, .count = 2U }, + [0x431] = { .instructions = { &g_instructions[127], &g_instructions[136], }, .count = 2U }, + [0x432] = { .instructions = { &g_instructions[127], &g_instructions[136], }, .count = 2U }, + [0x433] = { .instructions = { &g_instructions[127], &g_instructions[136], }, .count = 2U }, + [0x434] = { .instructions = { &g_instructions[127], &g_instructions[136], }, .count = 2U }, + [0x435] = { .instructions = { &g_instructions[127], &g_instructions[136], }, .count = 2U }, + [0x436] = { .instructions = { &g_instructions[127], &g_instructions[136], }, .count = 2U }, + [0x437] = { .instructions = { &g_instructions[127], &g_instructions[136], }, .count = 2U }, + [0x438] = { .instructions = { &g_instructions[127], &g_instructions[136], }, .count = 2U }, + [0x439] = { .instructions = { &g_instructions[127], &g_instructions[136], }, .count = 2U }, + [0x43a] = { .instructions = { &g_instructions[127], &g_instructions[136], }, .count = 2U }, + [0x43b] = { .instructions = { &g_instructions[127], &g_instructions[136], }, .count = 2U }, + [0x43c] = { .instructions = { &g_instructions[127], &g_instructions[136], }, .count = 2U }, + [0x43d] = { .instructions = { &g_instructions[127], &g_instructions[136], }, .count = 2U }, + [0x43e] = { .instructions = { &g_instructions[127], &g_instructions[136], }, .count = 2U }, + [0x43f] = { .instructions = { &g_instructions[127], &g_instructions[136], }, .count = 2U }, + [0x440] = { .instructions = { &g_instructions[155], }, .count = 1U }, + [0x441] = { .instructions = { &g_instructions[155], }, .count = 1U }, + [0x442] = { .instructions = { &g_instructions[155], }, .count = 1U }, + [0x443] = { .instructions = { &g_instructions[155], }, .count = 1U }, + [0x444] = { .instructions = { &g_instructions[155], }, .count = 1U }, + [0x445] = { .instructions = { &g_instructions[155], }, .count = 1U }, + [0x446] = { .instructions = { &g_instructions[155], }, .count = 1U }, + [0x447] = { .instructions = { &g_instructions[155], }, .count = 1U }, + [0x448] = { .instructions = { &g_instructions[155], }, .count = 1U }, + [0x449] = { .instructions = { &g_instructions[155], }, .count = 1U }, + [0x44a] = { .instructions = { &g_instructions[155], }, .count = 1U }, + [0x44b] = { .instructions = { &g_instructions[155], }, .count = 1U }, + [0x44c] = { .instructions = { &g_instructions[155], }, .count = 1U }, + [0x44d] = { .instructions = { &g_instructions[155], }, .count = 1U }, + [0x44e] = { .instructions = { &g_instructions[155], }, .count = 1U }, + [0x44f] = { .instructions = { &g_instructions[155], }, .count = 1U }, + [0x450] = { .instructions = { &g_instructions[139], }, .count = 1U }, + [0x451] = { .instructions = { &g_instructions[139], }, .count = 1U }, + [0x452] = { .instructions = { &g_instructions[139], }, .count = 1U }, + [0x453] = { .instructions = { &g_instructions[139], }, .count = 1U }, + [0x454] = { .instructions = { &g_instructions[139], }, .count = 1U }, + [0x455] = { .instructions = { &g_instructions[139], }, .count = 1U }, + [0x456] = { .instructions = { &g_instructions[139], }, .count = 1U }, + [0x457] = { .instructions = { &g_instructions[139], }, .count = 1U }, + [0x458] = { .instructions = { &g_instructions[139], }, .count = 1U }, + [0x459] = { .instructions = { &g_instructions[139], }, .count = 1U }, + [0x45a] = { .instructions = { &g_instructions[139], }, .count = 1U }, + [0x45b] = { .instructions = { &g_instructions[139], }, .count = 1U }, + [0x45c] = { .instructions = { &g_instructions[139], }, .count = 1U }, + [0x45d] = { .instructions = { &g_instructions[139], }, .count = 1U }, + [0x45e] = { .instructions = { &g_instructions[139], }, .count = 1U }, + [0x45f] = { .instructions = { &g_instructions[139], }, .count = 1U }, + [0x460] = { .instructions = { &g_instructions[129], &g_instructions[155], }, .count = 2U }, + [0x461] = { .instructions = { &g_instructions[129], &g_instructions[155], }, .count = 2U }, + [0x462] = { .instructions = { &g_instructions[129], &g_instructions[155], }, .count = 2U }, + [0x463] = { .instructions = { &g_instructions[129], &g_instructions[155], }, .count = 2U }, + [0x464] = { .instructions = { &g_instructions[129], &g_instructions[155], }, .count = 2U }, + [0x465] = { .instructions = { &g_instructions[129], &g_instructions[155], }, .count = 2U }, + [0x466] = { .instructions = { &g_instructions[129], &g_instructions[155], }, .count = 2U }, + [0x467] = { .instructions = { &g_instructions[129], &g_instructions[155], }, .count = 2U }, + [0x468] = { .instructions = { &g_instructions[129], &g_instructions[155], }, .count = 2U }, + [0x469] = { .instructions = { &g_instructions[129], &g_instructions[155], }, .count = 2U }, + [0x46a] = { .instructions = { &g_instructions[129], &g_instructions[155], }, .count = 2U }, + [0x46b] = { .instructions = { &g_instructions[129], &g_instructions[155], }, .count = 2U }, + [0x46c] = { .instructions = { &g_instructions[129], &g_instructions[155], }, .count = 2U }, + [0x46d] = { .instructions = { &g_instructions[129], &g_instructions[155], }, .count = 2U }, + [0x46e] = { .instructions = { &g_instructions[129], &g_instructions[155], }, .count = 2U }, + [0x46f] = { .instructions = { &g_instructions[129], &g_instructions[155], }, .count = 2U }, + [0x470] = { .instructions = { &g_instructions[118], &g_instructions[139], }, .count = 2U }, + [0x471] = { .instructions = { &g_instructions[118], &g_instructions[139], }, .count = 2U }, + [0x472] = { .instructions = { &g_instructions[118], &g_instructions[139], }, .count = 2U }, + [0x473] = { .instructions = { &g_instructions[118], &g_instructions[139], }, .count = 2U }, + [0x474] = { .instructions = { &g_instructions[118], &g_instructions[139], }, .count = 2U }, + [0x475] = { .instructions = { &g_instructions[118], &g_instructions[139], }, .count = 2U }, + [0x476] = { .instructions = { &g_instructions[118], &g_instructions[139], }, .count = 2U }, + [0x477] = { .instructions = { &g_instructions[118], &g_instructions[139], }, .count = 2U }, + [0x478] = { .instructions = { &g_instructions[118], &g_instructions[139], }, .count = 2U }, + [0x479] = { .instructions = { &g_instructions[118], &g_instructions[139], }, .count = 2U }, + [0x47a] = { .instructions = { &g_instructions[118], &g_instructions[139], }, .count = 2U }, + [0x47b] = { .instructions = { &g_instructions[118], &g_instructions[139], }, .count = 2U }, + [0x47c] = { .instructions = { &g_instructions[118], &g_instructions[139], }, .count = 2U }, + [0x47d] = { .instructions = { &g_instructions[118], &g_instructions[139], }, .count = 2U }, + [0x47e] = { .instructions = { &g_instructions[118], &g_instructions[139], }, .count = 2U }, + [0x47f] = { .instructions = { &g_instructions[118], &g_instructions[139], }, .count = 2U }, + [0x480] = { .instructions = { &g_instructions[153], }, .count = 1U }, + [0x481] = { .instructions = { &g_instructions[153], }, .count = 1U }, + [0x482] = { .instructions = { &g_instructions[153], }, .count = 1U }, + [0x483] = { .instructions = { &g_instructions[153], }, .count = 1U }, + [0x484] = { .instructions = { &g_instructions[153], }, .count = 1U }, + [0x485] = { .instructions = { &g_instructions[153], }, .count = 1U }, + [0x486] = { .instructions = { &g_instructions[153], }, .count = 1U }, + [0x487] = { .instructions = { &g_instructions[153], }, .count = 1U }, + [0x488] = { .instructions = { &g_instructions[153], }, .count = 1U }, + [0x489] = { .instructions = { &g_instructions[153], }, .count = 1U }, + [0x48a] = { .instructions = { &g_instructions[153], }, .count = 1U }, + [0x48b] = { .instructions = { &g_instructions[153], }, .count = 1U }, + [0x48c] = { .instructions = { &g_instructions[153], }, .count = 1U }, + [0x48d] = { .instructions = { &g_instructions[153], }, .count = 1U }, + [0x48e] = { .instructions = { &g_instructions[153], }, .count = 1U }, + [0x48f] = { .instructions = { &g_instructions[153], }, .count = 1U }, + [0x490] = { .instructions = { &g_instructions[136], }, .count = 1U }, + [0x491] = { .instructions = { &g_instructions[136], }, .count = 1U }, + [0x492] = { .instructions = { &g_instructions[136], }, .count = 1U }, + [0x493] = { .instructions = { &g_instructions[136], }, .count = 1U }, + [0x494] = { .instructions = { &g_instructions[136], }, .count = 1U }, + [0x495] = { .instructions = { &g_instructions[136], }, .count = 1U }, + [0x496] = { .instructions = { &g_instructions[136], }, .count = 1U }, + [0x497] = { .instructions = { &g_instructions[136], }, .count = 1U }, + [0x498] = { .instructions = { &g_instructions[136], }, .count = 1U }, + [0x499] = { .instructions = { &g_instructions[136], }, .count = 1U }, + [0x49a] = { .instructions = { &g_instructions[136], }, .count = 1U }, + [0x49b] = { .instructions = { &g_instructions[136], }, .count = 1U }, + [0x49c] = { .instructions = { &g_instructions[136], }, .count = 1U }, + [0x49d] = { .instructions = { &g_instructions[136], }, .count = 1U }, + [0x49e] = { .instructions = { &g_instructions[136], }, .count = 1U }, + [0x49f] = { .instructions = { &g_instructions[136], }, .count = 1U }, + [0x4a0] = { .instructions = { &g_instructions[133], &g_instructions[153], }, .count = 2U }, + [0x4a1] = { .instructions = { &g_instructions[133], &g_instructions[153], }, .count = 2U }, + [0x4a2] = { .instructions = { &g_instructions[133], &g_instructions[153], }, .count = 2U }, + [0x4a3] = { .instructions = { &g_instructions[133], &g_instructions[153], }, .count = 2U }, + [0x4a4] = { .instructions = { &g_instructions[133], &g_instructions[153], }, .count = 2U }, + [0x4a5] = { .instructions = { &g_instructions[133], &g_instructions[153], }, .count = 2U }, + [0x4a6] = { .instructions = { &g_instructions[133], &g_instructions[153], }, .count = 2U }, + [0x4a7] = { .instructions = { &g_instructions[133], &g_instructions[153], }, .count = 2U }, + [0x4a8] = { .instructions = { &g_instructions[133], &g_instructions[153], }, .count = 2U }, + [0x4a9] = { .instructions = { &g_instructions[133], &g_instructions[153], }, .count = 2U }, + [0x4aa] = { .instructions = { &g_instructions[133], &g_instructions[153], }, .count = 2U }, + [0x4ab] = { .instructions = { &g_instructions[133], &g_instructions[153], }, .count = 2U }, + [0x4ac] = { .instructions = { &g_instructions[133], &g_instructions[153], }, .count = 2U }, + [0x4ad] = { .instructions = { &g_instructions[133], &g_instructions[153], }, .count = 2U }, + [0x4ae] = { .instructions = { &g_instructions[133], &g_instructions[153], }, .count = 2U }, + [0x4af] = { .instructions = { &g_instructions[133], &g_instructions[153], }, .count = 2U }, + [0x4b0] = { .instructions = { &g_instructions[127], &g_instructions[136], }, .count = 2U }, + [0x4b1] = { .instructions = { &g_instructions[127], &g_instructions[136], }, .count = 2U }, + [0x4b2] = { .instructions = { &g_instructions[127], &g_instructions[136], }, .count = 2U }, + [0x4b3] = { .instructions = { &g_instructions[127], &g_instructions[136], }, .count = 2U }, + [0x4b4] = { .instructions = { &g_instructions[127], &g_instructions[136], }, .count = 2U }, + [0x4b5] = { .instructions = { &g_instructions[127], &g_instructions[136], }, .count = 2U }, + [0x4b6] = { .instructions = { &g_instructions[127], &g_instructions[136], }, .count = 2U }, + [0x4b7] = { .instructions = { &g_instructions[127], &g_instructions[136], }, .count = 2U }, + [0x4b8] = { .instructions = { &g_instructions[127], &g_instructions[136], }, .count = 2U }, + [0x4b9] = { .instructions = { &g_instructions[127], &g_instructions[136], }, .count = 2U }, + [0x4ba] = { .instructions = { &g_instructions[127], &g_instructions[136], }, .count = 2U }, + [0x4bb] = { .instructions = { &g_instructions[127], &g_instructions[136], }, .count = 2U }, + [0x4bc] = { .instructions = { &g_instructions[127], &g_instructions[136], }, .count = 2U }, + [0x4bd] = { .instructions = { &g_instructions[127], &g_instructions[136], }, .count = 2U }, + [0x4be] = { .instructions = { &g_instructions[127], &g_instructions[136], }, .count = 2U }, + [0x4bf] = { .instructions = { &g_instructions[127], &g_instructions[136], }, .count = 2U }, + [0x4c0] = { .instructions = { &g_instructions[155], }, .count = 1U }, + [0x4c1] = { .instructions = { &g_instructions[155], }, .count = 1U }, + [0x4c2] = { .instructions = { &g_instructions[155], }, .count = 1U }, + [0x4c3] = { .instructions = { &g_instructions[155], }, .count = 1U }, + [0x4c4] = { .instructions = { &g_instructions[155], }, .count = 1U }, + [0x4c5] = { .instructions = { &g_instructions[155], }, .count = 1U }, + [0x4c6] = { .instructions = { &g_instructions[155], }, .count = 1U }, + [0x4c7] = { .instructions = { &g_instructions[155], }, .count = 1U }, + [0x4c8] = { .instructions = { &g_instructions[155], }, .count = 1U }, + [0x4c9] = { .instructions = { &g_instructions[155], }, .count = 1U }, + [0x4ca] = { .instructions = { &g_instructions[155], }, .count = 1U }, + [0x4cb] = { .instructions = { &g_instructions[155], }, .count = 1U }, + [0x4cc] = { .instructions = { &g_instructions[155], }, .count = 1U }, + [0x4cd] = { .instructions = { &g_instructions[155], }, .count = 1U }, + [0x4ce] = { .instructions = { &g_instructions[155], }, .count = 1U }, + [0x4cf] = { .instructions = { &g_instructions[155], }, .count = 1U }, + [0x4d0] = { .instructions = { &g_instructions[139], }, .count = 1U }, + [0x4d1] = { .instructions = { &g_instructions[139], }, .count = 1U }, + [0x4d2] = { .instructions = { &g_instructions[139], }, .count = 1U }, + [0x4d3] = { .instructions = { &g_instructions[139], }, .count = 1U }, + [0x4d4] = { .instructions = { &g_instructions[139], }, .count = 1U }, + [0x4d5] = { .instructions = { &g_instructions[139], }, .count = 1U }, + [0x4d6] = { .instructions = { &g_instructions[139], }, .count = 1U }, + [0x4d7] = { .instructions = { &g_instructions[139], }, .count = 1U }, + [0x4d8] = { .instructions = { &g_instructions[139], }, .count = 1U }, + [0x4d9] = { .instructions = { &g_instructions[139], }, .count = 1U }, + [0x4da] = { .instructions = { &g_instructions[139], }, .count = 1U }, + [0x4db] = { .instructions = { &g_instructions[139], }, .count = 1U }, + [0x4dc] = { .instructions = { &g_instructions[139], }, .count = 1U }, + [0x4dd] = { .instructions = { &g_instructions[139], }, .count = 1U }, + [0x4de] = { .instructions = { &g_instructions[139], }, .count = 1U }, + [0x4df] = { .instructions = { &g_instructions[139], }, .count = 1U }, + [0x4e0] = { .instructions = { &g_instructions[129], &g_instructions[155], }, .count = 2U }, + [0x4e1] = { .instructions = { &g_instructions[129], &g_instructions[155], }, .count = 2U }, + [0x4e2] = { .instructions = { &g_instructions[129], &g_instructions[155], }, .count = 2U }, + [0x4e3] = { .instructions = { &g_instructions[129], &g_instructions[155], }, .count = 2U }, + [0x4e4] = { .instructions = { &g_instructions[129], &g_instructions[155], }, .count = 2U }, + [0x4e5] = { .instructions = { &g_instructions[129], &g_instructions[155], }, .count = 2U }, + [0x4e6] = { .instructions = { &g_instructions[129], &g_instructions[155], }, .count = 2U }, + [0x4e7] = { .instructions = { &g_instructions[129], &g_instructions[155], }, .count = 2U }, + [0x4e8] = { .instructions = { &g_instructions[129], &g_instructions[155], }, .count = 2U }, + [0x4e9] = { .instructions = { &g_instructions[129], &g_instructions[155], }, .count = 2U }, + [0x4ea] = { .instructions = { &g_instructions[129], &g_instructions[155], }, .count = 2U }, + [0x4eb] = { .instructions = { &g_instructions[129], &g_instructions[155], }, .count = 2U }, + [0x4ec] = { .instructions = { &g_instructions[129], &g_instructions[155], }, .count = 2U }, + [0x4ed] = { .instructions = { &g_instructions[129], &g_instructions[155], }, .count = 2U }, + [0x4ee] = { .instructions = { &g_instructions[129], &g_instructions[155], }, .count = 2U }, + [0x4ef] = { .instructions = { &g_instructions[129], &g_instructions[155], }, .count = 2U }, + [0x4f0] = { .instructions = { &g_instructions[118], &g_instructions[139], }, .count = 2U }, + [0x4f1] = { .instructions = { &g_instructions[118], &g_instructions[139], }, .count = 2U }, + [0x4f2] = { .instructions = { &g_instructions[118], &g_instructions[139], }, .count = 2U }, + [0x4f3] = { .instructions = { &g_instructions[118], &g_instructions[139], }, .count = 2U }, + [0x4f4] = { .instructions = { &g_instructions[118], &g_instructions[139], }, .count = 2U }, + [0x4f5] = { .instructions = { &g_instructions[118], &g_instructions[139], }, .count = 2U }, + [0x4f6] = { .instructions = { &g_instructions[118], &g_instructions[139], }, .count = 2U }, + [0x4f7] = { .instructions = { &g_instructions[118], &g_instructions[139], }, .count = 2U }, + [0x4f8] = { .instructions = { &g_instructions[118], &g_instructions[139], }, .count = 2U }, + [0x4f9] = { .instructions = { &g_instructions[118], &g_instructions[139], }, .count = 2U }, + [0x4fa] = { .instructions = { &g_instructions[118], &g_instructions[139], }, .count = 2U }, + [0x4fb] = { .instructions = { &g_instructions[118], &g_instructions[139], }, .count = 2U }, + [0x4fc] = { .instructions = { &g_instructions[118], &g_instructions[139], }, .count = 2U }, + [0x4fd] = { .instructions = { &g_instructions[118], &g_instructions[139], }, .count = 2U }, + [0x4fe] = { .instructions = { &g_instructions[118], &g_instructions[139], }, .count = 2U }, + [0x4ff] = { .instructions = { &g_instructions[118], &g_instructions[139], }, .count = 2U }, + [0x500] = { .instructions = { &g_instructions[153], }, .count = 1U }, + [0x501] = { .instructions = { &g_instructions[153], }, .count = 1U }, + [0x502] = { .instructions = { &g_instructions[153], }, .count = 1U }, + [0x503] = { .instructions = { &g_instructions[153], }, .count = 1U }, + [0x504] = { .instructions = { &g_instructions[153], }, .count = 1U }, + [0x505] = { .instructions = { &g_instructions[153], }, .count = 1U }, + [0x506] = { .instructions = { &g_instructions[153], }, .count = 1U }, + [0x507] = { .instructions = { &g_instructions[153], }, .count = 1U }, + [0x508] = { .instructions = { &g_instructions[153], }, .count = 1U }, + [0x509] = { .instructions = { &g_instructions[153], }, .count = 1U }, + [0x50a] = { .instructions = { &g_instructions[153], }, .count = 1U }, + [0x50b] = { .instructions = { &g_instructions[153], }, .count = 1U }, + [0x50c] = { .instructions = { &g_instructions[153], }, .count = 1U }, + [0x50d] = { .instructions = { &g_instructions[153], }, .count = 1U }, + [0x50e] = { .instructions = { &g_instructions[153], }, .count = 1U }, + [0x50f] = { .instructions = { &g_instructions[153], }, .count = 1U }, + [0x510] = { .instructions = { &g_instructions[85], &g_instructions[135], &g_instructions[136], }, .count = 3U }, + [0x511] = { .instructions = { &g_instructions[85], &g_instructions[135], &g_instructions[136], }, .count = 3U }, + [0x512] = { .instructions = { &g_instructions[85], &g_instructions[135], &g_instructions[136], }, .count = 3U }, + [0x513] = { .instructions = { &g_instructions[85], &g_instructions[135], &g_instructions[136], }, .count = 3U }, + [0x514] = { .instructions = { &g_instructions[85], &g_instructions[135], &g_instructions[136], }, .count = 3U }, + [0x515] = { .instructions = { &g_instructions[85], &g_instructions[135], &g_instructions[136], }, .count = 3U }, + [0x516] = { .instructions = { &g_instructions[85], &g_instructions[135], &g_instructions[136], }, .count = 3U }, + [0x517] = { .instructions = { &g_instructions[85], &g_instructions[135], &g_instructions[136], }, .count = 3U }, + [0x518] = { .instructions = { &g_instructions[85], &g_instructions[135], &g_instructions[136], }, .count = 3U }, + [0x519] = { .instructions = { &g_instructions[85], &g_instructions[135], &g_instructions[136], }, .count = 3U }, + [0x51a] = { .instructions = { &g_instructions[85], &g_instructions[135], &g_instructions[136], }, .count = 3U }, + [0x51b] = { .instructions = { &g_instructions[85], &g_instructions[135], &g_instructions[136], }, .count = 3U }, + [0x51c] = { .instructions = { &g_instructions[85], &g_instructions[135], &g_instructions[136], }, .count = 3U }, + [0x51d] = { .instructions = { &g_instructions[85], &g_instructions[135], &g_instructions[136], }, .count = 3U }, + [0x51e] = { .instructions = { &g_instructions[85], &g_instructions[135], &g_instructions[136], }, .count = 3U }, + [0x51f] = { .instructions = { &g_instructions[85], &g_instructions[135], &g_instructions[136], }, .count = 3U }, + [0x520] = { .instructions = { &g_instructions[153], }, .count = 1U }, + [0x521] = { .instructions = { &g_instructions[153], }, .count = 1U }, + [0x522] = { .instructions = { &g_instructions[153], }, .count = 1U }, + [0x523] = { .instructions = { &g_instructions[153], }, .count = 1U }, + [0x524] = { .instructions = { &g_instructions[153], }, .count = 1U }, + [0x525] = { .instructions = { &g_instructions[153], }, .count = 1U }, + [0x526] = { .instructions = { &g_instructions[153], }, .count = 1U }, + [0x527] = { .instructions = { &g_instructions[153], }, .count = 1U }, + [0x528] = { .instructions = { &g_instructions[153], }, .count = 1U }, + [0x529] = { .instructions = { &g_instructions[153], }, .count = 1U }, + [0x52a] = { .instructions = { &g_instructions[153], }, .count = 1U }, + [0x52b] = { .instructions = { &g_instructions[153], }, .count = 1U }, + [0x52c] = { .instructions = { &g_instructions[153], }, .count = 1U }, + [0x52d] = { .instructions = { &g_instructions[153], }, .count = 1U }, + [0x52e] = { .instructions = { &g_instructions[153], }, .count = 1U }, + [0x52f] = { .instructions = { &g_instructions[153], }, .count = 1U }, + [0x530] = { .instructions = { &g_instructions[136], }, .count = 1U }, + [0x531] = { .instructions = { &g_instructions[136], }, .count = 1U }, + [0x532] = { .instructions = { &g_instructions[136], }, .count = 1U }, + [0x533] = { .instructions = { &g_instructions[136], }, .count = 1U }, + [0x534] = { .instructions = { &g_instructions[136], }, .count = 1U }, + [0x535] = { .instructions = { &g_instructions[136], }, .count = 1U }, + [0x536] = { .instructions = { &g_instructions[136], }, .count = 1U }, + [0x537] = { .instructions = { &g_instructions[136], }, .count = 1U }, + [0x538] = { .instructions = { &g_instructions[136], }, .count = 1U }, + [0x539] = { .instructions = { &g_instructions[136], }, .count = 1U }, + [0x53a] = { .instructions = { &g_instructions[136], }, .count = 1U }, + [0x53b] = { .instructions = { &g_instructions[136], }, .count = 1U }, + [0x53c] = { .instructions = { &g_instructions[136], }, .count = 1U }, + [0x53d] = { .instructions = { &g_instructions[136], }, .count = 1U }, + [0x53e] = { .instructions = { &g_instructions[136], }, .count = 1U }, + [0x53f] = { .instructions = { &g_instructions[136], }, .count = 1U }, + [0x540] = { .instructions = { &g_instructions[155], }, .count = 1U }, + [0x541] = { .instructions = { &g_instructions[155], }, .count = 1U }, + [0x542] = { .instructions = { &g_instructions[155], }, .count = 1U }, + [0x543] = { .instructions = { &g_instructions[155], }, .count = 1U }, + [0x544] = { .instructions = { &g_instructions[155], }, .count = 1U }, + [0x545] = { .instructions = { &g_instructions[155], }, .count = 1U }, + [0x546] = { .instructions = { &g_instructions[155], }, .count = 1U }, + [0x547] = { .instructions = { &g_instructions[155], }, .count = 1U }, + [0x548] = { .instructions = { &g_instructions[155], }, .count = 1U }, + [0x549] = { .instructions = { &g_instructions[155], }, .count = 1U }, + [0x54a] = { .instructions = { &g_instructions[155], }, .count = 1U }, + [0x54b] = { .instructions = { &g_instructions[155], }, .count = 1U }, + [0x54c] = { .instructions = { &g_instructions[155], }, .count = 1U }, + [0x54d] = { .instructions = { &g_instructions[155], }, .count = 1U }, + [0x54e] = { .instructions = { &g_instructions[155], }, .count = 1U }, + [0x54f] = { .instructions = { &g_instructions[155], }, .count = 1U }, + [0x550] = { .instructions = { &g_instructions[85], &g_instructions[138], &g_instructions[139], }, .count = 3U }, + [0x551] = { .instructions = { &g_instructions[85], &g_instructions[138], &g_instructions[139], }, .count = 3U }, + [0x552] = { .instructions = { &g_instructions[85], &g_instructions[138], &g_instructions[139], }, .count = 3U }, + [0x553] = { .instructions = { &g_instructions[85], &g_instructions[138], &g_instructions[139], }, .count = 3U }, + [0x554] = { .instructions = { &g_instructions[85], &g_instructions[138], &g_instructions[139], }, .count = 3U }, + [0x555] = { .instructions = { &g_instructions[85], &g_instructions[138], &g_instructions[139], }, .count = 3U }, + [0x556] = { .instructions = { &g_instructions[85], &g_instructions[138], &g_instructions[139], }, .count = 3U }, + [0x557] = { .instructions = { &g_instructions[85], &g_instructions[138], &g_instructions[139], }, .count = 3U }, + [0x558] = { .instructions = { &g_instructions[85], &g_instructions[138], &g_instructions[139], }, .count = 3U }, + [0x559] = { .instructions = { &g_instructions[85], &g_instructions[138], &g_instructions[139], }, .count = 3U }, + [0x55a] = { .instructions = { &g_instructions[85], &g_instructions[138], &g_instructions[139], }, .count = 3U }, + [0x55b] = { .instructions = { &g_instructions[85], &g_instructions[138], &g_instructions[139], }, .count = 3U }, + [0x55c] = { .instructions = { &g_instructions[85], &g_instructions[138], &g_instructions[139], }, .count = 3U }, + [0x55d] = { .instructions = { &g_instructions[85], &g_instructions[138], &g_instructions[139], }, .count = 3U }, + [0x55e] = { .instructions = { &g_instructions[85], &g_instructions[138], &g_instructions[139], }, .count = 3U }, + [0x55f] = { .instructions = { &g_instructions[85], &g_instructions[138], &g_instructions[139], }, .count = 3U }, + [0x560] = { .instructions = { &g_instructions[155], }, .count = 1U }, + [0x561] = { .instructions = { &g_instructions[155], }, .count = 1U }, + [0x562] = { .instructions = { &g_instructions[155], }, .count = 1U }, + [0x563] = { .instructions = { &g_instructions[155], }, .count = 1U }, + [0x564] = { .instructions = { &g_instructions[155], }, .count = 1U }, + [0x565] = { .instructions = { &g_instructions[155], }, .count = 1U }, + [0x566] = { .instructions = { &g_instructions[155], }, .count = 1U }, + [0x567] = { .instructions = { &g_instructions[155], }, .count = 1U }, + [0x568] = { .instructions = { &g_instructions[155], }, .count = 1U }, + [0x569] = { .instructions = { &g_instructions[155], }, .count = 1U }, + [0x56a] = { .instructions = { &g_instructions[155], }, .count = 1U }, + [0x56b] = { .instructions = { &g_instructions[155], }, .count = 1U }, + [0x56c] = { .instructions = { &g_instructions[155], }, .count = 1U }, + [0x56d] = { .instructions = { &g_instructions[155], }, .count = 1U }, + [0x56e] = { .instructions = { &g_instructions[155], }, .count = 1U }, + [0x56f] = { .instructions = { &g_instructions[155], }, .count = 1U }, + [0x570] = { .instructions = { &g_instructions[139], }, .count = 1U }, + [0x571] = { .instructions = { &g_instructions[93], &g_instructions[139], }, .count = 2U }, + [0x572] = { .instructions = { &g_instructions[139], }, .count = 1U }, + [0x573] = { .instructions = { &g_instructions[139], }, .count = 1U }, + [0x574] = { .instructions = { &g_instructions[1], &g_instructions[139], }, .count = 2U }, + [0x575] = { .instructions = { &g_instructions[0], &g_instructions[139], }, .count = 2U }, + [0x576] = { .instructions = { &g_instructions[2], &g_instructions[139], }, .count = 2U }, + [0x577] = { .instructions = { &g_instructions[139], }, .count = 1U }, + [0x578] = { .instructions = { &g_instructions[139], }, .count = 1U }, + [0x579] = { .instructions = { &g_instructions[139], }, .count = 1U }, + [0x57a] = { .instructions = { &g_instructions[139], }, .count = 1U }, + [0x57b] = { .instructions = { &g_instructions[139], }, .count = 1U }, + [0x57c] = { .instructions = { &g_instructions[139], }, .count = 1U }, + [0x57d] = { .instructions = { &g_instructions[139], }, .count = 1U }, + [0x57e] = { .instructions = { &g_instructions[139], }, .count = 1U }, + [0x57f] = { .instructions = { &g_instructions[139], }, .count = 1U }, + [0x580] = { .instructions = { &g_instructions[153], }, .count = 1U }, + [0x581] = { .instructions = { &g_instructions[153], }, .count = 1U }, + [0x582] = { .instructions = { &g_instructions[153], }, .count = 1U }, + [0x583] = { .instructions = { &g_instructions[153], }, .count = 1U }, + [0x584] = { .instructions = { &g_instructions[153], }, .count = 1U }, + [0x585] = { .instructions = { &g_instructions[153], }, .count = 1U }, + [0x586] = { .instructions = { &g_instructions[153], }, .count = 1U }, + [0x587] = { .instructions = { &g_instructions[153], }, .count = 1U }, + [0x588] = { .instructions = { &g_instructions[153], }, .count = 1U }, + [0x589] = { .instructions = { &g_instructions[153], }, .count = 1U }, + [0x58a] = { .instructions = { &g_instructions[153], }, .count = 1U }, + [0x58b] = { .instructions = { &g_instructions[153], }, .count = 1U }, + [0x58c] = { .instructions = { &g_instructions[153], }, .count = 1U }, + [0x58d] = { .instructions = { &g_instructions[153], }, .count = 1U }, + [0x58e] = { .instructions = { &g_instructions[153], }, .count = 1U }, + [0x58f] = { .instructions = { &g_instructions[153], }, .count = 1U }, + [0x590] = { .instructions = { &g_instructions[85], &g_instructions[135], &g_instructions[136], }, .count = 3U }, + [0x591] = { .instructions = { &g_instructions[85], &g_instructions[135], &g_instructions[136], }, .count = 3U }, + [0x592] = { .instructions = { &g_instructions[85], &g_instructions[135], &g_instructions[136], }, .count = 3U }, + [0x593] = { .instructions = { &g_instructions[85], &g_instructions[135], &g_instructions[136], }, .count = 3U }, + [0x594] = { .instructions = { &g_instructions[85], &g_instructions[135], &g_instructions[136], }, .count = 3U }, + [0x595] = { .instructions = { &g_instructions[85], &g_instructions[135], &g_instructions[136], }, .count = 3U }, + [0x596] = { .instructions = { &g_instructions[85], &g_instructions[135], &g_instructions[136], }, .count = 3U }, + [0x597] = { .instructions = { &g_instructions[85], &g_instructions[135], &g_instructions[136], }, .count = 3U }, + [0x598] = { .instructions = { &g_instructions[85], &g_instructions[135], &g_instructions[136], }, .count = 3U }, + [0x599] = { .instructions = { &g_instructions[85], &g_instructions[135], &g_instructions[136], }, .count = 3U }, + [0x59a] = { .instructions = { &g_instructions[85], &g_instructions[135], &g_instructions[136], }, .count = 3U }, + [0x59b] = { .instructions = { &g_instructions[85], &g_instructions[135], &g_instructions[136], }, .count = 3U }, + [0x59c] = { .instructions = { &g_instructions[85], &g_instructions[135], &g_instructions[136], }, .count = 3U }, + [0x59d] = { .instructions = { &g_instructions[85], &g_instructions[135], &g_instructions[136], }, .count = 3U }, + [0x59e] = { .instructions = { &g_instructions[85], &g_instructions[135], &g_instructions[136], }, .count = 3U }, + [0x59f] = { .instructions = { &g_instructions[85], &g_instructions[135], &g_instructions[136], }, .count = 3U }, + [0x5a0] = { .instructions = { &g_instructions[153], }, .count = 1U }, + [0x5a1] = { .instructions = { &g_instructions[153], }, .count = 1U }, + [0x5a2] = { .instructions = { &g_instructions[153], }, .count = 1U }, + [0x5a3] = { .instructions = { &g_instructions[153], }, .count = 1U }, + [0x5a4] = { .instructions = { &g_instructions[153], }, .count = 1U }, + [0x5a5] = { .instructions = { &g_instructions[153], }, .count = 1U }, + [0x5a6] = { .instructions = { &g_instructions[153], }, .count = 1U }, + [0x5a7] = { .instructions = { &g_instructions[153], }, .count = 1U }, + [0x5a8] = { .instructions = { &g_instructions[153], }, .count = 1U }, + [0x5a9] = { .instructions = { &g_instructions[153], }, .count = 1U }, + [0x5aa] = { .instructions = { &g_instructions[153], }, .count = 1U }, + [0x5ab] = { .instructions = { &g_instructions[153], }, .count = 1U }, + [0x5ac] = { .instructions = { &g_instructions[153], }, .count = 1U }, + [0x5ad] = { .instructions = { &g_instructions[153], }, .count = 1U }, + [0x5ae] = { .instructions = { &g_instructions[153], }, .count = 1U }, + [0x5af] = { .instructions = { &g_instructions[153], }, .count = 1U }, + [0x5b0] = { .instructions = { &g_instructions[136], }, .count = 1U }, + [0x5b1] = { .instructions = { &g_instructions[136], }, .count = 1U }, + [0x5b2] = { .instructions = { &g_instructions[136], }, .count = 1U }, + [0x5b3] = { .instructions = { &g_instructions[136], }, .count = 1U }, + [0x5b4] = { .instructions = { &g_instructions[136], }, .count = 1U }, + [0x5b5] = { .instructions = { &g_instructions[136], }, .count = 1U }, + [0x5b6] = { .instructions = { &g_instructions[136], }, .count = 1U }, + [0x5b7] = { .instructions = { &g_instructions[136], }, .count = 1U }, + [0x5b8] = { .instructions = { &g_instructions[136], }, .count = 1U }, + [0x5b9] = { .instructions = { &g_instructions[136], }, .count = 1U }, + [0x5ba] = { .instructions = { &g_instructions[136], }, .count = 1U }, + [0x5bb] = { .instructions = { &g_instructions[136], }, .count = 1U }, + [0x5bc] = { .instructions = { &g_instructions[136], }, .count = 1U }, + [0x5bd] = { .instructions = { &g_instructions[136], }, .count = 1U }, + [0x5be] = { .instructions = { &g_instructions[136], }, .count = 1U }, + [0x5bf] = { .instructions = { &g_instructions[136], }, .count = 1U }, + [0x5c0] = { .instructions = { &g_instructions[155], }, .count = 1U }, + [0x5c1] = { .instructions = { &g_instructions[155], }, .count = 1U }, + [0x5c2] = { .instructions = { &g_instructions[155], }, .count = 1U }, + [0x5c3] = { .instructions = { &g_instructions[155], }, .count = 1U }, + [0x5c4] = { .instructions = { &g_instructions[155], }, .count = 1U }, + [0x5c5] = { .instructions = { &g_instructions[155], }, .count = 1U }, + [0x5c6] = { .instructions = { &g_instructions[155], }, .count = 1U }, + [0x5c7] = { .instructions = { &g_instructions[155], }, .count = 1U }, + [0x5c8] = { .instructions = { &g_instructions[155], }, .count = 1U }, + [0x5c9] = { .instructions = { &g_instructions[155], }, .count = 1U }, + [0x5ca] = { .instructions = { &g_instructions[155], }, .count = 1U }, + [0x5cb] = { .instructions = { &g_instructions[155], }, .count = 1U }, + [0x5cc] = { .instructions = { &g_instructions[155], }, .count = 1U }, + [0x5cd] = { .instructions = { &g_instructions[155], }, .count = 1U }, + [0x5ce] = { .instructions = { &g_instructions[155], }, .count = 1U }, + [0x5cf] = { .instructions = { &g_instructions[155], }, .count = 1U }, + [0x5d0] = { .instructions = { &g_instructions[85], &g_instructions[138], &g_instructions[139], }, .count = 3U }, + [0x5d1] = { .instructions = { &g_instructions[85], &g_instructions[138], &g_instructions[139], }, .count = 3U }, + [0x5d2] = { .instructions = { &g_instructions[85], &g_instructions[138], &g_instructions[139], }, .count = 3U }, + [0x5d3] = { .instructions = { &g_instructions[85], &g_instructions[138], &g_instructions[139], }, .count = 3U }, + [0x5d4] = { .instructions = { &g_instructions[85], &g_instructions[138], &g_instructions[139], }, .count = 3U }, + [0x5d5] = { .instructions = { &g_instructions[85], &g_instructions[138], &g_instructions[139], }, .count = 3U }, + [0x5d6] = { .instructions = { &g_instructions[85], &g_instructions[138], &g_instructions[139], }, .count = 3U }, + [0x5d7] = { .instructions = { &g_instructions[85], &g_instructions[138], &g_instructions[139], }, .count = 3U }, + [0x5d8] = { .instructions = { &g_instructions[85], &g_instructions[138], &g_instructions[139], }, .count = 3U }, + [0x5d9] = { .instructions = { &g_instructions[85], &g_instructions[138], &g_instructions[139], }, .count = 3U }, + [0x5da] = { .instructions = { &g_instructions[85], &g_instructions[138], &g_instructions[139], }, .count = 3U }, + [0x5db] = { .instructions = { &g_instructions[85], &g_instructions[138], &g_instructions[139], }, .count = 3U }, + [0x5dc] = { .instructions = { &g_instructions[85], &g_instructions[138], &g_instructions[139], }, .count = 3U }, + [0x5dd] = { .instructions = { &g_instructions[85], &g_instructions[138], &g_instructions[139], }, .count = 3U }, + [0x5de] = { .instructions = { &g_instructions[85], &g_instructions[138], &g_instructions[139], }, .count = 3U }, + [0x5df] = { .instructions = { &g_instructions[85], &g_instructions[138], &g_instructions[139], }, .count = 3U }, + [0x5e0] = { .instructions = { &g_instructions[155], }, .count = 1U }, + [0x5e1] = { .instructions = { &g_instructions[155], }, .count = 1U }, + [0x5e2] = { .instructions = { &g_instructions[155], }, .count = 1U }, + [0x5e3] = { .instructions = { &g_instructions[155], }, .count = 1U }, + [0x5e4] = { .instructions = { &g_instructions[155], }, .count = 1U }, + [0x5e5] = { .instructions = { &g_instructions[155], }, .count = 1U }, + [0x5e6] = { .instructions = { &g_instructions[155], }, .count = 1U }, + [0x5e7] = { .instructions = { &g_instructions[155], }, .count = 1U }, + [0x5e8] = { .instructions = { &g_instructions[155], }, .count = 1U }, + [0x5e9] = { .instructions = { &g_instructions[155], }, .count = 1U }, + [0x5ea] = { .instructions = { &g_instructions[155], }, .count = 1U }, + [0x5eb] = { .instructions = { &g_instructions[155], }, .count = 1U }, + [0x5ec] = { .instructions = { &g_instructions[155], }, .count = 1U }, + [0x5ed] = { .instructions = { &g_instructions[155], }, .count = 1U }, + [0x5ee] = { .instructions = { &g_instructions[155], }, .count = 1U }, + [0x5ef] = { .instructions = { &g_instructions[155], }, .count = 1U }, + [0x5f0] = { .instructions = { &g_instructions[139], }, .count = 1U }, + [0x5f1] = { .instructions = { &g_instructions[139], }, .count = 1U }, + [0x5f2] = { .instructions = { &g_instructions[139], }, .count = 1U }, + [0x5f3] = { .instructions = { &g_instructions[139], }, .count = 1U }, + [0x5f4] = { .instructions = { &g_instructions[139], }, .count = 1U }, + [0x5f5] = { .instructions = { &g_instructions[139], }, .count = 1U }, + [0x5f6] = { .instructions = { &g_instructions[139], }, .count = 1U }, + [0x5f7] = { .instructions = { &g_instructions[139], }, .count = 1U }, + [0x5f8] = { .instructions = { &g_instructions[139], }, .count = 1U }, + [0x5f9] = { .instructions = { &g_instructions[139], }, .count = 1U }, + [0x5fa] = { .instructions = { &g_instructions[139], }, .count = 1U }, + [0x5fb] = { .instructions = { &g_instructions[139], }, .count = 1U }, + [0x5fc] = { .instructions = { &g_instructions[139], }, .count = 1U }, + [0x5fd] = { .instructions = { &g_instructions[139], }, .count = 1U }, + [0x5fe] = { .instructions = { &g_instructions[139], }, .count = 1U }, + [0x5ff] = { .instructions = { &g_instructions[139], }, .count = 1U }, + [0x600] = { .instructions = { &g_instructions[154], }, .count = 1U }, + [0x602] = { .instructions = { &g_instructions[154], }, .count = 1U }, + [0x604] = { .instructions = { &g_instructions[154], }, .count = 1U }, + [0x606] = { .instructions = { &g_instructions[154], }, .count = 1U }, + [0x608] = { .instructions = { &g_instructions[154], }, .count = 1U }, + [0x60a] = { .instructions = { &g_instructions[154], }, .count = 1U }, + [0x60c] = { .instructions = { &g_instructions[154], }, .count = 1U }, + [0x60e] = { .instructions = { &g_instructions[154], }, .count = 1U }, + [0x610] = { .instructions = { &g_instructions[137], }, .count = 1U }, + [0x611] = { .instructions = { &g_instructions[217], }, .count = 1U }, + [0x612] = { .instructions = { &g_instructions[137], }, .count = 1U }, + [0x613] = { .instructions = { &g_instructions[218], }, .count = 1U }, + [0x614] = { .instructions = { &g_instructions[137], }, .count = 1U }, + [0x615] = { .instructions = { &g_instructions[219], }, .count = 1U }, + [0x616] = { .instructions = { &g_instructions[137], }, .count = 1U }, + [0x617] = { .instructions = { &g_instructions[221], }, .count = 1U }, + [0x618] = { .instructions = { &g_instructions[137], }, .count = 1U }, + [0x619] = { .instructions = { &g_instructions[216], }, .count = 1U }, + [0x61a] = { .instructions = { &g_instructions[137], }, .count = 1U }, + [0x61c] = { .instructions = { &g_instructions[137], }, .count = 1U }, + [0x61e] = { .instructions = { &g_instructions[137], }, .count = 1U }, + [0x61f] = { .instructions = { &g_instructions[220], }, .count = 1U }, + [0x620] = { .instructions = { &g_instructions[134], &g_instructions[154], }, .count = 2U }, + [0x621] = { .instructions = { &g_instructions[229], }, .count = 1U }, + [0x622] = { .instructions = { &g_instructions[134], &g_instructions[154], }, .count = 2U }, + [0x623] = { .instructions = { &g_instructions[230], }, .count = 1U }, + [0x624] = { .instructions = { &g_instructions[134], &g_instructions[154], }, .count = 2U }, + [0x625] = { .instructions = { &g_instructions[231], }, .count = 1U }, + [0x626] = { .instructions = { &g_instructions[134], &g_instructions[154], }, .count = 2U }, + [0x627] = { .instructions = { &g_instructions[233], }, .count = 1U }, + [0x628] = { .instructions = { &g_instructions[134], &g_instructions[154], }, .count = 2U }, + [0x629] = { .instructions = { &g_instructions[228], }, .count = 1U }, + [0x62a] = { .instructions = { &g_instructions[134], &g_instructions[154], }, .count = 2U }, + [0x62c] = { .instructions = { &g_instructions[134], &g_instructions[154], }, .count = 2U }, + [0x62e] = { .instructions = { &g_instructions[134], &g_instructions[154], }, .count = 2U }, + [0x62f] = { .instructions = { &g_instructions[232], }, .count = 1U }, + [0x630] = { .instructions = { &g_instructions[128], &g_instructions[137], }, .count = 2U }, + [0x631] = { .instructions = { &g_instructions[241], }, .count = 1U }, + [0x632] = { .instructions = { &g_instructions[128], &g_instructions[137], }, .count = 2U }, + [0x633] = { .instructions = { &g_instructions[242], }, .count = 1U }, + [0x634] = { .instructions = { &g_instructions[128], &g_instructions[137], }, .count = 2U }, + [0x635] = { .instructions = { &g_instructions[243], }, .count = 1U }, + [0x636] = { .instructions = { &g_instructions[128], &g_instructions[137], }, .count = 2U }, + [0x637] = { .instructions = { &g_instructions[245], }, .count = 1U }, + [0x638] = { .instructions = { &g_instructions[128], &g_instructions[137], }, .count = 2U }, + [0x639] = { .instructions = { &g_instructions[240], }, .count = 1U }, + [0x63a] = { .instructions = { &g_instructions[128], &g_instructions[137], }, .count = 2U }, + [0x63c] = { .instructions = { &g_instructions[128], &g_instructions[137], }, .count = 2U }, + [0x63e] = { .instructions = { &g_instructions[128], &g_instructions[137], }, .count = 2U }, + [0x63f] = { .instructions = { &g_instructions[244], }, .count = 1U }, + [0x640] = { .instructions = { &g_instructions[156], }, .count = 1U }, + [0x642] = { .instructions = { &g_instructions[156], }, .count = 1U }, + [0x644] = { .instructions = { &g_instructions[156], }, .count = 1U }, + [0x646] = { .instructions = { &g_instructions[156], }, .count = 1U }, + [0x648] = { .instructions = { &g_instructions[156], }, .count = 1U }, + [0x64a] = { .instructions = { &g_instructions[156], }, .count = 1U }, + [0x64c] = { .instructions = { &g_instructions[156], }, .count = 1U }, + [0x64e] = { .instructions = { &g_instructions[156], }, .count = 1U }, + [0x650] = { .instructions = { &g_instructions[140], }, .count = 1U }, + [0x651] = { .instructions = { &g_instructions[223], }, .count = 1U }, + [0x652] = { .instructions = { &g_instructions[140], }, .count = 1U }, + [0x653] = { .instructions = { &g_instructions[224], }, .count = 1U }, + [0x654] = { .instructions = { &g_instructions[140], }, .count = 1U }, + [0x655] = { .instructions = { &g_instructions[225], }, .count = 1U }, + [0x656] = { .instructions = { &g_instructions[140], }, .count = 1U }, + [0x657] = { .instructions = { &g_instructions[227], }, .count = 1U }, + [0x658] = { .instructions = { &g_instructions[140], }, .count = 1U }, + [0x659] = { .instructions = { &g_instructions[222], }, .count = 1U }, + [0x65a] = { .instructions = { &g_instructions[140], }, .count = 1U }, + [0x65c] = { .instructions = { &g_instructions[140], }, .count = 1U }, + [0x65e] = { .instructions = { &g_instructions[140], }, .count = 1U }, + [0x65f] = { .instructions = { &g_instructions[226], }, .count = 1U }, + [0x660] = { .instructions = { &g_instructions[130], &g_instructions[156], }, .count = 2U }, + [0x661] = { .instructions = { &g_instructions[235], }, .count = 1U }, + [0x662] = { .instructions = { &g_instructions[130], &g_instructions[156], }, .count = 2U }, + [0x663] = { .instructions = { &g_instructions[236], }, .count = 1U }, + [0x664] = { .instructions = { &g_instructions[130], &g_instructions[156], }, .count = 2U }, + [0x665] = { .instructions = { &g_instructions[237], }, .count = 1U }, + [0x666] = { .instructions = { &g_instructions[130], &g_instructions[156], }, .count = 2U }, + [0x667] = { .instructions = { &g_instructions[239], }, .count = 1U }, + [0x668] = { .instructions = { &g_instructions[130], &g_instructions[156], }, .count = 2U }, + [0x669] = { .instructions = { &g_instructions[234], }, .count = 1U }, + [0x66a] = { .instructions = { &g_instructions[130], &g_instructions[156], }, .count = 2U }, + [0x66c] = { .instructions = { &g_instructions[130], &g_instructions[156], }, .count = 2U }, + [0x66e] = { .instructions = { &g_instructions[130], &g_instructions[156], }, .count = 2U }, + [0x66f] = { .instructions = { &g_instructions[238], }, .count = 1U }, + [0x670] = { .instructions = { &g_instructions[119], &g_instructions[140], }, .count = 2U }, + [0x671] = { .instructions = { &g_instructions[247], }, .count = 1U }, + [0x672] = { .instructions = { &g_instructions[119], &g_instructions[140], }, .count = 2U }, + [0x673] = { .instructions = { &g_instructions[248], }, .count = 1U }, + [0x674] = { .instructions = { &g_instructions[119], &g_instructions[140], }, .count = 2U }, + [0x675] = { .instructions = { &g_instructions[249], }, .count = 1U }, + [0x676] = { .instructions = { &g_instructions[119], &g_instructions[140], }, .count = 2U }, + [0x677] = { .instructions = { &g_instructions[251], }, .count = 1U }, + [0x678] = { .instructions = { &g_instructions[119], &g_instructions[140], }, .count = 2U }, + [0x679] = { .instructions = { &g_instructions[246], }, .count = 1U }, + [0x67a] = { .instructions = { &g_instructions[119], &g_instructions[140], }, .count = 2U }, + [0x67c] = { .instructions = { &g_instructions[119], &g_instructions[140], }, .count = 2U }, + [0x67e] = { .instructions = { &g_instructions[119], &g_instructions[140], }, .count = 2U }, + [0x67f] = { .instructions = { &g_instructions[250], }, .count = 1U }, + [0x680] = { .instructions = { &g_instructions[154], }, .count = 1U }, + [0x681] = { .instructions = { &g_instructions[182], }, .count = 1U }, + [0x682] = { .instructions = { &g_instructions[154], }, .count = 1U }, + [0x684] = { .instructions = { &g_instructions[154], }, .count = 1U }, + [0x685] = { .instructions = { &g_instructions[183], }, .count = 1U }, + [0x686] = { .instructions = { &g_instructions[154], }, .count = 1U }, + [0x687] = { .instructions = { &g_instructions[74], &g_instructions[77], }, .count = 2U }, + [0x688] = { .instructions = { &g_instructions[154], }, .count = 1U }, + [0x689] = { .instructions = { &g_instructions[182], }, .count = 1U }, + [0x68a] = { .instructions = { &g_instructions[154], }, .count = 1U }, + [0x68b] = { .instructions = { &g_instructions[178], }, .count = 1U }, + [0x68c] = { .instructions = { &g_instructions[154], }, .count = 1U }, + [0x68d] = { .instructions = { &g_instructions[183], }, .count = 1U }, + [0x68e] = { .instructions = { &g_instructions[154], }, .count = 1U }, + [0x690] = { .instructions = { &g_instructions[137], }, .count = 1U }, + [0x692] = { .instructions = { &g_instructions[137], }, .count = 1U }, + [0x694] = { .instructions = { &g_instructions[137], }, .count = 1U }, + [0x696] = { .instructions = { &g_instructions[137], }, .count = 1U }, + [0x698] = { .instructions = { &g_instructions[137], }, .count = 1U }, + [0x69a] = { .instructions = { &g_instructions[137], }, .count = 1U }, + [0x69c] = { .instructions = { &g_instructions[137], }, .count = 1U }, + [0x69e] = { .instructions = { &g_instructions[137], }, .count = 1U }, + [0x6a0] = { .instructions = { &g_instructions[134], &g_instructions[154], }, .count = 2U }, + [0x6a1] = { .instructions = { &g_instructions[188], }, .count = 1U }, + [0x6a2] = { .instructions = { &g_instructions[134], &g_instructions[154], }, .count = 2U }, + [0x6a3] = { .instructions = { &g_instructions[189], }, .count = 1U }, + [0x6a4] = { .instructions = { &g_instructions[134], &g_instructions[154], }, .count = 2U }, + [0x6a5] = { .instructions = { &g_instructions[188], }, .count = 1U }, + [0x6a6] = { .instructions = { &g_instructions[134], &g_instructions[154], }, .count = 2U }, + [0x6a7] = { .instructions = { &g_instructions[73], &g_instructions[76], }, .count = 2U }, + [0x6a8] = { .instructions = { &g_instructions[134], &g_instructions[154], }, .count = 2U }, + [0x6a9] = { .instructions = { &g_instructions[188], }, .count = 1U }, + [0x6aa] = { .instructions = { &g_instructions[134], &g_instructions[154], }, .count = 2U }, + [0x6ac] = { .instructions = { &g_instructions[134], &g_instructions[154], }, .count = 2U }, + [0x6ad] = { .instructions = { &g_instructions[188], }, .count = 1U }, + [0x6ae] = { .instructions = { &g_instructions[134], &g_instructions[154], }, .count = 2U }, + [0x6b0] = { .instructions = { &g_instructions[128], &g_instructions[137], }, .count = 2U }, + [0x6b1] = { .instructions = { &g_instructions[188], }, .count = 1U }, + [0x6b2] = { .instructions = { &g_instructions[128], &g_instructions[137], }, .count = 2U }, + [0x6b3] = { .instructions = { &g_instructions[185], }, .count = 1U }, + [0x6b4] = { .instructions = { &g_instructions[128], &g_instructions[137], }, .count = 2U }, + [0x6b5] = { .instructions = { &g_instructions[188], }, .count = 1U }, + [0x6b6] = { .instructions = { &g_instructions[128], &g_instructions[137], }, .count = 2U }, + [0x6b7] = { .instructions = { &g_instructions[75], &g_instructions[78], }, .count = 2U }, + [0x6b8] = { .instructions = { &g_instructions[128], &g_instructions[137], }, .count = 2U }, + [0x6b9] = { .instructions = { &g_instructions[188], }, .count = 1U }, + [0x6ba] = { .instructions = { &g_instructions[128], &g_instructions[137], }, .count = 2U }, + [0x6bb] = { .instructions = { &g_instructions[186], }, .count = 1U }, + [0x6bc] = { .instructions = { &g_instructions[128], &g_instructions[137], }, .count = 2U }, + [0x6bd] = { .instructions = { &g_instructions[188], }, .count = 1U }, + [0x6be] = { .instructions = { &g_instructions[128], &g_instructions[137], }, .count = 2U }, + [0x6c0] = { .instructions = { &g_instructions[156], }, .count = 1U }, + [0x6c2] = { .instructions = { &g_instructions[156], }, .count = 1U }, + [0x6c4] = { .instructions = { &g_instructions[156], }, .count = 1U }, + [0x6c6] = { .instructions = { &g_instructions[156], }, .count = 1U }, + [0x6c7] = { .instructions = { &g_instructions[80], &g_instructions[83], }, .count = 2U }, + [0x6c8] = { .instructions = { &g_instructions[156], }, .count = 1U }, + [0x6ca] = { .instructions = { &g_instructions[156], }, .count = 1U }, + [0x6cc] = { .instructions = { &g_instructions[156], }, .count = 1U }, + [0x6ce] = { .instructions = { &g_instructions[156], }, .count = 1U }, + [0x6d0] = { .instructions = { &g_instructions[140], }, .count = 1U }, + [0x6d2] = { .instructions = { &g_instructions[140], }, .count = 1U }, + [0x6d4] = { .instructions = { &g_instructions[140], }, .count = 1U }, + [0x6d6] = { .instructions = { &g_instructions[140], }, .count = 1U }, + [0x6d8] = { .instructions = { &g_instructions[140], }, .count = 1U }, + [0x6da] = { .instructions = { &g_instructions[140], }, .count = 1U }, + [0x6dc] = { .instructions = { &g_instructions[140], }, .count = 1U }, + [0x6de] = { .instructions = { &g_instructions[140], }, .count = 1U }, + [0x6e0] = { .instructions = { &g_instructions[130], &g_instructions[156], }, .count = 2U }, + [0x6e1] = { .instructions = { &g_instructions[190], }, .count = 1U }, + [0x6e2] = { .instructions = { &g_instructions[130], &g_instructions[156], }, .count = 2U }, + [0x6e3] = { .instructions = { &g_instructions[191], }, .count = 1U }, + [0x6e4] = { .instructions = { &g_instructions[130], &g_instructions[156], }, .count = 2U }, + [0x6e5] = { .instructions = { &g_instructions[190], }, .count = 1U }, + [0x6e6] = { .instructions = { &g_instructions[130], &g_instructions[156], }, .count = 2U }, + [0x6e7] = { .instructions = { &g_instructions[79], &g_instructions[82], }, .count = 2U }, + [0x6e8] = { .instructions = { &g_instructions[130], &g_instructions[156], }, .count = 2U }, + [0x6e9] = { .instructions = { &g_instructions[190], }, .count = 1U }, + [0x6ea] = { .instructions = { &g_instructions[130], &g_instructions[156], }, .count = 2U }, + [0x6ec] = { .instructions = { &g_instructions[130], &g_instructions[156], }, .count = 2U }, + [0x6ed] = { .instructions = { &g_instructions[190], }, .count = 1U }, + [0x6ee] = { .instructions = { &g_instructions[130], &g_instructions[156], }, .count = 2U }, + [0x6f0] = { .instructions = { &g_instructions[119], &g_instructions[140], }, .count = 2U }, + [0x6f1] = { .instructions = { &g_instructions[190], }, .count = 1U }, + [0x6f2] = { .instructions = { &g_instructions[119], &g_instructions[140], }, .count = 2U }, + [0x6f3] = { .instructions = { &g_instructions[184], }, .count = 1U }, + [0x6f4] = { .instructions = { &g_instructions[119], &g_instructions[140], }, .count = 2U }, + [0x6f5] = { .instructions = { &g_instructions[190], }, .count = 1U }, + [0x6f6] = { .instructions = { &g_instructions[119], &g_instructions[140], }, .count = 2U }, + [0x6f7] = { .instructions = { &g_instructions[81], &g_instructions[84], }, .count = 2U }, + [0x6f8] = { .instructions = { &g_instructions[119], &g_instructions[140], }, .count = 2U }, + [0x6f9] = { .instructions = { &g_instructions[190], }, .count = 1U }, + [0x6fa] = { .instructions = { &g_instructions[119], &g_instructions[140], }, .count = 2U }, + [0x6fb] = { .instructions = { &g_instructions[187], }, .count = 1U }, + [0x6fc] = { .instructions = { &g_instructions[119], &g_instructions[140], }, .count = 2U }, + [0x6fd] = { .instructions = { &g_instructions[190], }, .count = 1U }, + [0x6fe] = { .instructions = { &g_instructions[119], &g_instructions[140], }, .count = 2U }, + [0x700] = { .instructions = { &g_instructions[154], }, .count = 1U }, + [0x701] = { .instructions = { &g_instructions[210], &g_instructions[211], }, .count = 2U }, + [0x702] = { .instructions = { &g_instructions[154], }, .count = 1U }, + [0x703] = { .instructions = { &g_instructions[210], &g_instructions[211], }, .count = 2U }, + [0x704] = { .instructions = { &g_instructions[154], }, .count = 1U }, + [0x705] = { .instructions = { &g_instructions[213], &g_instructions[214], }, .count = 2U }, + [0x706] = { .instructions = { &g_instructions[154], }, .count = 1U }, + [0x707] = { .instructions = { &g_instructions[213], &g_instructions[214], }, .count = 2U }, + [0x708] = { .instructions = { &g_instructions[154], }, .count = 1U }, + [0x70a] = { .instructions = { &g_instructions[154], }, .count = 1U }, + [0x70c] = { .instructions = { &g_instructions[154], }, .count = 1U }, + [0x70e] = { .instructions = { &g_instructions[154], }, .count = 1U }, + [0x710] = { .instructions = { &g_instructions[86], &g_instructions[137], }, .count = 2U }, + [0x711] = { .instructions = { &g_instructions[192], }, .count = 1U }, + [0x712] = { .instructions = { &g_instructions[86], &g_instructions[137], }, .count = 2U }, + [0x714] = { .instructions = { &g_instructions[86], &g_instructions[137], }, .count = 2U }, + [0x716] = { .instructions = { &g_instructions[86], &g_instructions[137], }, .count = 2U }, + [0x718] = { .instructions = { &g_instructions[86], &g_instructions[137], }, .count = 2U }, + [0x71a] = { .instructions = { &g_instructions[86], &g_instructions[137], }, .count = 2U }, + [0x71c] = { .instructions = { &g_instructions[86], &g_instructions[137], }, .count = 2U }, + [0x71e] = { .instructions = { &g_instructions[86], &g_instructions[137], }, .count = 2U }, + [0x720] = { .instructions = { &g_instructions[154], }, .count = 1U }, + [0x722] = { .instructions = { &g_instructions[154], }, .count = 1U }, + [0x724] = { .instructions = { &g_instructions[154], }, .count = 1U }, + [0x726] = { .instructions = { &g_instructions[154], }, .count = 1U }, + [0x728] = { .instructions = { &g_instructions[154], }, .count = 1U }, + [0x72a] = { .instructions = { &g_instructions[154], }, .count = 1U }, + [0x72c] = { .instructions = { &g_instructions[154], }, .count = 1U }, + [0x72e] = { .instructions = { &g_instructions[154], }, .count = 1U }, + [0x730] = { .instructions = { &g_instructions[137], }, .count = 1U }, + [0x731] = { .instructions = { &g_instructions[193], }, .count = 1U }, + [0x732] = { .instructions = { &g_instructions[137], }, .count = 1U }, + [0x734] = { .instructions = { &g_instructions[137], }, .count = 1U }, + [0x736] = { .instructions = { &g_instructions[137], }, .count = 1U }, + [0x738] = { .instructions = { &g_instructions[137], }, .count = 1U }, + [0x73a] = { .instructions = { &g_instructions[137], }, .count = 1U }, + [0x73c] = { .instructions = { &g_instructions[137], }, .count = 1U }, + [0x73e] = { .instructions = { &g_instructions[137], }, .count = 1U }, + [0x740] = { .instructions = { &g_instructions[156], }, .count = 1U }, + [0x741] = { .instructions = { &g_instructions[212], }, .count = 1U }, + [0x742] = { .instructions = { &g_instructions[156], }, .count = 1U }, + [0x743] = { .instructions = { &g_instructions[212], }, .count = 1U }, + [0x744] = { .instructions = { &g_instructions[156], }, .count = 1U }, + [0x745] = { .instructions = { &g_instructions[215], }, .count = 1U }, + [0x746] = { .instructions = { &g_instructions[156], }, .count = 1U }, + [0x747] = { .instructions = { &g_instructions[215], }, .count = 1U }, + [0x748] = { .instructions = { &g_instructions[156], }, .count = 1U }, + [0x74a] = { .instructions = { &g_instructions[156], }, .count = 1U }, + [0x74c] = { .instructions = { &g_instructions[156], }, .count = 1U }, + [0x74e] = { .instructions = { &g_instructions[156], }, .count = 1U }, + [0x750] = { .instructions = { &g_instructions[86], &g_instructions[140], }, .count = 2U }, + [0x751] = { .instructions = { &g_instructions[207], &g_instructions[208], }, .count = 2U }, + [0x752] = { .instructions = { &g_instructions[86], &g_instructions[140], }, .count = 2U }, + [0x753] = { .instructions = { &g_instructions[207], &g_instructions[208], }, .count = 2U }, + [0x754] = { .instructions = { &g_instructions[86], &g_instructions[140], }, .count = 2U }, + [0x756] = { .instructions = { &g_instructions[86], &g_instructions[140], }, .count = 2U }, + [0x758] = { .instructions = { &g_instructions[86], &g_instructions[140], }, .count = 2U }, + [0x75a] = { .instructions = { &g_instructions[86], &g_instructions[140], }, .count = 2U }, + [0x75c] = { .instructions = { &g_instructions[86], &g_instructions[140], }, .count = 2U }, + [0x75d] = { .instructions = { &g_instructions[209], }, .count = 1U }, + [0x75e] = { .instructions = { &g_instructions[86], &g_instructions[140], }, .count = 2U }, + [0x75f] = { .instructions = { &g_instructions[209], }, .count = 1U }, + [0x760] = { .instructions = { &g_instructions[156], }, .count = 1U }, + [0x762] = { .instructions = { &g_instructions[156], }, .count = 1U }, + [0x764] = { .instructions = { &g_instructions[156], }, .count = 1U }, + [0x766] = { .instructions = { &g_instructions[156], }, .count = 1U }, + [0x768] = { .instructions = { &g_instructions[156], }, .count = 1U }, + [0x76a] = { .instructions = { &g_instructions[156], }, .count = 1U }, + [0x76c] = { .instructions = { &g_instructions[156], }, .count = 1U }, + [0x76e] = { .instructions = { &g_instructions[156], }, .count = 1U }, + [0x770] = { .instructions = { &g_instructions[140], }, .count = 1U }, + [0x772] = { .instructions = { &g_instructions[140], }, .count = 1U }, + [0x774] = { .instructions = { &g_instructions[140], }, .count = 1U }, + [0x776] = { .instructions = { &g_instructions[140], }, .count = 1U }, + [0x778] = { .instructions = { &g_instructions[140], }, .count = 1U }, + [0x77a] = { .instructions = { &g_instructions[140], }, .count = 1U }, + [0x77c] = { .instructions = { &g_instructions[140], }, .count = 1U }, + [0x77e] = { .instructions = { &g_instructions[140], }, .count = 1U }, + [0x780] = { .instructions = { &g_instructions[154], }, .count = 1U }, + [0x781] = { .instructions = { &g_instructions[180], &g_instructions[181], }, .count = 2U }, + [0x782] = { .instructions = { &g_instructions[154], }, .count = 1U }, + [0x784] = { .instructions = { &g_instructions[154], }, .count = 1U }, + [0x786] = { .instructions = { &g_instructions[154], }, .count = 1U }, + [0x788] = { .instructions = { &g_instructions[154], }, .count = 1U }, + [0x78a] = { .instructions = { &g_instructions[154], }, .count = 1U }, + [0x78c] = { .instructions = { &g_instructions[154], }, .count = 1U }, + [0x78e] = { .instructions = { &g_instructions[154], }, .count = 1U }, + [0x790] = { .instructions = { &g_instructions[86], &g_instructions[137], }, .count = 2U }, + [0x792] = { .instructions = { &g_instructions[86], &g_instructions[137], }, .count = 2U }, + [0x794] = { .instructions = { &g_instructions[86], &g_instructions[137], }, .count = 2U }, + [0x796] = { .instructions = { &g_instructions[86], &g_instructions[137], }, .count = 2U }, + [0x798] = { .instructions = { &g_instructions[86], &g_instructions[137], }, .count = 2U }, + [0x79a] = { .instructions = { &g_instructions[86], &g_instructions[137], }, .count = 2U }, + [0x79c] = { .instructions = { &g_instructions[86], &g_instructions[137], }, .count = 2U }, + [0x79e] = { .instructions = { &g_instructions[86], &g_instructions[137], }, .count = 2U }, + [0x7a0] = { .instructions = { &g_instructions[154], }, .count = 1U }, + [0x7a2] = { .instructions = { &g_instructions[154], }, .count = 1U }, + [0x7a4] = { .instructions = { &g_instructions[154], }, .count = 1U }, + [0x7a5] = { .instructions = { &g_instructions[177], }, .count = 1U }, + [0x7a6] = { .instructions = { &g_instructions[154], }, .count = 1U }, + [0x7a8] = { .instructions = { &g_instructions[154], }, .count = 1U }, + [0x7aa] = { .instructions = { &g_instructions[154], }, .count = 1U }, + [0x7ac] = { .instructions = { &g_instructions[154], }, .count = 1U }, + [0x7ad] = { .instructions = { &g_instructions[177], }, .count = 1U }, + [0x7ae] = { .instructions = { &g_instructions[154], }, .count = 1U }, + [0x7b0] = { .instructions = { &g_instructions[137], }, .count = 1U }, + [0x7b2] = { .instructions = { &g_instructions[137], }, .count = 1U }, + [0x7b4] = { .instructions = { &g_instructions[137], }, .count = 1U }, + [0x7b5] = { .instructions = { &g_instructions[177], }, .count = 1U }, + [0x7b6] = { .instructions = { &g_instructions[137], }, .count = 1U }, + [0x7b8] = { .instructions = { &g_instructions[137], }, .count = 1U }, + [0x7ba] = { .instructions = { &g_instructions[137], }, .count = 1U }, + [0x7bc] = { .instructions = { &g_instructions[137], }, .count = 1U }, + [0x7bd] = { .instructions = { &g_instructions[177], }, .count = 1U }, + [0x7be] = { .instructions = { &g_instructions[137], }, .count = 1U }, + [0x7c0] = { .instructions = { &g_instructions[156], }, .count = 1U }, + [0x7c1] = { .instructions = { &g_instructions[172], &g_instructions[173], }, .count = 2U }, + [0x7c2] = { .instructions = { &g_instructions[156], }, .count = 1U }, + [0x7c4] = { .instructions = { &g_instructions[156], }, .count = 1U }, + [0x7c6] = { .instructions = { &g_instructions[156], }, .count = 1U }, + [0x7c8] = { .instructions = { &g_instructions[156], }, .count = 1U }, + [0x7c9] = { .instructions = { &g_instructions[172], &g_instructions[173], }, .count = 2U }, + [0x7ca] = { .instructions = { &g_instructions[156], }, .count = 1U }, + [0x7cc] = { .instructions = { &g_instructions[156], }, .count = 1U }, + [0x7ce] = { .instructions = { &g_instructions[156], }, .count = 1U }, + [0x7d0] = { .instructions = { &g_instructions[86], &g_instructions[140], }, .count = 2U }, + [0x7d1] = { .instructions = { &g_instructions[172], &g_instructions[173], }, .count = 2U }, + [0x7d2] = { .instructions = { &g_instructions[86], &g_instructions[140], }, .count = 2U }, + [0x7d4] = { .instructions = { &g_instructions[86], &g_instructions[140], }, .count = 2U }, + [0x7d6] = { .instructions = { &g_instructions[86], &g_instructions[140], }, .count = 2U }, + [0x7d8] = { .instructions = { &g_instructions[86], &g_instructions[140], }, .count = 2U }, + [0x7d9] = { .instructions = { &g_instructions[172], &g_instructions[173], }, .count = 2U }, + [0x7da] = { .instructions = { &g_instructions[86], &g_instructions[140], }, .count = 2U }, + [0x7dc] = { .instructions = { &g_instructions[86], &g_instructions[140], }, .count = 2U }, + [0x7de] = { .instructions = { &g_instructions[86], &g_instructions[140], }, .count = 2U }, + [0x7e0] = { .instructions = { &g_instructions[156], }, .count = 1U }, + [0x7e2] = { .instructions = { &g_instructions[156], }, .count = 1U }, + [0x7e4] = { .instructions = { &g_instructions[156], }, .count = 1U }, + [0x7e5] = { .instructions = { &g_instructions[179], }, .count = 1U }, + [0x7e6] = { .instructions = { &g_instructions[156], }, .count = 1U }, + [0x7e8] = { .instructions = { &g_instructions[156], }, .count = 1U }, + [0x7ea] = { .instructions = { &g_instructions[156], }, .count = 1U }, + [0x7ec] = { .instructions = { &g_instructions[156], }, .count = 1U }, + [0x7ed] = { .instructions = { &g_instructions[179], }, .count = 1U }, + [0x7ee] = { .instructions = { &g_instructions[156], }, .count = 1U }, + [0x7f0] = { .instructions = { &g_instructions[140], }, .count = 1U }, + [0x7f2] = { .instructions = { &g_instructions[140], }, .count = 1U }, + [0x7f4] = { .instructions = { &g_instructions[140], }, .count = 1U }, + [0x7f5] = { .instructions = { &g_instructions[179], }, .count = 1U }, + [0x7f6] = { .instructions = { &g_instructions[140], }, .count = 1U }, + [0x7f8] = { .instructions = { &g_instructions[140], }, .count = 1U }, + [0x7fa] = { .instructions = { &g_instructions[140], }, .count = 1U }, + [0x7fc] = { .instructions = { &g_instructions[140], }, .count = 1U }, + [0x7fd] = { .instructions = { &g_instructions[179], }, .count = 1U }, + [0x7fe] = { .instructions = { &g_instructions[140], }, .count = 1U }, + [0x7ff] = { .instructions = { &g_instructions[72], }, .count = 1U }, + [0x800] = { .instructions = { &g_instructions[168], }, .count = 1U }, + [0x801] = { .instructions = { &g_instructions[168], }, .count = 1U }, + [0x802] = { .instructions = { &g_instructions[168], }, .count = 1U }, + [0x803] = { .instructions = { &g_instructions[168], }, .count = 1U }, + [0x804] = { .instructions = { &g_instructions[168], }, .count = 1U }, + [0x805] = { .instructions = { &g_instructions[168], }, .count = 1U }, + [0x806] = { .instructions = { &g_instructions[168], }, .count = 1U }, + [0x807] = { .instructions = { &g_instructions[168], }, .count = 1U }, + [0x808] = { .instructions = { &g_instructions[168], }, .count = 1U }, + [0x809] = { .instructions = { &g_instructions[168], }, .count = 1U }, + [0x80a] = { .instructions = { &g_instructions[168], }, .count = 1U }, + [0x80b] = { .instructions = { &g_instructions[168], }, .count = 1U }, + [0x80c] = { .instructions = { &g_instructions[168], }, .count = 1U }, + [0x80d] = { .instructions = { &g_instructions[168], }, .count = 1U }, + [0x80e] = { .instructions = { &g_instructions[168], }, .count = 1U }, + [0x80f] = { .instructions = { &g_instructions[168], }, .count = 1U }, + [0x810] = { .instructions = { &g_instructions[9], &g_instructions[162], }, .count = 2U }, + [0x811] = { .instructions = { &g_instructions[162], }, .count = 1U }, + [0x812] = { .instructions = { &g_instructions[162], }, .count = 1U }, + [0x813] = { .instructions = { &g_instructions[162], }, .count = 1U }, + [0x814] = { .instructions = { &g_instructions[162], }, .count = 1U }, + [0x815] = { .instructions = { &g_instructions[162], }, .count = 1U }, + [0x816] = { .instructions = { &g_instructions[162], }, .count = 1U }, + [0x817] = { .instructions = { &g_instructions[162], }, .count = 1U }, + [0x818] = { .instructions = { &g_instructions[162], }, .count = 1U }, + [0x819] = { .instructions = { &g_instructions[162], }, .count = 1U }, + [0x81a] = { .instructions = { &g_instructions[162], }, .count = 1U }, + [0x81b] = { .instructions = { &g_instructions[162], }, .count = 1U }, + [0x81c] = { .instructions = { &g_instructions[162], }, .count = 1U }, + [0x81d] = { .instructions = { &g_instructions[162], }, .count = 1U }, + [0x81e] = { .instructions = { &g_instructions[162], }, .count = 1U }, + [0x81f] = { .instructions = { &g_instructions[162], }, .count = 1U }, + [0x820] = { .instructions = { &g_instructions[168], }, .count = 1U }, + [0x821] = { .instructions = { &g_instructions[168], }, .count = 1U }, + [0x822] = { .instructions = { &g_instructions[168], }, .count = 1U }, + [0x823] = { .instructions = { &g_instructions[168], }, .count = 1U }, + [0x824] = { .instructions = { &g_instructions[168], }, .count = 1U }, + [0x825] = { .instructions = { &g_instructions[168], }, .count = 1U }, + [0x826] = { .instructions = { &g_instructions[168], }, .count = 1U }, + [0x827] = { .instructions = { &g_instructions[168], }, .count = 1U }, + [0x828] = { .instructions = { &g_instructions[168], }, .count = 1U }, + [0x829] = { .instructions = { &g_instructions[168], }, .count = 1U }, + [0x82a] = { .instructions = { &g_instructions[168], }, .count = 1U }, + [0x82b] = { .instructions = { &g_instructions[168], }, .count = 1U }, + [0x82c] = { .instructions = { &g_instructions[168], }, .count = 1U }, + [0x82d] = { .instructions = { &g_instructions[168], }, .count = 1U }, + [0x82e] = { .instructions = { &g_instructions[168], }, .count = 1U }, + [0x82f] = { .instructions = { &g_instructions[168], }, .count = 1U }, + [0x830] = { .instructions = { &g_instructions[9], &g_instructions[162], }, .count = 2U }, + [0x831] = { .instructions = { &g_instructions[162], }, .count = 1U }, + [0x832] = { .instructions = { &g_instructions[162], }, .count = 1U }, + [0x833] = { .instructions = { &g_instructions[162], }, .count = 1U }, + [0x834] = { .instructions = { &g_instructions[162], }, .count = 1U }, + [0x835] = { .instructions = { &g_instructions[162], }, .count = 1U }, + [0x836] = { .instructions = { &g_instructions[162], }, .count = 1U }, + [0x837] = { .instructions = { &g_instructions[162], }, .count = 1U }, + [0x838] = { .instructions = { &g_instructions[162], }, .count = 1U }, + [0x839] = { .instructions = { &g_instructions[162], }, .count = 1U }, + [0x83a] = { .instructions = { &g_instructions[162], }, .count = 1U }, + [0x83b] = { .instructions = { &g_instructions[162], }, .count = 1U }, + [0x83c] = { .instructions = { &g_instructions[162], }, .count = 1U }, + [0x83d] = { .instructions = { &g_instructions[162], }, .count = 1U }, + [0x83e] = { .instructions = { &g_instructions[162], }, .count = 1U }, + [0x83f] = { .instructions = { &g_instructions[162], }, .count = 1U }, + [0x840] = { .instructions = { &g_instructions[10], &g_instructions[171], }, .count = 2U }, + [0x841] = { .instructions = { &g_instructions[10], &g_instructions[171], }, .count = 2U }, + [0x842] = { .instructions = { &g_instructions[171], }, .count = 1U }, + [0x843] = { .instructions = { &g_instructions[171], }, .count = 1U }, + [0x844] = { .instructions = { &g_instructions[171], }, .count = 1U }, + [0x845] = { .instructions = { &g_instructions[171], }, .count = 1U }, + [0x846] = { .instructions = { &g_instructions[171], }, .count = 1U }, + [0x847] = { .instructions = { &g_instructions[171], }, .count = 1U }, + [0x848] = { .instructions = { &g_instructions[171], }, .count = 1U }, + [0x849] = { .instructions = { &g_instructions[171], }, .count = 1U }, + [0x84a] = { .instructions = { &g_instructions[171], }, .count = 1U }, + [0x84b] = { .instructions = { &g_instructions[171], }, .count = 1U }, + [0x84c] = { .instructions = { &g_instructions[171], }, .count = 1U }, + [0x84d] = { .instructions = { &g_instructions[171], }, .count = 1U }, + [0x84e] = { .instructions = { &g_instructions[171], }, .count = 1U }, + [0x84f] = { .instructions = { &g_instructions[171], }, .count = 1U }, + [0x850] = { .instructions = { &g_instructions[165], &g_instructions[166], }, .count = 2U }, + [0x851] = { .instructions = { &g_instructions[165], &g_instructions[166], }, .count = 2U }, + [0x852] = { .instructions = { &g_instructions[165], &g_instructions[166], }, .count = 2U }, + [0x853] = { .instructions = { &g_instructions[165], &g_instructions[166], }, .count = 2U }, + [0x854] = { .instructions = { &g_instructions[165], &g_instructions[166], }, .count = 2U }, + [0x855] = { .instructions = { &g_instructions[165], &g_instructions[166], }, .count = 2U }, + [0x856] = { .instructions = { &g_instructions[165], &g_instructions[166], }, .count = 2U }, + [0x857] = { .instructions = { &g_instructions[165], &g_instructions[166], }, .count = 2U }, + [0x858] = { .instructions = { &g_instructions[165], &g_instructions[166], }, .count = 2U }, + [0x859] = { .instructions = { &g_instructions[165], &g_instructions[166], }, .count = 2U }, + [0x85a] = { .instructions = { &g_instructions[165], &g_instructions[166], }, .count = 2U }, + [0x85b] = { .instructions = { &g_instructions[165], &g_instructions[166], }, .count = 2U }, + [0x85c] = { .instructions = { &g_instructions[165], &g_instructions[166], }, .count = 2U }, + [0x85d] = { .instructions = { &g_instructions[165], &g_instructions[166], }, .count = 2U }, + [0x85e] = { .instructions = { &g_instructions[165], &g_instructions[166], }, .count = 2U }, + [0x85f] = { .instructions = { &g_instructions[165], &g_instructions[166], }, .count = 2U }, + [0x860] = { .instructions = { &g_instructions[10], }, .count = 1U }, + [0x861] = { .instructions = { &g_instructions[10], }, .count = 1U }, + [0x870] = { .instructions = { &g_instructions[166], }, .count = 1U }, + [0x871] = { .instructions = { &g_instructions[166], }, .count = 1U }, + [0x872] = { .instructions = { &g_instructions[166], }, .count = 1U }, + [0x873] = { .instructions = { &g_instructions[166], }, .count = 1U }, + [0x874] = { .instructions = { &g_instructions[166], }, .count = 1U }, + [0x875] = { .instructions = { &g_instructions[166], }, .count = 1U }, + [0x876] = { .instructions = { &g_instructions[166], }, .count = 1U }, + [0x877] = { .instructions = { &g_instructions[166], }, .count = 1U }, + [0x878] = { .instructions = { &g_instructions[166], }, .count = 1U }, + [0x879] = { .instructions = { &g_instructions[166], }, .count = 1U }, + [0x87a] = { .instructions = { &g_instructions[166], }, .count = 1U }, + [0x87b] = { .instructions = { &g_instructions[166], }, .count = 1U }, + [0x87c] = { .instructions = { &g_instructions[166], }, .count = 1U }, + [0x87d] = { .instructions = { &g_instructions[166], }, .count = 1U }, + [0x87e] = { .instructions = { &g_instructions[166], }, .count = 1U }, + [0x87f] = { .instructions = { &g_instructions[166], }, .count = 1U }, + [0x880] = { .instructions = { &g_instructions[167], }, .count = 1U }, + [0x881] = { .instructions = { &g_instructions[167], }, .count = 1U }, + [0x882] = { .instructions = { &g_instructions[167], }, .count = 1U }, + [0x883] = { .instructions = { &g_instructions[167], }, .count = 1U }, + [0x884] = { .instructions = { &g_instructions[167], }, .count = 1U }, + [0x885] = { .instructions = { &g_instructions[167], }, .count = 1U }, + [0x886] = { .instructions = { &g_instructions[167], }, .count = 1U }, + [0x887] = { .instructions = { &g_instructions[167], }, .count = 1U }, + [0x888] = { .instructions = { &g_instructions[167], }, .count = 1U }, + [0x889] = { .instructions = { &g_instructions[167], }, .count = 1U }, + [0x88a] = { .instructions = { &g_instructions[167], }, .count = 1U }, + [0x88b] = { .instructions = { &g_instructions[167], }, .count = 1U }, + [0x88c] = { .instructions = { &g_instructions[167], }, .count = 1U }, + [0x88d] = { .instructions = { &g_instructions[167], }, .count = 1U }, + [0x88e] = { .instructions = { &g_instructions[167], }, .count = 1U }, + [0x88f] = { .instructions = { &g_instructions[167], }, .count = 1U }, + [0x890] = { .instructions = { &g_instructions[9], &g_instructions[161], }, .count = 2U }, + [0x891] = { .instructions = { &g_instructions[161], }, .count = 1U }, + [0x892] = { .instructions = { &g_instructions[161], }, .count = 1U }, + [0x893] = { .instructions = { &g_instructions[161], }, .count = 1U }, + [0x894] = { .instructions = { &g_instructions[161], }, .count = 1U }, + [0x895] = { .instructions = { &g_instructions[161], }, .count = 1U }, + [0x896] = { .instructions = { &g_instructions[161], }, .count = 1U }, + [0x897] = { .instructions = { &g_instructions[161], }, .count = 1U }, + [0x898] = { .instructions = { &g_instructions[161], }, .count = 1U }, + [0x899] = { .instructions = { &g_instructions[161], }, .count = 1U }, + [0x89a] = { .instructions = { &g_instructions[161], }, .count = 1U }, + [0x89b] = { .instructions = { &g_instructions[161], }, .count = 1U }, + [0x89c] = { .instructions = { &g_instructions[161], }, .count = 1U }, + [0x89d] = { .instructions = { &g_instructions[161], }, .count = 1U }, + [0x89e] = { .instructions = { &g_instructions[161], }, .count = 1U }, + [0x89f] = { .instructions = { &g_instructions[161], }, .count = 1U }, + [0x8a0] = { .instructions = { &g_instructions[167], }, .count = 1U }, + [0x8a1] = { .instructions = { &g_instructions[167], }, .count = 1U }, + [0x8a2] = { .instructions = { &g_instructions[167], }, .count = 1U }, + [0x8a3] = { .instructions = { &g_instructions[167], }, .count = 1U }, + [0x8a4] = { .instructions = { &g_instructions[167], }, .count = 1U }, + [0x8a5] = { .instructions = { &g_instructions[167], }, .count = 1U }, + [0x8a6] = { .instructions = { &g_instructions[167], }, .count = 1U }, + [0x8a7] = { .instructions = { &g_instructions[167], }, .count = 1U }, + [0x8a8] = { .instructions = { &g_instructions[167], }, .count = 1U }, + [0x8a9] = { .instructions = { &g_instructions[167], }, .count = 1U }, + [0x8aa] = { .instructions = { &g_instructions[167], }, .count = 1U }, + [0x8ab] = { .instructions = { &g_instructions[167], }, .count = 1U }, + [0x8ac] = { .instructions = { &g_instructions[167], }, .count = 1U }, + [0x8ad] = { .instructions = { &g_instructions[167], }, .count = 1U }, + [0x8ae] = { .instructions = { &g_instructions[167], }, .count = 1U }, + [0x8af] = { .instructions = { &g_instructions[167], }, .count = 1U }, + [0x8b0] = { .instructions = { &g_instructions[9], &g_instructions[161], }, .count = 2U }, + [0x8b1] = { .instructions = { &g_instructions[161], }, .count = 1U }, + [0x8b2] = { .instructions = { &g_instructions[161], }, .count = 1U }, + [0x8b3] = { .instructions = { &g_instructions[161], }, .count = 1U }, + [0x8b4] = { .instructions = { &g_instructions[161], }, .count = 1U }, + [0x8b5] = { .instructions = { &g_instructions[161], }, .count = 1U }, + [0x8b6] = { .instructions = { &g_instructions[161], }, .count = 1U }, + [0x8b7] = { .instructions = { &g_instructions[161], }, .count = 1U }, + [0x8b8] = { .instructions = { &g_instructions[161], }, .count = 1U }, + [0x8b9] = { .instructions = { &g_instructions[161], }, .count = 1U }, + [0x8ba] = { .instructions = { &g_instructions[161], }, .count = 1U }, + [0x8bb] = { .instructions = { &g_instructions[161], }, .count = 1U }, + [0x8bc] = { .instructions = { &g_instructions[161], }, .count = 1U }, + [0x8bd] = { .instructions = { &g_instructions[161], }, .count = 1U }, + [0x8be] = { .instructions = { &g_instructions[161], }, .count = 1U }, + [0x8bf] = { .instructions = { &g_instructions[161], }, .count = 1U }, + [0x8c0] = { .instructions = { &g_instructions[10], &g_instructions[171], }, .count = 2U }, + [0x8c1] = { .instructions = { &g_instructions[10], &g_instructions[171], }, .count = 2U }, + [0x8c2] = { .instructions = { &g_instructions[171], }, .count = 1U }, + [0x8c3] = { .instructions = { &g_instructions[171], }, .count = 1U }, + [0x8c4] = { .instructions = { &g_instructions[171], }, .count = 1U }, + [0x8c5] = { .instructions = { &g_instructions[171], }, .count = 1U }, + [0x8c6] = { .instructions = { &g_instructions[171], }, .count = 1U }, + [0x8c7] = { .instructions = { &g_instructions[171], }, .count = 1U }, + [0x8c8] = { .instructions = { &g_instructions[171], }, .count = 1U }, + [0x8c9] = { .instructions = { &g_instructions[171], }, .count = 1U }, + [0x8ca] = { .instructions = { &g_instructions[171], }, .count = 1U }, + [0x8cb] = { .instructions = { &g_instructions[171], }, .count = 1U }, + [0x8cc] = { .instructions = { &g_instructions[171], }, .count = 1U }, + [0x8cd] = { .instructions = { &g_instructions[171], }, .count = 1U }, + [0x8ce] = { .instructions = { &g_instructions[171], }, .count = 1U }, + [0x8cf] = { .instructions = { &g_instructions[171], }, .count = 1U }, + [0x8d0] = { .instructions = { &g_instructions[165], &g_instructions[166], }, .count = 2U }, + [0x8d1] = { .instructions = { &g_instructions[165], &g_instructions[166], }, .count = 2U }, + [0x8d2] = { .instructions = { &g_instructions[165], &g_instructions[166], }, .count = 2U }, + [0x8d3] = { .instructions = { &g_instructions[165], &g_instructions[166], }, .count = 2U }, + [0x8d4] = { .instructions = { &g_instructions[165], &g_instructions[166], }, .count = 2U }, + [0x8d5] = { .instructions = { &g_instructions[165], &g_instructions[166], }, .count = 2U }, + [0x8d6] = { .instructions = { &g_instructions[165], &g_instructions[166], }, .count = 2U }, + [0x8d7] = { .instructions = { &g_instructions[165], &g_instructions[166], }, .count = 2U }, + [0x8d8] = { .instructions = { &g_instructions[165], &g_instructions[166], }, .count = 2U }, + [0x8d9] = { .instructions = { &g_instructions[165], &g_instructions[166], }, .count = 2U }, + [0x8da] = { .instructions = { &g_instructions[165], &g_instructions[166], }, .count = 2U }, + [0x8db] = { .instructions = { &g_instructions[165], &g_instructions[166], }, .count = 2U }, + [0x8dc] = { .instructions = { &g_instructions[165], &g_instructions[166], }, .count = 2U }, + [0x8dd] = { .instructions = { &g_instructions[165], &g_instructions[166], }, .count = 2U }, + [0x8de] = { .instructions = { &g_instructions[165], &g_instructions[166], }, .count = 2U }, + [0x8df] = { .instructions = { &g_instructions[165], &g_instructions[166], }, .count = 2U }, + [0x8e0] = { .instructions = { &g_instructions[10], }, .count = 1U }, + [0x8e1] = { .instructions = { &g_instructions[10], }, .count = 1U }, + [0x8f0] = { .instructions = { &g_instructions[166], }, .count = 1U }, + [0x8f1] = { .instructions = { &g_instructions[166], }, .count = 1U }, + [0x8f2] = { .instructions = { &g_instructions[166], }, .count = 1U }, + [0x8f3] = { .instructions = { &g_instructions[166], }, .count = 1U }, + [0x8f4] = { .instructions = { &g_instructions[166], }, .count = 1U }, + [0x8f5] = { .instructions = { &g_instructions[166], }, .count = 1U }, + [0x8f6] = { .instructions = { &g_instructions[166], }, .count = 1U }, + [0x8f7] = { .instructions = { &g_instructions[166], }, .count = 1U }, + [0x8f8] = { .instructions = { &g_instructions[166], }, .count = 1U }, + [0x8f9] = { .instructions = { &g_instructions[166], }, .count = 1U }, + [0x8fa] = { .instructions = { &g_instructions[166], }, .count = 1U }, + [0x8fb] = { .instructions = { &g_instructions[166], }, .count = 1U }, + [0x8fc] = { .instructions = { &g_instructions[166], }, .count = 1U }, + [0x8fd] = { .instructions = { &g_instructions[166], }, .count = 1U }, + [0x8fe] = { .instructions = { &g_instructions[166], }, .count = 1U }, + [0x8ff] = { .instructions = { &g_instructions[166], }, .count = 1U }, + [0x900] = { .instructions = { &g_instructions[169], }, .count = 1U }, + [0x901] = { .instructions = { &g_instructions[169], }, .count = 1U }, + [0x902] = { .instructions = { &g_instructions[169], }, .count = 1U }, + [0x903] = { .instructions = { &g_instructions[169], }, .count = 1U }, + [0x904] = { .instructions = { &g_instructions[169], }, .count = 1U }, + [0x905] = { .instructions = { &g_instructions[169], }, .count = 1U }, + [0x906] = { .instructions = { &g_instructions[169], }, .count = 1U }, + [0x907] = { .instructions = { &g_instructions[169], }, .count = 1U }, + [0x908] = { .instructions = { &g_instructions[169], }, .count = 1U }, + [0x909] = { .instructions = { &g_instructions[169], }, .count = 1U }, + [0x90a] = { .instructions = { &g_instructions[169], }, .count = 1U }, + [0x90b] = { .instructions = { &g_instructions[169], }, .count = 1U }, + [0x90c] = { .instructions = { &g_instructions[169], }, .count = 1U }, + [0x90d] = { .instructions = { &g_instructions[169], }, .count = 1U }, + [0x90e] = { .instructions = { &g_instructions[169], }, .count = 1U }, + [0x90f] = { .instructions = { &g_instructions[169], }, .count = 1U }, + [0x910] = { .instructions = { &g_instructions[9], &g_instructions[163], }, .count = 2U }, + [0x911] = { .instructions = { &g_instructions[163], }, .count = 1U }, + [0x912] = { .instructions = { &g_instructions[163], }, .count = 1U }, + [0x913] = { .instructions = { &g_instructions[163], }, .count = 1U }, + [0x914] = { .instructions = { &g_instructions[163], }, .count = 1U }, + [0x915] = { .instructions = { &g_instructions[163], }, .count = 1U }, + [0x916] = { .instructions = { &g_instructions[163], }, .count = 1U }, + [0x917] = { .instructions = { &g_instructions[163], }, .count = 1U }, + [0x918] = { .instructions = { &g_instructions[163], }, .count = 1U }, + [0x919] = { .instructions = { &g_instructions[163], }, .count = 1U }, + [0x91a] = { .instructions = { &g_instructions[163], }, .count = 1U }, + [0x91b] = { .instructions = { &g_instructions[163], }, .count = 1U }, + [0x91c] = { .instructions = { &g_instructions[163], }, .count = 1U }, + [0x91d] = { .instructions = { &g_instructions[163], }, .count = 1U }, + [0x91e] = { .instructions = { &g_instructions[163], }, .count = 1U }, + [0x91f] = { .instructions = { &g_instructions[163], }, .count = 1U }, + [0x920] = { .instructions = { &g_instructions[169], }, .count = 1U }, + [0x921] = { .instructions = { &g_instructions[169], }, .count = 1U }, + [0x922] = { .instructions = { &g_instructions[169], }, .count = 1U }, + [0x923] = { .instructions = { &g_instructions[169], }, .count = 1U }, + [0x924] = { .instructions = { &g_instructions[169], }, .count = 1U }, + [0x925] = { .instructions = { &g_instructions[169], }, .count = 1U }, + [0x926] = { .instructions = { &g_instructions[169], }, .count = 1U }, + [0x927] = { .instructions = { &g_instructions[169], }, .count = 1U }, + [0x928] = { .instructions = { &g_instructions[169], }, .count = 1U }, + [0x929] = { .instructions = { &g_instructions[169], }, .count = 1U }, + [0x92a] = { .instructions = { &g_instructions[169], }, .count = 1U }, + [0x92b] = { .instructions = { &g_instructions[169], }, .count = 1U }, + [0x92c] = { .instructions = { &g_instructions[169], }, .count = 1U }, + [0x92d] = { .instructions = { &g_instructions[169], }, .count = 1U }, + [0x92e] = { .instructions = { &g_instructions[169], }, .count = 1U }, + [0x92f] = { .instructions = { &g_instructions[169], }, .count = 1U }, + [0x930] = { .instructions = { &g_instructions[9], &g_instructions[163], }, .count = 2U }, + [0x931] = { .instructions = { &g_instructions[163], }, .count = 1U }, + [0x932] = { .instructions = { &g_instructions[163], }, .count = 1U }, + [0x933] = { .instructions = { &g_instructions[163], }, .count = 1U }, + [0x934] = { .instructions = { &g_instructions[163], }, .count = 1U }, + [0x935] = { .instructions = { &g_instructions[163], }, .count = 1U }, + [0x936] = { .instructions = { &g_instructions[163], }, .count = 1U }, + [0x937] = { .instructions = { &g_instructions[163], }, .count = 1U }, + [0x938] = { .instructions = { &g_instructions[163], }, .count = 1U }, + [0x939] = { .instructions = { &g_instructions[163], }, .count = 1U }, + [0x93a] = { .instructions = { &g_instructions[163], }, .count = 1U }, + [0x93b] = { .instructions = { &g_instructions[163], }, .count = 1U }, + [0x93c] = { .instructions = { &g_instructions[163], }, .count = 1U }, + [0x93d] = { .instructions = { &g_instructions[163], }, .count = 1U }, + [0x93e] = { .instructions = { &g_instructions[163], }, .count = 1U }, + [0x93f] = { .instructions = { &g_instructions[163], }, .count = 1U }, + [0x940] = { .instructions = { &g_instructions[10], &g_instructions[171], }, .count = 2U }, + [0x941] = { .instructions = { &g_instructions[10], &g_instructions[171], }, .count = 2U }, + [0x942] = { .instructions = { &g_instructions[171], }, .count = 1U }, + [0x943] = { .instructions = { &g_instructions[171], }, .count = 1U }, + [0x944] = { .instructions = { &g_instructions[171], }, .count = 1U }, + [0x945] = { .instructions = { &g_instructions[171], }, .count = 1U }, + [0x946] = { .instructions = { &g_instructions[171], }, .count = 1U }, + [0x947] = { .instructions = { &g_instructions[171], }, .count = 1U }, + [0x948] = { .instructions = { &g_instructions[171], }, .count = 1U }, + [0x949] = { .instructions = { &g_instructions[171], }, .count = 1U }, + [0x94a] = { .instructions = { &g_instructions[171], }, .count = 1U }, + [0x94b] = { .instructions = { &g_instructions[171], }, .count = 1U }, + [0x94c] = { .instructions = { &g_instructions[171], }, .count = 1U }, + [0x94d] = { .instructions = { &g_instructions[171], }, .count = 1U }, + [0x94e] = { .instructions = { &g_instructions[171], }, .count = 1U }, + [0x94f] = { .instructions = { &g_instructions[171], }, .count = 1U }, + [0x950] = { .instructions = { &g_instructions[165], &g_instructions[166], }, .count = 2U }, + [0x951] = { .instructions = { &g_instructions[165], &g_instructions[166], }, .count = 2U }, + [0x952] = { .instructions = { &g_instructions[165], &g_instructions[166], }, .count = 2U }, + [0x953] = { .instructions = { &g_instructions[165], &g_instructions[166], }, .count = 2U }, + [0x954] = { .instructions = { &g_instructions[165], &g_instructions[166], }, .count = 2U }, + [0x955] = { .instructions = { &g_instructions[165], &g_instructions[166], }, .count = 2U }, + [0x956] = { .instructions = { &g_instructions[165], &g_instructions[166], }, .count = 2U }, + [0x957] = { .instructions = { &g_instructions[165], &g_instructions[166], }, .count = 2U }, + [0x958] = { .instructions = { &g_instructions[165], &g_instructions[166], }, .count = 2U }, + [0x959] = { .instructions = { &g_instructions[165], &g_instructions[166], }, .count = 2U }, + [0x95a] = { .instructions = { &g_instructions[165], &g_instructions[166], }, .count = 2U }, + [0x95b] = { .instructions = { &g_instructions[165], &g_instructions[166], }, .count = 2U }, + [0x95c] = { .instructions = { &g_instructions[165], &g_instructions[166], }, .count = 2U }, + [0x95d] = { .instructions = { &g_instructions[165], &g_instructions[166], }, .count = 2U }, + [0x95e] = { .instructions = { &g_instructions[165], &g_instructions[166], }, .count = 2U }, + [0x95f] = { .instructions = { &g_instructions[165], &g_instructions[166], }, .count = 2U }, + [0x960] = { .instructions = { &g_instructions[10], }, .count = 1U }, + [0x961] = { .instructions = { &g_instructions[10], }, .count = 1U }, + [0x970] = { .instructions = { &g_instructions[166], }, .count = 1U }, + [0x971] = { .instructions = { &g_instructions[166], }, .count = 1U }, + [0x972] = { .instructions = { &g_instructions[166], }, .count = 1U }, + [0x973] = { .instructions = { &g_instructions[166], }, .count = 1U }, + [0x974] = { .instructions = { &g_instructions[166], }, .count = 1U }, + [0x975] = { .instructions = { &g_instructions[166], }, .count = 1U }, + [0x976] = { .instructions = { &g_instructions[166], }, .count = 1U }, + [0x977] = { .instructions = { &g_instructions[166], }, .count = 1U }, + [0x978] = { .instructions = { &g_instructions[166], }, .count = 1U }, + [0x979] = { .instructions = { &g_instructions[166], }, .count = 1U }, + [0x97a] = { .instructions = { &g_instructions[166], }, .count = 1U }, + [0x97b] = { .instructions = { &g_instructions[166], }, .count = 1U }, + [0x97c] = { .instructions = { &g_instructions[166], }, .count = 1U }, + [0x97d] = { .instructions = { &g_instructions[166], }, .count = 1U }, + [0x97e] = { .instructions = { &g_instructions[166], }, .count = 1U }, + [0x97f] = { .instructions = { &g_instructions[166], }, .count = 1U }, + [0x980] = { .instructions = { &g_instructions[170], }, .count = 1U }, + [0x981] = { .instructions = { &g_instructions[170], }, .count = 1U }, + [0x982] = { .instructions = { &g_instructions[170], }, .count = 1U }, + [0x983] = { .instructions = { &g_instructions[170], }, .count = 1U }, + [0x984] = { .instructions = { &g_instructions[170], }, .count = 1U }, + [0x985] = { .instructions = { &g_instructions[170], }, .count = 1U }, + [0x986] = { .instructions = { &g_instructions[170], }, .count = 1U }, + [0x987] = { .instructions = { &g_instructions[170], }, .count = 1U }, + [0x988] = { .instructions = { &g_instructions[170], }, .count = 1U }, + [0x989] = { .instructions = { &g_instructions[170], }, .count = 1U }, + [0x98a] = { .instructions = { &g_instructions[170], }, .count = 1U }, + [0x98b] = { .instructions = { &g_instructions[170], }, .count = 1U }, + [0x98c] = { .instructions = { &g_instructions[170], }, .count = 1U }, + [0x98d] = { .instructions = { &g_instructions[170], }, .count = 1U }, + [0x98e] = { .instructions = { &g_instructions[170], }, .count = 1U }, + [0x98f] = { .instructions = { &g_instructions[170], }, .count = 1U }, + [0x990] = { .instructions = { &g_instructions[9], &g_instructions[164], }, .count = 2U }, + [0x991] = { .instructions = { &g_instructions[164], }, .count = 1U }, + [0x992] = { .instructions = { &g_instructions[164], }, .count = 1U }, + [0x993] = { .instructions = { &g_instructions[164], }, .count = 1U }, + [0x994] = { .instructions = { &g_instructions[164], }, .count = 1U }, + [0x995] = { .instructions = { &g_instructions[164], }, .count = 1U }, + [0x996] = { .instructions = { &g_instructions[164], }, .count = 1U }, + [0x997] = { .instructions = { &g_instructions[164], }, .count = 1U }, + [0x998] = { .instructions = { &g_instructions[164], }, .count = 1U }, + [0x999] = { .instructions = { &g_instructions[164], }, .count = 1U }, + [0x99a] = { .instructions = { &g_instructions[164], }, .count = 1U }, + [0x99b] = { .instructions = { &g_instructions[164], }, .count = 1U }, + [0x99c] = { .instructions = { &g_instructions[164], }, .count = 1U }, + [0x99d] = { .instructions = { &g_instructions[164], }, .count = 1U }, + [0x99e] = { .instructions = { &g_instructions[164], }, .count = 1U }, + [0x99f] = { .instructions = { &g_instructions[164], }, .count = 1U }, + [0x9a0] = { .instructions = { &g_instructions[170], }, .count = 1U }, + [0x9a1] = { .instructions = { &g_instructions[170], }, .count = 1U }, + [0x9a2] = { .instructions = { &g_instructions[170], }, .count = 1U }, + [0x9a3] = { .instructions = { &g_instructions[170], }, .count = 1U }, + [0x9a4] = { .instructions = { &g_instructions[170], }, .count = 1U }, + [0x9a5] = { .instructions = { &g_instructions[170], }, .count = 1U }, + [0x9a6] = { .instructions = { &g_instructions[170], }, .count = 1U }, + [0x9a7] = { .instructions = { &g_instructions[170], }, .count = 1U }, + [0x9a8] = { .instructions = { &g_instructions[170], }, .count = 1U }, + [0x9a9] = { .instructions = { &g_instructions[170], }, .count = 1U }, + [0x9aa] = { .instructions = { &g_instructions[170], }, .count = 1U }, + [0x9ab] = { .instructions = { &g_instructions[170], }, .count = 1U }, + [0x9ac] = { .instructions = { &g_instructions[170], }, .count = 1U }, + [0x9ad] = { .instructions = { &g_instructions[170], }, .count = 1U }, + [0x9ae] = { .instructions = { &g_instructions[170], }, .count = 1U }, + [0x9af] = { .instructions = { &g_instructions[170], }, .count = 1U }, + [0x9b0] = { .instructions = { &g_instructions[9], &g_instructions[164], }, .count = 2U }, + [0x9b1] = { .instructions = { &g_instructions[164], }, .count = 1U }, + [0x9b2] = { .instructions = { &g_instructions[164], }, .count = 1U }, + [0x9b3] = { .instructions = { &g_instructions[164], }, .count = 1U }, + [0x9b4] = { .instructions = { &g_instructions[164], }, .count = 1U }, + [0x9b5] = { .instructions = { &g_instructions[164], }, .count = 1U }, + [0x9b6] = { .instructions = { &g_instructions[164], }, .count = 1U }, + [0x9b7] = { .instructions = { &g_instructions[164], }, .count = 1U }, + [0x9b8] = { .instructions = { &g_instructions[164], }, .count = 1U }, + [0x9b9] = { .instructions = { &g_instructions[164], }, .count = 1U }, + [0x9ba] = { .instructions = { &g_instructions[164], }, .count = 1U }, + [0x9bb] = { .instructions = { &g_instructions[164], }, .count = 1U }, + [0x9bc] = { .instructions = { &g_instructions[164], }, .count = 1U }, + [0x9bd] = { .instructions = { &g_instructions[164], }, .count = 1U }, + [0x9be] = { .instructions = { &g_instructions[164], }, .count = 1U }, + [0x9bf] = { .instructions = { &g_instructions[164], }, .count = 1U }, + [0x9c0] = { .instructions = { &g_instructions[10], &g_instructions[171], }, .count = 2U }, + [0x9c1] = { .instructions = { &g_instructions[10], &g_instructions[171], }, .count = 2U }, + [0x9c2] = { .instructions = { &g_instructions[171], }, .count = 1U }, + [0x9c3] = { .instructions = { &g_instructions[171], }, .count = 1U }, + [0x9c4] = { .instructions = { &g_instructions[171], }, .count = 1U }, + [0x9c5] = { .instructions = { &g_instructions[171], }, .count = 1U }, + [0x9c6] = { .instructions = { &g_instructions[171], }, .count = 1U }, + [0x9c7] = { .instructions = { &g_instructions[171], }, .count = 1U }, + [0x9c8] = { .instructions = { &g_instructions[171], }, .count = 1U }, + [0x9c9] = { .instructions = { &g_instructions[171], }, .count = 1U }, + [0x9ca] = { .instructions = { &g_instructions[171], }, .count = 1U }, + [0x9cb] = { .instructions = { &g_instructions[171], }, .count = 1U }, + [0x9cc] = { .instructions = { &g_instructions[171], }, .count = 1U }, + [0x9cd] = { .instructions = { &g_instructions[171], }, .count = 1U }, + [0x9ce] = { .instructions = { &g_instructions[171], }, .count = 1U }, + [0x9cf] = { .instructions = { &g_instructions[171], }, .count = 1U }, + [0x9d0] = { .instructions = { &g_instructions[165], &g_instructions[166], }, .count = 2U }, + [0x9d1] = { .instructions = { &g_instructions[165], &g_instructions[166], }, .count = 2U }, + [0x9d2] = { .instructions = { &g_instructions[165], &g_instructions[166], }, .count = 2U }, + [0x9d3] = { .instructions = { &g_instructions[165], &g_instructions[166], }, .count = 2U }, + [0x9d4] = { .instructions = { &g_instructions[165], &g_instructions[166], }, .count = 2U }, + [0x9d5] = { .instructions = { &g_instructions[165], &g_instructions[166], }, .count = 2U }, + [0x9d6] = { .instructions = { &g_instructions[165], &g_instructions[166], }, .count = 2U }, + [0x9d7] = { .instructions = { &g_instructions[165], &g_instructions[166], }, .count = 2U }, + [0x9d8] = { .instructions = { &g_instructions[165], &g_instructions[166], }, .count = 2U }, + [0x9d9] = { .instructions = { &g_instructions[165], &g_instructions[166], }, .count = 2U }, + [0x9da] = { .instructions = { &g_instructions[165], &g_instructions[166], }, .count = 2U }, + [0x9db] = { .instructions = { &g_instructions[165], &g_instructions[166], }, .count = 2U }, + [0x9dc] = { .instructions = { &g_instructions[165], &g_instructions[166], }, .count = 2U }, + [0x9dd] = { .instructions = { &g_instructions[165], &g_instructions[166], }, .count = 2U }, + [0x9de] = { .instructions = { &g_instructions[165], &g_instructions[166], }, .count = 2U }, + [0x9df] = { .instructions = { &g_instructions[165], &g_instructions[166], }, .count = 2U }, + [0x9e0] = { .instructions = { &g_instructions[10], }, .count = 1U }, + [0x9e1] = { .instructions = { &g_instructions[10], }, .count = 1U }, + [0x9f0] = { .instructions = { &g_instructions[166], }, .count = 1U }, + [0x9f1] = { .instructions = { &g_instructions[166], }, .count = 1U }, + [0x9f2] = { .instructions = { &g_instructions[166], }, .count = 1U }, + [0x9f3] = { .instructions = { &g_instructions[166], }, .count = 1U }, + [0x9f4] = { .instructions = { &g_instructions[166], }, .count = 1U }, + [0x9f5] = { .instructions = { &g_instructions[166], }, .count = 1U }, + [0x9f6] = { .instructions = { &g_instructions[166], }, .count = 1U }, + [0x9f7] = { .instructions = { &g_instructions[166], }, .count = 1U }, + [0x9f8] = { .instructions = { &g_instructions[166], }, .count = 1U }, + [0x9f9] = { .instructions = { &g_instructions[166], }, .count = 1U }, + [0x9fa] = { .instructions = { &g_instructions[166], }, .count = 1U }, + [0x9fb] = { .instructions = { &g_instructions[166], }, .count = 1U }, + [0x9fc] = { .instructions = { &g_instructions[166], }, .count = 1U }, + [0x9fd] = { .instructions = { &g_instructions[166], }, .count = 1U }, + [0x9fe] = { .instructions = { &g_instructions[166], }, .count = 1U }, + [0x9ff] = { .instructions = { &g_instructions[166], }, .count = 1U }, [0xa00] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, - [0xb00] = { .instructions = { &g_instructions[6], }, .count = 1U }, - [0xc00] = { .instructions = { &g_instructions[17], }, .count = 1U }, - [0xc10] = { .instructions = { &g_instructions[12], }, .count = 1U }, - [0xc40] = { .instructions = { &g_instructions[14], }, .count = 1U }, - [0xc50] = { .instructions = { &g_instructions[16], }, .count = 1U }, - [0xe00] = { .instructions = { &g_instructions[11], }, .count = 1U }, - [0xe01] = { .instructions = { &g_instructions[13], }, .count = 1U }, - [0xe11] = { .instructions = { &g_instructions[15], }, .count = 1U }, - [0xf00] = { .instructions = { &g_instructions[67], }, .count = 1U }, + [0xa01] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa02] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa03] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa04] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa05] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa06] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa07] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa08] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa09] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa0a] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa0b] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa0c] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa0d] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa0e] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa0f] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa10] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa11] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa12] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa13] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa14] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa15] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa16] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa17] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa18] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa19] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa1a] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa1b] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa1c] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa1d] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa1e] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa1f] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa20] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa21] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa22] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa23] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa24] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa25] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa26] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa27] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa28] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa29] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa2a] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa2b] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa2c] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa2d] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa2e] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa2f] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa30] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa31] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa32] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa33] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa34] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa35] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa36] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa37] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa38] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa39] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa3a] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa3b] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa3c] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa3d] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa3e] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa3f] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa40] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa41] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa42] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa43] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa44] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa45] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa46] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa47] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa48] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa49] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa4a] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa4b] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa4c] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa4d] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa4e] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa4f] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa50] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa51] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa52] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa53] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa54] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa55] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa56] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa57] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa58] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa59] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa5a] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa5b] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa5c] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa5d] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa5e] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa5f] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa60] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa61] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa62] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa63] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa64] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa65] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa66] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa67] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa68] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa69] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa6a] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa6b] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa6c] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa6d] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa6e] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa6f] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa70] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa71] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa72] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa73] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa74] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa75] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa76] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa77] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa78] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa79] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa7a] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa7b] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa7c] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa7d] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa7e] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa7f] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa80] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa81] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa82] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa83] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa84] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa85] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa86] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa87] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa88] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa89] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa8a] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa8b] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa8c] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa8d] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa8e] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa8f] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa90] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa91] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa92] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa93] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa94] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa95] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa96] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa97] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa98] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa99] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa9a] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa9b] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa9c] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa9d] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa9e] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xa9f] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xaa0] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xaa1] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xaa2] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xaa3] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xaa4] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xaa5] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xaa6] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xaa7] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xaa8] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xaa9] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xaaa] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xaab] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xaac] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xaad] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xaae] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xaaf] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xab0] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xab1] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xab2] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xab3] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xab4] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xab5] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xab6] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xab7] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xab8] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xab9] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xaba] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xabb] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xabc] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xabd] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xabe] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xabf] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xac0] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xac1] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xac2] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xac3] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xac4] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xac5] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xac6] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xac7] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xac8] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xac9] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xaca] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xacb] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xacc] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xacd] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xace] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xacf] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xad0] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xad1] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xad2] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xad3] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xad4] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xad5] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xad6] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xad7] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xad8] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xad9] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xada] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xadb] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xadc] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xadd] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xade] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xadf] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xae0] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xae1] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xae2] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xae3] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xae4] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xae5] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xae6] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xae7] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xae8] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xae9] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xaea] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xaeb] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xaec] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xaed] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xaee] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xaef] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xaf0] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xaf1] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xaf2] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xaf3] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xaf4] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xaf5] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xaf6] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xaf7] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xaf8] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xaf9] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xafa] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xafb] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xafc] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xafd] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xafe] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xaff] = { .instructions = { &g_instructions[3], &g_instructions[5], }, .count = 2U }, + [0xb00] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb01] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb02] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb03] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb04] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb05] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb06] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb07] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb08] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb09] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb0a] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb0b] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb0c] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb0d] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb0e] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb0f] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb10] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb11] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb12] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb13] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb14] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb15] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb16] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb17] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb18] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb19] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb1a] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb1b] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb1c] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb1d] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb1e] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb1f] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb20] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb21] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb22] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb23] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb24] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb25] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb26] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb27] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb28] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb29] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb2a] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb2b] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb2c] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb2d] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb2e] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb2f] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb30] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb31] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb32] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb33] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb34] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb35] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb36] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb37] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb38] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb39] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb3a] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb3b] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb3c] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb3d] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb3e] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb3f] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb40] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb41] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb42] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb43] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb44] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb45] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb46] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb47] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb48] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb49] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb4a] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb4b] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb4c] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb4d] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb4e] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb4f] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb50] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb51] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb52] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb53] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb54] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb55] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb56] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb57] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb58] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb59] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb5a] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb5b] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb5c] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb5d] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb5e] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb5f] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb60] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb61] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb62] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb63] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb64] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb65] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb66] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb67] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb68] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb69] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb6a] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb6b] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb6c] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb6d] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb6e] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb6f] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb70] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb71] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb72] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb73] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb74] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb75] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb76] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb77] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb78] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb79] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb7a] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb7b] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb7c] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb7d] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb7e] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb7f] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb80] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb81] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb82] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb83] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb84] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb85] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb86] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb87] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb88] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb89] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb8a] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb8b] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb8c] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb8d] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb8e] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb8f] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb90] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb91] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb92] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb93] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb94] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb95] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb96] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb97] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb98] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb99] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb9a] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb9b] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb9c] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb9d] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb9e] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xb9f] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xba0] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xba1] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xba2] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xba3] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xba4] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xba5] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xba6] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xba7] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xba8] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xba9] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xbaa] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xbab] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xbac] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xbad] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xbae] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xbaf] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xbb0] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xbb1] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xbb2] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xbb3] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xbb4] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xbb5] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xbb6] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xbb7] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xbb8] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xbb9] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xbba] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xbbb] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xbbc] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xbbd] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xbbe] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xbbf] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xbc0] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xbc1] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xbc2] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xbc3] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xbc4] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xbc5] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xbc6] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xbc7] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xbc8] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xbc9] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xbca] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xbcb] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xbcc] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xbcd] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xbce] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xbcf] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xbd0] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xbd1] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xbd2] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xbd3] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xbd4] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xbd5] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xbd6] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xbd7] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xbd8] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xbd9] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xbda] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xbdb] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xbdc] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xbdd] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xbde] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xbdf] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xbe0] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xbe1] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xbe2] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xbe3] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xbe4] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xbe5] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xbe6] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xbe7] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xbe8] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xbe9] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xbea] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xbeb] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xbec] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xbed] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xbee] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xbef] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xbf0] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xbf1] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xbf2] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xbf3] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xbf4] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xbf5] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xbf6] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xbf7] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xbf8] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xbf9] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xbfa] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xbfb] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xbfc] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xbfd] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xbfe] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xbff] = { .instructions = { &g_instructions[3], &g_instructions[6], }, .count = 2U }, + [0xc00] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xc01] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xc02] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xc03] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xc04] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xc05] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xc06] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xc07] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xc08] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xc09] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xc0a] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xc0b] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xc0c] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xc0d] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xc0e] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xc0f] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xc10] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xc11] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xc12] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xc13] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xc14] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xc15] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xc16] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xc17] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xc18] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xc19] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xc1a] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xc1b] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xc1c] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xc1d] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xc1e] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xc1f] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xc20] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xc21] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xc22] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xc23] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xc24] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xc25] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xc26] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xc27] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xc28] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xc29] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xc2a] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xc2b] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xc2c] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xc2d] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xc2e] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xc2f] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xc30] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xc31] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xc32] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xc33] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xc34] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xc35] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xc36] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xc37] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xc38] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xc39] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xc3a] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xc3b] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xc3c] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xc3d] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xc3e] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xc3f] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xc40] = { .instructions = { &g_instructions[17], &g_instructions[21], }, .count = 2U }, + [0xc41] = { .instructions = { &g_instructions[17], &g_instructions[21], }, .count = 2U }, + [0xc42] = { .instructions = { &g_instructions[17], &g_instructions[21], }, .count = 2U }, + [0xc43] = { .instructions = { &g_instructions[17], &g_instructions[21], }, .count = 2U }, + [0xc44] = { .instructions = { &g_instructions[17], &g_instructions[21], }, .count = 2U }, + [0xc45] = { .instructions = { &g_instructions[17], &g_instructions[21], }, .count = 2U }, + [0xc46] = { .instructions = { &g_instructions[17], &g_instructions[21], }, .count = 2U }, + [0xc47] = { .instructions = { &g_instructions[17], &g_instructions[21], }, .count = 2U }, + [0xc48] = { .instructions = { &g_instructions[17], &g_instructions[21], }, .count = 2U }, + [0xc49] = { .instructions = { &g_instructions[17], &g_instructions[21], }, .count = 2U }, + [0xc4a] = { .instructions = { &g_instructions[17], &g_instructions[21], }, .count = 2U }, + [0xc4b] = { .instructions = { &g_instructions[17], &g_instructions[21], }, .count = 2U }, + [0xc4c] = { .instructions = { &g_instructions[17], &g_instructions[21], }, .count = 2U }, + [0xc4d] = { .instructions = { &g_instructions[17], &g_instructions[21], }, .count = 2U }, + [0xc4e] = { .instructions = { &g_instructions[17], &g_instructions[21], }, .count = 2U }, + [0xc4f] = { .instructions = { &g_instructions[17], &g_instructions[21], }, .count = 2U }, + [0xc50] = { .instructions = { &g_instructions[19], &g_instructions[20], }, .count = 2U }, + [0xc51] = { .instructions = { &g_instructions[19], &g_instructions[20], }, .count = 2U }, + [0xc52] = { .instructions = { &g_instructions[19], &g_instructions[20], }, .count = 2U }, + [0xc53] = { .instructions = { &g_instructions[19], &g_instructions[20], }, .count = 2U }, + [0xc54] = { .instructions = { &g_instructions[19], &g_instructions[20], }, .count = 2U }, + [0xc55] = { .instructions = { &g_instructions[19], &g_instructions[20], }, .count = 2U }, + [0xc56] = { .instructions = { &g_instructions[19], &g_instructions[20], }, .count = 2U }, + [0xc57] = { .instructions = { &g_instructions[19], &g_instructions[20], }, .count = 2U }, + [0xc58] = { .instructions = { &g_instructions[19], &g_instructions[20], }, .count = 2U }, + [0xc59] = { .instructions = { &g_instructions[19], &g_instructions[20], }, .count = 2U }, + [0xc5a] = { .instructions = { &g_instructions[19], &g_instructions[20], }, .count = 2U }, + [0xc5b] = { .instructions = { &g_instructions[19], &g_instructions[20], }, .count = 2U }, + [0xc5c] = { .instructions = { &g_instructions[19], &g_instructions[20], }, .count = 2U }, + [0xc5d] = { .instructions = { &g_instructions[19], &g_instructions[20], }, .count = 2U }, + [0xc5e] = { .instructions = { &g_instructions[19], &g_instructions[20], }, .count = 2U }, + [0xc5f] = { .instructions = { &g_instructions[19], &g_instructions[20], }, .count = 2U }, + [0xc60] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xc61] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xc62] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xc63] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xc64] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xc65] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xc66] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xc67] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xc68] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xc69] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xc6a] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xc6b] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xc6c] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xc6d] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xc6e] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xc6f] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xc70] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xc71] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xc72] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xc73] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xc74] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xc75] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xc76] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xc77] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xc78] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xc79] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xc7a] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xc7b] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xc7c] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xc7d] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xc7e] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xc7f] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xc80] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xc81] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xc82] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xc83] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xc84] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xc85] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xc86] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xc87] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xc88] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xc89] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xc8a] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xc8b] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xc8c] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xc8d] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xc8e] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xc8f] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xc90] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xc91] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xc92] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xc93] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xc94] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xc95] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xc96] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xc97] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xc98] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xc99] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xc9a] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xc9b] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xc9c] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xc9d] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xc9e] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xc9f] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xca0] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xca1] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xca2] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xca3] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xca4] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xca5] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xca6] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xca7] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xca8] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xca9] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xcaa] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xcab] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xcac] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xcad] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xcae] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xcaf] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xcb0] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xcb1] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xcb2] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xcb3] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xcb4] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xcb5] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xcb6] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xcb7] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xcb8] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xcb9] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xcba] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xcbb] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xcbc] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xcbd] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xcbe] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xcbf] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xcc0] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xcc1] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xcc2] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xcc3] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xcc4] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xcc5] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xcc6] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xcc7] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xcc8] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xcc9] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xcca] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xccb] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xccc] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xccd] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xcce] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xccf] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xcd0] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xcd1] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xcd2] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xcd3] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xcd4] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xcd5] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xcd6] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xcd7] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xcd8] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xcd9] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xcda] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xcdb] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xcdc] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xcdd] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xcde] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xcdf] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xce0] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xce1] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xce2] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xce3] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xce4] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xce5] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xce6] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xce7] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xce8] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xce9] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xcea] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xceb] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xcec] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xced] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xcee] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xcef] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xcf0] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xcf1] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xcf2] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xcf3] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xcf4] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xcf5] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xcf6] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xcf7] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xcf8] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xcf9] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xcfa] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xcfb] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xcfc] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xcfd] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xcfe] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xcff] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xd00] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xd01] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xd02] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xd03] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xd04] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xd05] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xd06] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xd07] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xd08] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xd09] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xd0a] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xd0b] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xd0c] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xd0d] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xd0e] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xd0f] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xd10] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xd11] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xd12] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xd13] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xd14] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xd15] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xd16] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xd17] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xd18] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xd19] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xd1a] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xd1b] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xd1c] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xd1d] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xd1e] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xd1f] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xd20] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xd21] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xd22] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xd23] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xd24] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xd25] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xd26] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xd27] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xd28] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xd29] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xd2a] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xd2b] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xd2c] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xd2d] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xd2e] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xd2f] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xd30] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xd31] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xd32] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xd33] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xd34] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xd35] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xd36] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xd37] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xd38] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xd39] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xd3a] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xd3b] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xd3c] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xd3d] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xd3e] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xd3f] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xd40] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xd41] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xd42] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xd43] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xd44] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xd45] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xd46] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xd47] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xd48] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xd49] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xd4a] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xd4b] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xd4c] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xd4d] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xd4e] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xd4f] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xd50] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xd51] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xd52] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xd53] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xd54] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xd55] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xd56] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xd57] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xd58] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xd59] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xd5a] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xd5b] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xd5c] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xd5d] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xd5e] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xd5f] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xd60] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xd61] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xd62] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xd63] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xd64] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xd65] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xd66] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xd67] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xd68] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xd69] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xd6a] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xd6b] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xd6c] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xd6d] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xd6e] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xd6f] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xd70] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xd71] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xd72] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xd73] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xd74] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xd75] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xd76] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xd77] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xd78] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xd79] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xd7a] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xd7b] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xd7c] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xd7d] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xd7e] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xd7f] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xd80] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xd81] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xd82] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xd83] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xd84] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xd85] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xd86] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xd87] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xd88] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xd89] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xd8a] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xd8b] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xd8c] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xd8d] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xd8e] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xd8f] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xd90] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xd91] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xd92] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xd93] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xd94] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xd95] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xd96] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xd97] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xd98] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xd99] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xd9a] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xd9b] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xd9c] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xd9d] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xd9e] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xd9f] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xda0] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xda1] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xda2] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xda3] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xda4] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xda5] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xda6] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xda7] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xda8] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xda9] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xdaa] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xdab] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xdac] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xdad] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xdae] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xdaf] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xdb0] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xdb1] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xdb2] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xdb3] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xdb4] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xdb5] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xdb6] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xdb7] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xdb8] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xdb9] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xdba] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xdbb] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xdbc] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xdbd] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xdbe] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xdbf] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xdc0] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xdc1] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xdc2] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xdc3] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xdc4] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xdc5] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xdc6] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xdc7] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xdc8] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xdc9] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xdca] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xdcb] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xdcc] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xdcd] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xdce] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xdcf] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xdd0] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xdd1] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xdd2] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xdd3] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xdd4] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xdd5] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xdd6] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xdd7] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xdd8] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xdd9] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xdda] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xddb] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xddc] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xddd] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xdde] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xddf] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xde0] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xde1] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xde2] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xde3] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xde4] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xde5] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xde6] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xde7] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xde8] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xde9] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xdea] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xdeb] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xdec] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xded] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xdee] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xdef] = { .instructions = { &g_instructions[21], }, .count = 1U }, + [0xdf0] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xdf1] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xdf2] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xdf3] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xdf4] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xdf5] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xdf6] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xdf7] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xdf8] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xdf9] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xdfa] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xdfb] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xdfc] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xdfd] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xdfe] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xdff] = { .instructions = { &g_instructions[20], }, .count = 1U }, + [0xe00] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xe01] = { .instructions = { &g_instructions[16], }, .count = 1U }, + [0xe02] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xe03] = { .instructions = { &g_instructions[16], }, .count = 1U }, + [0xe04] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xe05] = { .instructions = { &g_instructions[16], }, .count = 1U }, + [0xe06] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xe07] = { .instructions = { &g_instructions[16], }, .count = 1U }, + [0xe08] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xe09] = { .instructions = { &g_instructions[16], }, .count = 1U }, + [0xe0a] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xe0b] = { .instructions = { &g_instructions[16], }, .count = 1U }, + [0xe0c] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xe0d] = { .instructions = { &g_instructions[16], }, .count = 1U }, + [0xe0e] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xe0f] = { .instructions = { &g_instructions[16], }, .count = 1U }, + [0xe10] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xe11] = { .instructions = { &g_instructions[18], }, .count = 1U }, + [0xe12] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xe13] = { .instructions = { &g_instructions[18], }, .count = 1U }, + [0xe14] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xe15] = { .instructions = { &g_instructions[18], }, .count = 1U }, + [0xe16] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xe17] = { .instructions = { &g_instructions[18], }, .count = 1U }, + [0xe18] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xe19] = { .instructions = { &g_instructions[18], }, .count = 1U }, + [0xe1a] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xe1b] = { .instructions = { &g_instructions[18], }, .count = 1U }, + [0xe1c] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xe1d] = { .instructions = { &g_instructions[18], }, .count = 1U }, + [0xe1e] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xe1f] = { .instructions = { &g_instructions[18], }, .count = 1U }, + [0xe20] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xe21] = { .instructions = { &g_instructions[16], }, .count = 1U }, + [0xe22] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xe23] = { .instructions = { &g_instructions[16], }, .count = 1U }, + [0xe24] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xe25] = { .instructions = { &g_instructions[16], }, .count = 1U }, + [0xe26] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xe27] = { .instructions = { &g_instructions[16], }, .count = 1U }, + [0xe28] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xe29] = { .instructions = { &g_instructions[16], }, .count = 1U }, + [0xe2a] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xe2b] = { .instructions = { &g_instructions[16], }, .count = 1U }, + [0xe2c] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xe2d] = { .instructions = { &g_instructions[16], }, .count = 1U }, + [0xe2e] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xe2f] = { .instructions = { &g_instructions[16], }, .count = 1U }, + [0xe30] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xe31] = { .instructions = { &g_instructions[18], }, .count = 1U }, + [0xe32] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xe33] = { .instructions = { &g_instructions[18], }, .count = 1U }, + [0xe34] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xe35] = { .instructions = { &g_instructions[18], }, .count = 1U }, + [0xe36] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xe37] = { .instructions = { &g_instructions[18], }, .count = 1U }, + [0xe38] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xe39] = { .instructions = { &g_instructions[18], }, .count = 1U }, + [0xe3a] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xe3b] = { .instructions = { &g_instructions[18], }, .count = 1U }, + [0xe3c] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xe3d] = { .instructions = { &g_instructions[18], }, .count = 1U }, + [0xe3e] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xe3f] = { .instructions = { &g_instructions[18], }, .count = 1U }, + [0xe40] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xe41] = { .instructions = { &g_instructions[16], }, .count = 1U }, + [0xe42] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xe43] = { .instructions = { &g_instructions[16], }, .count = 1U }, + [0xe44] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xe45] = { .instructions = { &g_instructions[16], }, .count = 1U }, + [0xe46] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xe47] = { .instructions = { &g_instructions[16], }, .count = 1U }, + [0xe48] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xe49] = { .instructions = { &g_instructions[16], }, .count = 1U }, + [0xe4a] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xe4b] = { .instructions = { &g_instructions[16], }, .count = 1U }, + [0xe4c] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xe4d] = { .instructions = { &g_instructions[16], }, .count = 1U }, + [0xe4e] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xe4f] = { .instructions = { &g_instructions[16], }, .count = 1U }, + [0xe50] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xe51] = { .instructions = { &g_instructions[18], }, .count = 1U }, + [0xe52] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xe53] = { .instructions = { &g_instructions[18], }, .count = 1U }, + [0xe54] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xe55] = { .instructions = { &g_instructions[18], }, .count = 1U }, + [0xe56] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xe57] = { .instructions = { &g_instructions[18], }, .count = 1U }, + [0xe58] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xe59] = { .instructions = { &g_instructions[18], }, .count = 1U }, + [0xe5a] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xe5b] = { .instructions = { &g_instructions[18], }, .count = 1U }, + [0xe5c] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xe5d] = { .instructions = { &g_instructions[18], }, .count = 1U }, + [0xe5e] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xe5f] = { .instructions = { &g_instructions[18], }, .count = 1U }, + [0xe60] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xe61] = { .instructions = { &g_instructions[16], }, .count = 1U }, + [0xe62] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xe63] = { .instructions = { &g_instructions[16], }, .count = 1U }, + [0xe64] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xe65] = { .instructions = { &g_instructions[16], }, .count = 1U }, + [0xe66] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xe67] = { .instructions = { &g_instructions[16], }, .count = 1U }, + [0xe68] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xe69] = { .instructions = { &g_instructions[16], }, .count = 1U }, + [0xe6a] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xe6b] = { .instructions = { &g_instructions[16], }, .count = 1U }, + [0xe6c] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xe6d] = { .instructions = { &g_instructions[16], }, .count = 1U }, + [0xe6e] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xe6f] = { .instructions = { &g_instructions[16], }, .count = 1U }, + [0xe70] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xe71] = { .instructions = { &g_instructions[18], }, .count = 1U }, + [0xe72] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xe73] = { .instructions = { &g_instructions[18], }, .count = 1U }, + [0xe74] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xe75] = { .instructions = { &g_instructions[18], }, .count = 1U }, + [0xe76] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xe77] = { .instructions = { &g_instructions[18], }, .count = 1U }, + [0xe78] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xe79] = { .instructions = { &g_instructions[18], }, .count = 1U }, + [0xe7a] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xe7b] = { .instructions = { &g_instructions[18], }, .count = 1U }, + [0xe7c] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xe7d] = { .instructions = { &g_instructions[18], }, .count = 1U }, + [0xe7e] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xe7f] = { .instructions = { &g_instructions[18], }, .count = 1U }, + [0xe80] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xe81] = { .instructions = { &g_instructions[16], }, .count = 1U }, + [0xe82] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xe83] = { .instructions = { &g_instructions[16], }, .count = 1U }, + [0xe84] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xe85] = { .instructions = { &g_instructions[16], }, .count = 1U }, + [0xe86] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xe87] = { .instructions = { &g_instructions[16], }, .count = 1U }, + [0xe88] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xe89] = { .instructions = { &g_instructions[16], }, .count = 1U }, + [0xe8a] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xe8b] = { .instructions = { &g_instructions[16], }, .count = 1U }, + [0xe8c] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xe8d] = { .instructions = { &g_instructions[16], }, .count = 1U }, + [0xe8e] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xe8f] = { .instructions = { &g_instructions[16], }, .count = 1U }, + [0xe90] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xe91] = { .instructions = { &g_instructions[18], }, .count = 1U }, + [0xe92] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xe93] = { .instructions = { &g_instructions[18], }, .count = 1U }, + [0xe94] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xe95] = { .instructions = { &g_instructions[18], }, .count = 1U }, + [0xe96] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xe97] = { .instructions = { &g_instructions[18], }, .count = 1U }, + [0xe98] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xe99] = { .instructions = { &g_instructions[18], }, .count = 1U }, + [0xe9a] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xe9b] = { .instructions = { &g_instructions[18], }, .count = 1U }, + [0xe9c] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xe9d] = { .instructions = { &g_instructions[18], }, .count = 1U }, + [0xe9e] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xe9f] = { .instructions = { &g_instructions[18], }, .count = 1U }, + [0xea0] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xea1] = { .instructions = { &g_instructions[16], }, .count = 1U }, + [0xea2] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xea3] = { .instructions = { &g_instructions[16], }, .count = 1U }, + [0xea4] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xea5] = { .instructions = { &g_instructions[16], }, .count = 1U }, + [0xea6] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xea7] = { .instructions = { &g_instructions[16], }, .count = 1U }, + [0xea8] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xea9] = { .instructions = { &g_instructions[16], }, .count = 1U }, + [0xeaa] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xeab] = { .instructions = { &g_instructions[16], }, .count = 1U }, + [0xeac] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xead] = { .instructions = { &g_instructions[16], }, .count = 1U }, + [0xeae] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xeaf] = { .instructions = { &g_instructions[16], }, .count = 1U }, + [0xeb0] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xeb1] = { .instructions = { &g_instructions[18], }, .count = 1U }, + [0xeb2] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xeb3] = { .instructions = { &g_instructions[18], }, .count = 1U }, + [0xeb4] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xeb5] = { .instructions = { &g_instructions[18], }, .count = 1U }, + [0xeb6] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xeb7] = { .instructions = { &g_instructions[18], }, .count = 1U }, + [0xeb8] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xeb9] = { .instructions = { &g_instructions[18], }, .count = 1U }, + [0xeba] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xebb] = { .instructions = { &g_instructions[18], }, .count = 1U }, + [0xebc] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xebd] = { .instructions = { &g_instructions[18], }, .count = 1U }, + [0xebe] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xebf] = { .instructions = { &g_instructions[18], }, .count = 1U }, + [0xec0] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xec1] = { .instructions = { &g_instructions[16], }, .count = 1U }, + [0xec2] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xec3] = { .instructions = { &g_instructions[16], }, .count = 1U }, + [0xec4] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xec5] = { .instructions = { &g_instructions[16], }, .count = 1U }, + [0xec6] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xec7] = { .instructions = { &g_instructions[16], }, .count = 1U }, + [0xec8] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xec9] = { .instructions = { &g_instructions[16], }, .count = 1U }, + [0xeca] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xecb] = { .instructions = { &g_instructions[16], }, .count = 1U }, + [0xecc] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xecd] = { .instructions = { &g_instructions[16], }, .count = 1U }, + [0xece] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xecf] = { .instructions = { &g_instructions[16], }, .count = 1U }, + [0xed0] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xed1] = { .instructions = { &g_instructions[18], }, .count = 1U }, + [0xed2] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xed3] = { .instructions = { &g_instructions[18], }, .count = 1U }, + [0xed4] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xed5] = { .instructions = { &g_instructions[18], }, .count = 1U }, + [0xed6] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xed7] = { .instructions = { &g_instructions[18], }, .count = 1U }, + [0xed8] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xed9] = { .instructions = { &g_instructions[18], }, .count = 1U }, + [0xeda] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xedb] = { .instructions = { &g_instructions[18], }, .count = 1U }, + [0xedc] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xedd] = { .instructions = { &g_instructions[18], }, .count = 1U }, + [0xede] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xedf] = { .instructions = { &g_instructions[18], }, .count = 1U }, + [0xee0] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xee1] = { .instructions = { &g_instructions[16], }, .count = 1U }, + [0xee2] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xee3] = { .instructions = { &g_instructions[16], }, .count = 1U }, + [0xee4] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xee5] = { .instructions = { &g_instructions[16], }, .count = 1U }, + [0xee6] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xee7] = { .instructions = { &g_instructions[16], }, .count = 1U }, + [0xee8] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xee9] = { .instructions = { &g_instructions[16], }, .count = 1U }, + [0xeea] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xeeb] = { .instructions = { &g_instructions[16], }, .count = 1U }, + [0xeec] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xeed] = { .instructions = { &g_instructions[16], }, .count = 1U }, + [0xeee] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xeef] = { .instructions = { &g_instructions[16], }, .count = 1U }, + [0xef0] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xef1] = { .instructions = { &g_instructions[18], }, .count = 1U }, + [0xef2] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xef3] = { .instructions = { &g_instructions[18], }, .count = 1U }, + [0xef4] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xef5] = { .instructions = { &g_instructions[18], }, .count = 1U }, + [0xef6] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xef7] = { .instructions = { &g_instructions[18], }, .count = 1U }, + [0xef8] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xef9] = { .instructions = { &g_instructions[18], }, .count = 1U }, + [0xefa] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xefb] = { .instructions = { &g_instructions[18], }, .count = 1U }, + [0xefc] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xefd] = { .instructions = { &g_instructions[18], }, .count = 1U }, + [0xefe] = { .instructions = { &g_instructions[15], }, .count = 1U }, + [0xeff] = { .instructions = { &g_instructions[18], }, .count = 1U }, + [0xf00] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf01] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf02] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf03] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf04] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf05] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf06] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf07] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf08] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf09] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf0a] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf0b] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf0c] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf0d] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf0e] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf0f] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf10] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf11] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf12] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf13] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf14] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf15] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf16] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf17] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf18] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf19] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf1a] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf1b] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf1c] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf1d] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf1e] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf1f] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf20] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf21] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf22] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf23] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf24] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf25] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf26] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf27] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf28] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf29] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf2a] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf2b] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf2c] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf2d] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf2e] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf2f] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf30] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf31] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf32] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf33] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf34] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf35] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf36] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf37] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf38] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf39] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf3a] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf3b] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf3c] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf3d] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf3e] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf3f] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf40] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf41] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf42] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf43] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf44] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf45] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf46] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf47] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf48] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf49] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf4a] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf4b] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf4c] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf4d] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf4e] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf4f] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf50] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf51] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf52] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf53] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf54] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf55] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf56] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf57] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf58] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf59] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf5a] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf5b] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf5c] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf5d] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf5e] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf5f] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf60] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf61] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf62] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf63] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf64] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf65] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf66] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf67] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf68] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf69] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf6a] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf6b] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf6c] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf6d] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf6e] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf6f] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf70] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf71] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf72] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf73] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf74] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf75] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf76] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf77] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf78] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf79] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf7a] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf7b] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf7c] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf7d] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf7e] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf7f] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf80] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf81] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf82] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf83] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf84] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf85] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf86] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf87] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf88] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf89] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf8a] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf8b] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf8c] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf8d] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf8e] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf8f] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf90] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf91] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf92] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf93] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf94] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf95] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf96] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf97] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf98] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf99] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf9a] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf9b] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf9c] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf9d] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf9e] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xf9f] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xfa0] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xfa1] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xfa2] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xfa3] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xfa4] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xfa5] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xfa6] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xfa7] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xfa8] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xfa9] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xfaa] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xfab] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xfac] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xfad] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xfae] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xfaf] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xfb0] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xfb1] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xfb2] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xfb3] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xfb4] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xfb5] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xfb6] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xfb7] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xfb8] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xfb9] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xfba] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xfbb] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xfbc] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xfbd] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xfbe] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xfbf] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xfc0] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xfc1] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xfc2] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xfc3] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xfc4] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xfc5] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xfc6] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xfc7] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xfc8] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xfc9] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xfca] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xfcb] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xfcc] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xfcd] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xfce] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xfcf] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xfd0] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xfd1] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xfd2] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xfd3] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xfd4] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xfd5] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xfd6] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xfd7] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xfd8] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xfd9] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xfda] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xfdb] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xfdc] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xfdd] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xfde] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xfdf] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xfe0] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xfe1] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xfe2] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xfe3] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xfe4] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xfe5] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xfe6] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xfe7] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xfe8] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xfe9] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xfea] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xfeb] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xfec] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xfed] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xfee] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xfef] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xff0] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xff1] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xff2] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xff3] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xff4] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xff5] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xff6] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xff7] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xff8] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xff9] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xffa] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xffb] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xffc] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xffd] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xffe] = { .instructions = { &g_instructions[71], }, .count = 1U }, + [0xfff] = { .instructions = { &g_instructions[71], }, .count = 1U }, }; diff --git a/src/jit/frontend/decoder/arm32_table_generated.h b/src/jit/frontend/decoder/arm32_table_generated.h index 76a0087..75e15fc 100644 --- a/src/jit/frontend/decoder/arm32_table_generated.h +++ b/src/jit/frontend/decoder/arm32_table_generated.h @@ -4,7 +4,7 @@ #include "arm32.h" #include -#define LOOKUP_TABLE_MAX_BUCKET_SIZE 18U +#define LOOKUP_TABLE_MAX_BUCKET_SIZE 64U typedef struct { const pvm_jit_decoder_arm32_instruction_info_t *instructions[LOOKUP_TABLE_MAX_BUCKET_SIZE]; diff --git a/src/main.c b/src/main.c index a1c4e9c..31e5046 100644 --- a/src/main.c +++ b/src/main.c @@ -9,5 +9,5 @@ int main() pvm_jit_decoder_arm32_decode(0xE2800001); /* Sub r0, r0, #1 */ pvm_jit_decoder_arm32_decode(0xE2400001); - pvm_jit_decoder_arm32_decode(0xE12FFF1E); + pvm_jit_decoder_arm32_decode(0x67A757B4); } diff --git a/tests/jit/decoder/test_arm32.cpp b/tests/jit/decoder/test_arm32.cpp deleted file mode 100644 index 62c8c95..0000000 --- a/tests/jit/decoder/test_arm32.cpp +++ /dev/null @@ -1,224 +0,0 @@ -#include -#include "jit/decoder/arm32.h" - -class Arm32DecoderTest : public ::testing::Test -{ -protected: - static void SetUpTestSuite() - { - pound::jit::decoder::arm32_init(); - } - - static void TearDownTestSuite() - { - } -}; - -TEST_F(Arm32DecoderTest, Decode_ADD_Immediate) -{ - // Opcode: ADD (imm) - // Bitstring: cccc0010100Snnnnddddrrrrvvvvvvvv - // Condition (cccc): 1110 (AL - Always) - // Binary: 1110 0010 1000 0000 0000 0000 0000 0001 -> 0xE2800001 - const uint32_t instruction = 0xE2800001; - - const pound::jit::decoder::arm32_instruction_info_t* info = pound::jit::decoder::arm32_decode(instruction); - - ASSERT_NE(info, nullptr) << "Failed to decode valid ADD instruction"; - EXPECT_STREQ(info->name, "ADD (imm)"); - EXPECT_EQ((instruction & info->mask), info->expected); -} - -TEST_F(Arm32DecoderTest, Decode_SUB_Immediate) -{ - // Opcode: SUB (imm) - // Bitstring: cccc0010010Snnnnddddrrrrvvvvvvvv - // Binary: 1110 0010 0100 0000 0000 0000 0000 0001 -> 0xE2400001 - const uint32_t instruction = 0xE2400001; - - const pound::jit::decoder::arm32_instruction_info_t* info = pound::jit::decoder::arm32_decode(instruction); - - ASSERT_NE(info, nullptr) << "Failed to decode valid SUB instruction"; - EXPECT_STREQ(info->name, "SUB (imm)"); - EXPECT_EQ((instruction & info->mask), info->expected); -} - -TEST_F(Arm32DecoderTest, Decode_BX) -{ - // Opcode: BX - // Bitstring: cccc000100101111111111110001mmmm - // Condition: AL (0xE) - // mmmm (Rm): 1110 (LR/R14) - // Binary: 1110 0001 0010 1111 1111 1111 0001 1110 -> 0xE12FFF1E - const uint32_t instruction = 0xE12FFF1E; - - const pound::jit::decoder::arm32_instruction_info_t* info = pound::jit::decoder::arm32_decode(instruction); - - ASSERT_NE(info, nullptr); - EXPECT_STREQ(info->name, "BX"); -} - -TEST_F(Arm32DecoderTest, Decode_Unknown_Instruction) -{ - uint32_t instruction = 0xE7F001F0; - const pound::jit::decoder::arm32_instruction_info_t* info = pound::jit::decoder::arm32_decode(instruction); - - EXPECT_STREQ(info->name,"UDF"); -} - -/** - * @brief Test Case: Negative Test - Double Initialization. - * @details Verifies that re-initializing the decoder triggers an assertion failure. - * This enforces the singleton lifecycle of the decoder. - */ -TEST_F(Arm32DecoderTest, Fail_Double_Initialization) -{ - // Expect the process to die with an assertion failure message. - // The error message regex matches the one in src/jit/decoder/arm32.cpp. - EXPECT_DEATH({ - pound::jit::decoder::arm32_init(); - }, "Decoder already initialized"); -} - -// ----------------------------------------------------------------------------- -// Isolated Death Tests -// ----------------------------------------------------------------------------- -// These tests are separated because they require a "Pre-Init" state. -// Since Arm32DecoderTest::SetUpTestSuite initializes the global state, -// we cannot use that fixture for these tests. - -/** - * @brief Test Case: Negative Test - Decode Before Initialization. - * @details Verifies that attempting to decode before calling init() triggers a crash. - * Crucial for fail-fast safety requirements. - */ -TEST(Arm32DecoderDeathTest, Fail_Decode_Before_Init) -{ - // We rely on GTest running this in a fresh process/context where - // the static g_decoder.is_initialized is false. - // Note: If GTest runs in a single process mode, this test might fail - // if other tests ran first. Standard GTest isolation usually handles this via fork() - // inside EXPECT_DEATH, but the surrounding code must not have initialized it. - // - // However, EXPECT_DEATH forks *before* executing the statement. - // So if the *parent* process is already initialized (by the Fixture above), - // the child will be too. - // - // IMPORTANT: In a real CI environment, `Arm32DecoderTest` will run. - // To properly test "Before Init", we rely on the fact that `arm32_init` - // has NOT been called in the global scope of `main.cpp` of the test runner - // before GTest starts. - // - // If the previous tests ran, the global state in this process is dirty. - // There is no `arm32_shutdown`. - // Therefore, this test is effectively untestable in the same binary execution - // as the positive tests without a reset mechanism in the source code. - // - // FOR THE PURPOSE OF THIS DELIVERABLE: - // We document this limitation. In a rigorous environment, `EXPECT_DEATH` - // tests for singletons without reset capabilities are often run in a separate binary. - // - // For now, we assume this test runs *first* or in isolation. - - /* - * UNCOMMENTING THIS REQUIRES A FRESH PROCESS STATE. - * - EXPECT_DEATH({ - pound::jit::decoder::arm32_decode(0xE2800001); - }, "Decoder needs to initialize"); - */ -} - -/** - * @brief Test Case: Hash Collision Handling. - * @details Verify that two instructions that share the same hash index - * (bits [27:20] and [7:4]) but differ in other mask bits - * are correctly resolved. - */ -TEST_F(Arm32DecoderTest, Decode_Hash_Collision_Resolution) -{ - // We need to find two instructions where: - // Index = ((Inst >> 20) & 0xFF) | ((Inst >> 4) & 0xF) is IDENTICAL. - // But the instructions are different. - - // Case Study: - // 1. MOV (imm): cccc 0011 101S 0000 dddd rrrr vvvvvvvv - // Op bits involved in hash: 0011 1010 (Bits 27-20) - // - // 2. MVN (imm): cccc 0011 111S 0000 dddd rrrr vvvvvvvv - // Op bits involved in hash: 0011 1110 - // Different hash. - - // Let's look closely at the bitmasks in arm32.inc. - // The hash is very specific. Collisions occur when the differentiator - // is NOT in bits 27-20 or 7-4. - - // Example Candidate: - // TST (reg): cccc 0001 0001 ... 0000 ... 0 mmmm - // TEQ (reg): cccc 0001 0011 ... 0000 ... 0 mmmm - // Bits 27-20: - // TST: 0001 0001 (0x11) - // TEQ: 0001 0011 (0x13) -> Different hash. - - // Example Candidate 2: - // ORR (reg): cccc 0001 100S ... - // MOV (reg): cccc 0001 101S ... -> Different hash. - - // Due to the density of the ARM encoding and the specific hash function chosen, - // explicitly forcing a collision for a unit test requires deep analysis of the - // provided .inc file. - // However, rigorous testing demands we verification of the lookup logic. - // We will verify multiple instructions to ensure no false positives occur. - - uint32_t inst_a = 0xE1A00000; // MOV R0, R0 (NOP) -> MOV (reg) - uint32_t inst_b = 0xE0800000; // ADD R0, R0, R0 -> ADD (reg) - - const pound::jit::decoder::arm32_instruction_info_t *info_a = pound::jit::decoder::arm32_decode(inst_a); - const pound::jit::decoder::arm32_instruction_info_t *info_b = pound::jit::decoder::arm32_decode(inst_b); - - ASSERT_NE(info_a, nullptr); - ASSERT_NE(info_b, nullptr); - - EXPECT_STREQ(info_a->name, "MOV (reg)"); - EXPECT_STREQ(info_b->name, "ADD (reg)"); - - // Ensure they point to different metadata addresses - EXPECT_NE(info_a, info_b); -} - -/** - * @brief Test Case: Verify internal hash boundary conditions. - * @details Ensures that instructions resulting in max hash index (0xFFF) do not crash. - */ -TEST_F(Arm32DecoderTest, Decode_Max_Hash_Index) -{ - // Hash = ((Major) << 4) | Minor - // Major = Bits 27:20. Max 0xFF. - // Minor = Bits 7:4. Max 0xF. - - // Construct an instruction that maximizes these bits. - // Inst = ... 1111 1111 ... 1111 .... - // 0x0FF000F0 - - // We need a valid instruction that happens to have high bits set. - // Most ARM instructions start with condition codes. - // 1111 (NV) is usually extension space or PLD/etc. - - // PLD (imm): 1111 0101 ... - // Major: 1111 0101 (0xF5) - - // This test ensures that calculating the index doesn't OOB access the array. - // Since the array is size LOOKUP_TABLE_INDEX_MASK + 1 (0x1000), - // and the logic masks with 0xFFF, it is mathematically safe, - // but we test it to verify the logic integration. - - // PLD (imm): 1111 0101 0101 0000 1111 0000 0000 0000 -> 0xF550F000 - uint32_t inst = 0xF550F000; - - // Even if it returns nullptr (if not in .inc), it must not segfault. - const pound::jit::decoder::arm32_instruction_info_t* info = pound::jit::decoder::arm32_decode(inst); - - if (info) { - EXPECT_STREQ(info->name, "PLD (imm)"); - } -} diff --git a/tests/jit/decoder/test_arm32_generated.cpp b/tests/jit/decoder/test_arm32_generated.cpp new file mode 100644 index 0000000..eb64584 --- /dev/null +++ b/tests/jit/decoder/test_arm32_generated.cpp @@ -0,0 +1,33111 @@ +/* + * GENERATED FILE - DO NOT EDIT + * + * This file is generated by scripts/generate_decoder_tests.py + * + * PURPOSE: + * Provides 100% requirements-based test coverage for the ARM32 Instruction Decoder. + */ + +#include "jit/frontend/decoder/arm32.h" +#include +#include + +class Arm32DecoderGeneratedTest : public ::testing::Test { +protected: + void SetUp() override { + } +}; +TEST_F(Arm32DecoderGeneratedTest, Verify_DMB) { + // 1. Positive Verification: Ensures "DMB" is correctly identified. + const uint32_t valid_inst = 0xf57ff054; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for DMB: 0xf57ff054"; + EXPECT_STREQ(info->name, "DMB") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 31 + const uint32_t corrupt_inst = 0x757ff054; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 30 + const uint32_t corrupt_inst = 0xb57ff054; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 29 + const uint32_t corrupt_inst = 0xd57ff054; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 28 + const uint32_t corrupt_inst = 0xe57ff054; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0xfd7ff054; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDC + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDC' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDC") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0xf17ff054; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0xf77ff054; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0xf47ff054; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRBT (A1) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRBT (A1)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRBT (A1)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0xf5fff054; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0xf53ff054; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0xf55ff054; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: PLD (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'PLD (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "PLD (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0xf56ff054; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 19 + const uint32_t corrupt_inst = 0xf577f054; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 18 + const uint32_t corrupt_inst = 0xf57bf054; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 17 + const uint32_t corrupt_inst = 0xf57df054; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 16 + const uint32_t corrupt_inst = 0xf57ef054; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 15 + const uint32_t corrupt_inst = 0xf57f7054; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 14 + const uint32_t corrupt_inst = 0xf57fb054; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 13 + const uint32_t corrupt_inst = 0xf57fd054; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 12 + const uint32_t corrupt_inst = 0xf57fe054; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 11 + const uint32_t corrupt_inst = 0xf57ff854; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 10 + const uint32_t corrupt_inst = 0xf57ff454; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 9 + const uint32_t corrupt_inst = 0xf57ff254; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 8 + const uint32_t corrupt_inst = 0xf57ff154; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0xf57ff0d4; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0xf57ff014; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0xf57ff074; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0xf57ff044; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: DSB + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'DSB' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "DSB") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_DSB) { + // 1. Positive Verification: Ensures "DSB" is correctly identified. + const uint32_t valid_inst = 0xf57ff049; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for DSB: 0xf57ff049"; + EXPECT_STREQ(info->name, "DSB") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 31 + const uint32_t corrupt_inst = 0x757ff049; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 30 + const uint32_t corrupt_inst = 0xb57ff049; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 29 + const uint32_t corrupt_inst = 0xd57ff049; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 28 + const uint32_t corrupt_inst = 0xe57ff049; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0xfd7ff049; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDC + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDC' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDC") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0xf17ff049; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0xf77ff049; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0xf47ff049; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRBT (A1) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRBT (A1)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRBT (A1)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0xf5fff049; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0xf53ff049; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0xf55ff049; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: PLD (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'PLD (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "PLD (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0xf56ff049; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 19 + const uint32_t corrupt_inst = 0xf577f049; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 18 + const uint32_t corrupt_inst = 0xf57bf049; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 17 + const uint32_t corrupt_inst = 0xf57df049; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 16 + const uint32_t corrupt_inst = 0xf57ef049; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 15 + const uint32_t corrupt_inst = 0xf57f7049; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 14 + const uint32_t corrupt_inst = 0xf57fb049; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 13 + const uint32_t corrupt_inst = 0xf57fd049; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 12 + const uint32_t corrupt_inst = 0xf57fe049; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 11 + const uint32_t corrupt_inst = 0xf57ff849; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 10 + const uint32_t corrupt_inst = 0xf57ff449; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 9 + const uint32_t corrupt_inst = 0xf57ff249; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 8 + const uint32_t corrupt_inst = 0xf57ff149; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0xf57ff0c9; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0xf57ff009; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0xf57ff069; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: ISB + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'ISB' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "ISB") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0xf57ff059; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: DMB + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'DMB' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "DMB") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_ISB) { + // 1. Positive Verification: Ensures "ISB" is correctly identified. + const uint32_t valid_inst = 0xf57ff064; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for ISB: 0xf57ff064"; + EXPECT_STREQ(info->name, "ISB") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 31 + const uint32_t corrupt_inst = 0x757ff064; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 30 + const uint32_t corrupt_inst = 0xb57ff064; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 29 + const uint32_t corrupt_inst = 0xd57ff064; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 28 + const uint32_t corrupt_inst = 0xe57ff064; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0xfd7ff064; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDC + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDC' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDC") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0xf17ff064; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0xf77ff064; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0xf47ff064; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRBT (A1) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRBT (A1)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRBT (A1)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0xf5fff064; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0xf53ff064; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0xf55ff064; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: PLD (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'PLD (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "PLD (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0xf56ff064; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 19 + const uint32_t corrupt_inst = 0xf577f064; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 18 + const uint32_t corrupt_inst = 0xf57bf064; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 17 + const uint32_t corrupt_inst = 0xf57df064; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 16 + const uint32_t corrupt_inst = 0xf57ef064; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 15 + const uint32_t corrupt_inst = 0xf57f7064; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 14 + const uint32_t corrupt_inst = 0xf57fb064; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 13 + const uint32_t corrupt_inst = 0xf57fd064; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 12 + const uint32_t corrupt_inst = 0xf57fe064; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 11 + const uint32_t corrupt_inst = 0xf57ff864; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 10 + const uint32_t corrupt_inst = 0xf57ff464; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 9 + const uint32_t corrupt_inst = 0xf57ff264; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 8 + const uint32_t corrupt_inst = 0xf57ff164; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0xf57ff0e4; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0xf57ff024; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0xf57ff044; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: DSB + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'DSB' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "DSB") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0xf57ff074; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_BLX_imm) { + // 1. Positive Verification: Ensures "BLX (imm)" is correctly identified. + const uint32_t valid_inst = 0xfbaf92f5; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for BLX (imm): 0xfbaf92f5"; + EXPECT_STREQ(info->name, "BLX (imm)") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 31 + const uint32_t corrupt_inst = 0x7baf92f5; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: BL + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'BL' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "BL") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 30 + const uint32_t corrupt_inst = 0xbbaf92f5; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: BL + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'BL' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "BL") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 29 + const uint32_t corrupt_inst = 0xdbaf92f5; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: BL + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'BL' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "BL") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 28 + const uint32_t corrupt_inst = 0xebaf92f5; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: BL + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'BL' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "BL") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0xf3af92f5; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0xffaf92f5; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SVC + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SVC' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SVC") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0xf9af92f5; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STMIB + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STMIB' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STMIB") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_BLX_reg) { + // 1. Positive Verification: Ensures "BLX (reg)" is correctly identified. + const uint32_t valid_inst = 0xa12fff3e; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for BLX (reg): 0xa12fff3e"; + EXPECT_STREQ(info->name, "BLX (reg)") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0xa92fff3e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STMDB + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STMDB' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STMDB") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0xa52fff3e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0xa32fff3e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MSR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MSR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MSR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0xa02fff3e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: EOR (rsr) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'EOR (rsr)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "EOR (rsr)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0xa1afff3e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0xa16fff3e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0xa10fff3e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0xa13fff3e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 19 + const uint32_t corrupt_inst = 0xa127ff3e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 18 + const uint32_t corrupt_inst = 0xa12bff3e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 17 + const uint32_t corrupt_inst = 0xa12dff3e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 16 + const uint32_t corrupt_inst = 0xa12eff3e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 15 + const uint32_t corrupt_inst = 0xa12f7f3e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 14 + const uint32_t corrupt_inst = 0xa12fbf3e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 13 + const uint32_t corrupt_inst = 0xa12fdf3e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 12 + const uint32_t corrupt_inst = 0xa12fef3e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 11 + const uint32_t corrupt_inst = 0xa12ff73e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 10 + const uint32_t corrupt_inst = 0xa12ffb3e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 9 + const uint32_t corrupt_inst = 0xa12ffd3e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 8 + const uint32_t corrupt_inst = 0xa12ffe3e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0xa12fffbe; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0xa12fff7e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: BKPT + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'BKPT' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "BKPT") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0xa12fff1e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: BX + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'BX' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "BX") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0xa12fff2e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: BXJ + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'BXJ' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "BXJ") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_B) { + // 1. Positive Verification: Ensures "B" is correctly identified. + const uint32_t valid_inst = 0xcaee4eb6; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for B: 0xcaee4eb6"; + EXPECT_STREQ(info->name, "B") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0xc2ee4eb6; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: RSC (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'RSC (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "RSC (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0xceee4eb6; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MCR + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MCR' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MCR") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0xc8ee4eb6; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0xcbee4eb6; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: BL + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'BL' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "BL") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_BL) { + // 1. Positive Verification: Ensures "BL" is correctly identified. + const uint32_t valid_inst = 0xcb5d7bec; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for BL: 0xcb5d7bec"; + EXPECT_STREQ(info->name, "BL") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0xc35d7bec; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0xcf5d7bec; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SVC + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SVC' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SVC") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0xc95d7bec; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDM (usr reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDM (usr reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDM (usr reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0xca5d7bec; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: B + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'B' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "B") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_BX) { + // 1. Positive Verification: Ensures "BX" is correctly identified. + const uint32_t valid_inst = 0x912fff1e; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for BX: 0x912fff1e"; + EXPECT_STREQ(info->name, "BX") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x992fff1e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STMDB + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STMDB' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STMDB") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x952fff1e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x932fff1e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MSR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MSR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MSR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x902fff1e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: EOR (rsr) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'EOR (rsr)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "EOR (rsr)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0x91afff1e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x916fff1e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: CLZ + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'CLZ' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "CLZ") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x910fff1e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0x913fff1e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 19 + const uint32_t corrupt_inst = 0x9127ff1e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 18 + const uint32_t corrupt_inst = 0x912bff1e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 17 + const uint32_t corrupt_inst = 0x912dff1e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 16 + const uint32_t corrupt_inst = 0x912eff1e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 15 + const uint32_t corrupt_inst = 0x912f7f1e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 14 + const uint32_t corrupt_inst = 0x912fbf1e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 13 + const uint32_t corrupt_inst = 0x912fdf1e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 12 + const uint32_t corrupt_inst = 0x912fef1e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 11 + const uint32_t corrupt_inst = 0x912ff71e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 10 + const uint32_t corrupt_inst = 0x912ffb1e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 9 + const uint32_t corrupt_inst = 0x912ffd1e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 8 + const uint32_t corrupt_inst = 0x912ffe1e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0x912fff9e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0x912fff5e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0x912fff3e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: BLX (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'BLX (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "BLX (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x912fff0e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_BXJ) { + // 1. Positive Verification: Ensures "BXJ" is correctly identified. + const uint32_t valid_inst = 0x512fff2c; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for BXJ: 0x512fff2c"; + EXPECT_STREQ(info->name, "BXJ") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x592fff2c; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STMDB + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STMDB' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STMDB") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x552fff2c; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x532fff2c; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MSR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MSR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MSR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x502fff2c; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: EOR (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'EOR (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "EOR (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0x51afff2c; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x516fff2c; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x510fff2c; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0x513fff2c; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 19 + const uint32_t corrupt_inst = 0x5127ff2c; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 18 + const uint32_t corrupt_inst = 0x512bff2c; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 17 + const uint32_t corrupt_inst = 0x512dff2c; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 16 + const uint32_t corrupt_inst = 0x512eff2c; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 15 + const uint32_t corrupt_inst = 0x512f7f2c; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 14 + const uint32_t corrupt_inst = 0x512fbf2c; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 13 + const uint32_t corrupt_inst = 0x512fdf2c; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 12 + const uint32_t corrupt_inst = 0x512fef2c; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 11 + const uint32_t corrupt_inst = 0x512ff72c; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 10 + const uint32_t corrupt_inst = 0x512ffb2c; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 9 + const uint32_t corrupt_inst = 0x512ffd2c; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 8 + const uint32_t corrupt_inst = 0x512ffe2c; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0x512fffac; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0x512fff6c; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0x512fff0c; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x512fff3c; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: BLX (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'BLX (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "BLX (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_RFE) { + // 1. Positive Verification: Ensures "RFE" is correctly identified. + const uint32_t valid_inst = 0xf8b70a00; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for RFE: 0xf8b70a00"; + EXPECT_STREQ(info->name, "RFE") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 31 + const uint32_t corrupt_inst = 0x78b70a00; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDM + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDM' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDM") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 30 + const uint32_t corrupt_inst = 0xb8b70a00; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDM + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDM' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDM") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 29 + const uint32_t corrupt_inst = 0xd8b70a00; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDM + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDM' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDM") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 28 + const uint32_t corrupt_inst = 0xe8b70a00; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDM + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDM' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDM") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0xf0b70a00; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: ADC (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'ADC (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "ADC (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0xfcb70a00; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDC + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDC' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDC") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0xfab70a00; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: BLX (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'BLX (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "BLX (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0xf8f70a00; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0xf8a70a00; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STM + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STM' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STM") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 15 + const uint32_t corrupt_inst = 0xf8b78a00; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDM + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDM' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDM") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 14 + const uint32_t corrupt_inst = 0xf8b74a00; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDM + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDM' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDM") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 13 + const uint32_t corrupt_inst = 0xf8b72a00; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDM + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDM' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDM") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 12 + const uint32_t corrupt_inst = 0xf8b71a00; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDM + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDM' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDM") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 11 + const uint32_t corrupt_inst = 0xf8b70200; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDM + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDM' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDM") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 10 + const uint32_t corrupt_inst = 0xf8b70e00; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDM + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDM' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDM") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 9 + const uint32_t corrupt_inst = 0xf8b70800; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDM + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDM' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDM") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 8 + const uint32_t corrupt_inst = 0xf8b70b00; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDM + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDM' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDM") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0xf8b70a80; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDM + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDM' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDM") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0xf8b70a40; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDM + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDM' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDM") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0xf8b70a20; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDM + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDM' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDM") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0xf8b70a10; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDM + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDM' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDM") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 3 + const uint32_t corrupt_inst = 0xf8b70a08; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDM + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDM' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDM") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 2 + const uint32_t corrupt_inst = 0xf8b70a04; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDM + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDM' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDM") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 1 + const uint32_t corrupt_inst = 0xf8b70a02; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDM + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDM' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDM") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 0 + const uint32_t corrupt_inst = 0xf8b70a01; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDM + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDM' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDM") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_SRS) { + // 1. Positive Verification: Ensures "SRS" is correctly identified. + const uint32_t valid_inst = 0xf94d0519; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for SRS: 0xf94d0519"; + EXPECT_STREQ(info->name, "SRS") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 31 + const uint32_t corrupt_inst = 0x794d0519; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STM (usr reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STM (usr reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STM (usr reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 30 + const uint32_t corrupt_inst = 0xb94d0519; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STM (usr reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STM (usr reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STM (usr reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 29 + const uint32_t corrupt_inst = 0xd94d0519; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STM (usr reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STM (usr reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STM (usr reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 28 + const uint32_t corrupt_inst = 0xe94d0519; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STM (usr reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STM (usr reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STM (usr reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0xf14d0519; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0xfd4d0519; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STC + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STC' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STC") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0xfb4d0519; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: BLX (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'BLX (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "BLX (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0xf90d0519; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STMDB + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STMDB' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STMDB") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0xf95d0519; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDM (usr reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDM (usr reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDM (usr reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 19 + const uint32_t corrupt_inst = 0xf9450519; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STM (usr reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STM (usr reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STM (usr reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 18 + const uint32_t corrupt_inst = 0xf9490519; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STM (usr reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STM (usr reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STM (usr reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 17 + const uint32_t corrupt_inst = 0xf94f0519; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STM (usr reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STM (usr reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STM (usr reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 16 + const uint32_t corrupt_inst = 0xf94c0519; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STM (usr reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STM (usr reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STM (usr reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 15 + const uint32_t corrupt_inst = 0xf94d8519; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STM (usr reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STM (usr reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STM (usr reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 14 + const uint32_t corrupt_inst = 0xf94d4519; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STM (usr reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STM (usr reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STM (usr reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 13 + const uint32_t corrupt_inst = 0xf94d2519; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STM (usr reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STM (usr reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STM (usr reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 12 + const uint32_t corrupt_inst = 0xf94d1519; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STM (usr reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STM (usr reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STM (usr reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 11 + const uint32_t corrupt_inst = 0xf94d0d19; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STM (usr reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STM (usr reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STM (usr reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 10 + const uint32_t corrupt_inst = 0xf94d0119; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STM (usr reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STM (usr reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STM (usr reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 9 + const uint32_t corrupt_inst = 0xf94d0719; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STM (usr reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STM (usr reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STM (usr reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 8 + const uint32_t corrupt_inst = 0xf94d0419; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STM (usr reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STM (usr reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STM (usr reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0xf94d0599; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STM (usr reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STM (usr reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STM (usr reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0xf94d0559; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STM (usr reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STM (usr reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STM (usr reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0xf94d0539; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STM (usr reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STM (usr reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STM (usr reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_CPS) { + // 1. Positive Verification: Ensures "CPS" is correctly identified. + const uint32_t valid_inst = 0xf1060140; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for CPS: 0xf1060140"; + EXPECT_STREQ(info->name, "CPS") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 31 + const uint32_t corrupt_inst = 0x71060140; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 30 + const uint32_t corrupt_inst = 0xb1060140; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 29 + const uint32_t corrupt_inst = 0xd1060140; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 28 + const uint32_t corrupt_inst = 0xe1060140; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0xf9060140; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STMDB + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STMDB' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STMDB") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0xf5060140; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0xf3060140; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MOVW + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MOVW' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MOVW") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0xf0060140; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: AND (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'AND (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "AND (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0xf1860140; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: ORR (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'ORR (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "ORR (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0xf1460140; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0xf1260140; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0xf1160140; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: TST (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'TST (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "TST (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 16 + const uint32_t corrupt_inst = 0xf1070140; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 15 + const uint32_t corrupt_inst = 0xf1068140; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 14 + const uint32_t corrupt_inst = 0xf1064140; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 13 + const uint32_t corrupt_inst = 0xf1062140; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 12 + const uint32_t corrupt_inst = 0xf1061140; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 11 + const uint32_t corrupt_inst = 0xf1060940; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 10 + const uint32_t corrupt_inst = 0xf1060540; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 9 + const uint32_t corrupt_inst = 0xf1060340; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0xf1060160; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_SETEND) { + // 1. Positive Verification: Ensures "SETEND" is correctly identified. + const uint32_t valid_inst = 0xf1010000; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for SETEND: 0xf1010000"; + EXPECT_STREQ(info->name, "SETEND") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 31 + const uint32_t corrupt_inst = 0x71010000; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 30 + const uint32_t corrupt_inst = 0xb1010000; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 29 + const uint32_t corrupt_inst = 0xd1010000; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 28 + const uint32_t corrupt_inst = 0xe1010000; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0xf9010000; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STMDB + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STMDB' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STMDB") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0xf5010000; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0xf3010000; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MOVW + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MOVW' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MOVW") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0xf0010000; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: AND (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'AND (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "AND (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0xf1810000; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: ORR (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'ORR (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "ORR (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0xf1410000; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0xf1210000; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0xf1110000; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: TST (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'TST (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "TST (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 19 + const uint32_t corrupt_inst = 0xf1090000; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 18 + const uint32_t corrupt_inst = 0xf1050000; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 17 + const uint32_t corrupt_inst = 0xf1030000; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 16 + const uint32_t corrupt_inst = 0xf1000000; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: CPS + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'CPS' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "CPS") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 15 + const uint32_t corrupt_inst = 0xf1018000; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 14 + const uint32_t corrupt_inst = 0xf1014000; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 13 + const uint32_t corrupt_inst = 0xf1012000; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 12 + const uint32_t corrupt_inst = 0xf1011000; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 11 + const uint32_t corrupt_inst = 0xf1010800; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 10 + const uint32_t corrupt_inst = 0xf1010400; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 8 + const uint32_t corrupt_inst = 0xf1010100; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0xf1010080; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SMLAXY + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SMLAXY' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SMLAXY") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0xf1010040; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: CRC32 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'CRC32' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "CRC32") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0xf1010020; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0xf1010010; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 3 + const uint32_t corrupt_inst = 0xf1010008; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 2 + const uint32_t corrupt_inst = 0xf1010004; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 1 + const uint32_t corrupt_inst = 0xf1010002; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 0 + const uint32_t corrupt_inst = 0xf1010001; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_CRC32) { + // 1. Positive Verification: Ensures "CRC32" is correctly identified. + const uint32_t valid_inst = 0x0146f04c; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for CRC32: 0x146f04c"; + EXPECT_STREQ(info->name, "CRC32") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x0946f04c; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STM (usr reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STM (usr reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STM (usr reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x0546f04c; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x0346f04c; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MOVT + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MOVT' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MOVT") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x0046f04c; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SUB (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SUB (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SUB (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0x01c6f04c; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: BIC (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'BIC (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "BIC (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0x0156f04c; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 11 + const uint32_t corrupt_inst = 0x0146f84c; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 10 + const uint32_t corrupt_inst = 0x0146f44c; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 9 + const uint32_t corrupt_inst = 0x0146f24c; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: CRC32C + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'CRC32C' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "CRC32C") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 8 + const uint32_t corrupt_inst = 0x0146f14c; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0x0146f0cc; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SMLALXY + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SMLALXY' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SMLALXY") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0x0146f00c; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0x0146f06c; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x0146f05c; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: QDADD + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'QDADD' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "QDADD") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_CRC32C) { + // 1. Positive Verification: Ensures "CRC32C" is correctly identified. + const uint32_t valid_inst = 0x9104b24d; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for CRC32C: 0x9104b24d"; + EXPECT_STREQ(info->name, "CRC32C") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x9904b24d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STMDB + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STMDB' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STMDB") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x9504b24d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x9304b24d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MOVW + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MOVW' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MOVW") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x9004b24d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: AND (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'AND (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "AND (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0x9184b24d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: ORR (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'ORR (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "ORR (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0x9114b24d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 11 + const uint32_t corrupt_inst = 0x9104ba4d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 10 + const uint32_t corrupt_inst = 0x9104b64d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 9 + const uint32_t corrupt_inst = 0x9104b04d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: CRC32 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'CRC32' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "CRC32") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 8 + const uint32_t corrupt_inst = 0x9104b34d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0x9104b2cd; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SMLAXY + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SMLAXY' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SMLAXY") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0x9104b20d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0x9104b26d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x9104b25d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_CDP) { + // 1. Positive Verification: Ensures "CDP" is correctly identified. + const uint32_t valid_inst = 0x3ee3b2eb; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for CDP: 0x3ee3b2eb"; + EXPECT_STREQ(info->name, "CDP") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x36e3b2eb; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRBT (A2) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRBT (A2)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRBT (A2)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x3ae3b2eb; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: B + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'B' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "B") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x3ce3b2eb; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STC + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STC' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STC") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x3fe3b2eb; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SVC + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SVC' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SVC") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x3ee3b2fb; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MCR + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MCR' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MCR") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_MCR) { + // 1. Positive Verification: Ensures "MCR" is correctly identified. + const uint32_t valid_inst = 0x4e4910bb; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for MCR: 0x4e4910bb"; + EXPECT_STREQ(info->name, "MCR") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x464910bb; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x4a4910bb; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: B + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'B' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "B") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x4c4910bb; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MCRR + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MCRR' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MCRR") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x4f4910bb; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SVC + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SVC' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SVC") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0x4e5910bb; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MRC + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MRC' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MRC") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x4e4910ab; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: CDP + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'CDP' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "CDP") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_MCRR) { + // 1. Positive Verification: Ensures "MCRR" is correctly identified. + const uint32_t valid_inst = 0xec4c5abd; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for MCRR: 0xec4c5abd"; + EXPECT_STREQ(info->name, "MCRR") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0xe44c5abd; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0xe84c5abd; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STM (usr reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STM (usr reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STM (usr reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0xee4c5abd; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MCR + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MCR' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MCR") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0xed4c5abd; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STC + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STC' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STC") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0xeccc5abd; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STC + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STC' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STC") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0xec0c5abd; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STC + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STC' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STC") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0xec6c5abd; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STC + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STC' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STC") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0xec5c5abd; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MRRC + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MRRC' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MRRC") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_MRC) { + // 1. Positive Verification: Ensures "MRC" is correctly identified. + const uint32_t valid_inst = 0xfeba1699; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for MRC: 0xfeba1699"; + EXPECT_STREQ(info->name, "MRC") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0xf6ba1699; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SSAT + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SSAT' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SSAT") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0xfaba1699; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: BLX (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'BLX (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "BLX (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0xfcba1699; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDC + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDC' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDC") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0xffba1699; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SVC + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SVC' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SVC") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0xfeaa1699; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MCR + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MCR' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MCR") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0xfeba1689; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: CDP + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'CDP' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "CDP") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_MRRC) { + // 1. Positive Verification: Ensures "MRRC" is correctly identified. + const uint32_t valid_inst = 0x4c5734a5; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for MRRC: 0x4c5734a5"; + EXPECT_STREQ(info->name, "MRRC") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x445734a5; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x485734a5; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDM (usr reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDM (usr reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDM (usr reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x4e5734a5; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: CDP + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'CDP' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "CDP") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x4d5734a5; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDC + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDC' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDC") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0x4cd734a5; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDC + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDC' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDC") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x4c1734a5; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDC + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDC' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDC") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x4c7734a5; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDC + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDC' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDC") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0x4c4734a5; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MCRR + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MCRR' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MCRR") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_LDC) { + // 1. Positive Verification: Ensures "LDC" is correctly identified. + const uint32_t valid_inst = 0xddf6604b; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for LDC: 0xddf6604b"; + EXPECT_STREQ(info->name, "LDC") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0xd5f6604b; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0xd9f6604b; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0xdff6604b; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SVC + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SVC' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SVC") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0xdde6604b; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STC + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STC' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STC") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_STC) { + // 1. Positive Verification: Ensures "STC" is correctly identified. + const uint32_t valid_inst = 0x8d25b542; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for STC: 0x8d25b542"; + EXPECT_STREQ(info->name, "STC") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x8525b542; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x8925b542; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STMDB + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STMDB' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STMDB") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x8f25b542; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SVC + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SVC' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SVC") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0x8d35b542; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDC + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDC' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDC") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_ADC_imm) { + // 1. Positive Verification: Ensures "ADC (imm)" is correctly identified. + const uint32_t valid_inst = 0xa2a49244; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for ADC (imm): 0xa2a49244"; + EXPECT_STREQ(info->name, "ADC (imm)") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0xaaa49244; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: B + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'B' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "B") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0xa6a49244; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRT (A2) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRT (A2)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRT (A2)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0xa0a49244; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: ADC (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'ADC (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "ADC (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0xa3a49244; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0xa2249244; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: EOR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'EOR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "EOR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0xa2e49244; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: RSC (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'RSC (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "RSC (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0xa2849244; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: ADD (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'ADD (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "ADD (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_ADC_reg) { + // 1. Positive Verification: Ensures "ADC (reg)" is correctly identified. + const uint32_t valid_inst = 0xf0b5f206; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for ADC (reg): 0xf0b5f206"; + EXPECT_STREQ(info->name, "ADC (reg)") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0xf8b5f206; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDM + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDM' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDM") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0xf4b5f206; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRT (A1) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRT (A1)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRT (A1)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0xf2b5f206; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: ADC (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'ADC (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "ADC (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0xf1b5f206; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0xf035f206; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: EOR (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'EOR (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "EOR (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0xf0f5f206; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: RSC (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'RSC (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "RSC (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0xf095f206; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: ADD (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'ADD (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "ADD (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0xf0b5f216; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: ADC (rsr) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'ADC (rsr)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "ADC (rsr)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_ADC_rsr) { + // 1. Positive Verification: Ensures "ADC (rsr)" is correctly identified. + const uint32_t valid_inst = 0x20bbd37f; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for ADC (rsr): 0x20bbd37f"; + EXPECT_STREQ(info->name, "ADC (rsr)") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x28bbd37f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDM + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDM' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDM") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x24bbd37f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRT (A1) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRT (A1)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRT (A1)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x22bbd37f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: ADC (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'ADC (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "ADC (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x21bbd37f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0x203bd37f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: EOR (rsr) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'EOR (rsr)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "EOR (rsr)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x20fbd37f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: RSC (rsr) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'RSC (rsr)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "RSC (rsr)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x209bd37f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: ADD (rsr) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'ADD (rsr)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "ADD (rsr)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0x20bbd3ff; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x20bbd36f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: ADC (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'ADC (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "ADC (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_ADD_imm) { + // 1. Positive Verification: Ensures "ADD (imm)" is correctly identified. + const uint32_t valid_inst = 0x829ebd29; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for ADD (imm): 0x829ebd29"; + EXPECT_STREQ(info->name, "ADD (imm)") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x8a9ebd29; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: B + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'B' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "B") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x869ebd29; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDR (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDR (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDR (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x809ebd29; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: ADD (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'ADD (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "ADD (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x839ebd29; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: ORR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'ORR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "ORR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0x821ebd29; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: AND (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'AND (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "AND (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x82debd29; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SBC (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SBC (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SBC (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x82bebd29; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: ADC (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'ADC (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "ADC (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_ADD_reg) { + // 1. Positive Verification: Ensures "ADD (reg)" is correctly identified. + const uint32_t valid_inst = 0x409ab127; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for ADD (reg): 0x409ab127"; + EXPECT_STREQ(info->name, "ADD (reg)") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x489ab127; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDM + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDM' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDM") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x449ab127; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x429ab127; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: ADD (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'ADD (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "ADD (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x419ab127; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: ORR (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'ORR (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "ORR (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0x401ab127; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: AND (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'AND (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "AND (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x40dab127; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SBC (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SBC (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SBC (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x40bab127; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: ADC (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'ADC (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "ADC (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x409ab137; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: ADD (rsr) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'ADD (rsr)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "ADD (rsr)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_ADD_rsr) { + // 1. Positive Verification: Ensures "ADD (rsr)" is correctly identified. + const uint32_t valid_inst = 0x70968f36; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for ADD (rsr): 0x70968f36"; + EXPECT_STREQ(info->name, "ADD (rsr)") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x78968f36; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDM + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDM' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDM") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x74968f36; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x72968f36; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: ADD (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'ADD (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "ADD (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x71968f36; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: ORR (rsr) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'ORR (rsr)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "ORR (rsr)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0x70168f36; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: AND (rsr) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'AND (rsr)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "AND (rsr)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x70d68f36; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SBC (rsr) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SBC (rsr)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SBC (rsr)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x70b68f36; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: ADC (rsr) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'ADC (rsr)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "ADC (rsr)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0x70968fb6; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x70968f26; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: ADD (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'ADD (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "ADD (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_AND_imm) { + // 1. Positive Verification: Ensures "AND (imm)" is correctly identified. + const uint32_t valid_inst = 0x2204137f; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for AND (imm): 0x2204137f"; + EXPECT_STREQ(info->name, "AND (imm)") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x2a04137f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: B + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'B' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "B") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x2604137f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x2004137f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: AND (rsr) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'AND (rsr)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "AND (rsr)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x2304137f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MOVW + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MOVW' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MOVW") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0x2284137f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: ADD (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'ADD (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "ADD (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x2244137f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SUB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SUB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SUB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x2224137f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: EOR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'EOR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "EOR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_AND_reg) { + // 1. Positive Verification: Ensures "AND (reg)" is correctly identified. + const uint32_t valid_inst = 0xf01aae8d; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for AND (reg): 0xf01aae8d"; + EXPECT_STREQ(info->name, "AND (reg)") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0xf81aae8d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDMDA + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDMDA' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDMDA") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0xf41aae8d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0xf21aae8d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: AND (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'AND (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "AND (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0xf11aae8d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0xf09aae8d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: ADD (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'ADD (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "ADD (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0xf05aae8d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SUB (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SUB (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SUB (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0xf03aae8d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: EOR (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'EOR (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "EOR (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0xf01aae9d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_AND_rsr) { + // 1. Positive Verification: Ensures "AND (rsr)" is correctly identified. + const uint32_t valid_inst = 0x100a5237; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for AND (rsr): 0x100a5237"; + EXPECT_STREQ(info->name, "AND (rsr)") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x180a5237; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STMDA + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STMDA' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STMDA") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x140a5237; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x120a5237; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: AND (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'AND (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "AND (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x110a5237; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0x108a5237; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: ADD (rsr) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'ADD (rsr)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "ADD (rsr)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x104a5237; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SUB (rsr) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SUB (rsr)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SUB (rsr)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x102a5237; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: EOR (rsr) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'EOR (rsr)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "EOR (rsr)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0x100a52b7; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x100a5227; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: AND (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'AND (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "AND (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_BIC_imm) { + // 1. Positive Verification: Ensures "BIC (imm)" is correctly identified. + const uint32_t valid_inst = 0x83d9eec0; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for BIC (imm): 0x83d9eec0"; + EXPECT_STREQ(info->name, "BIC (imm)") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x8bd9eec0; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: BL + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'BL' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "BL") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x87d9eec0; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x81d9eec0; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: BIC (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'BIC (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "BIC (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x82d9eec0; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SBC (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SBC (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SBC (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0x8359eec0; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x8399eec0; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: ORR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'ORR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "ORR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x83f9eec0; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_BIC_reg) { + // 1. Positive Verification: Ensures "BIC (reg)" is correctly identified. + const uint32_t valid_inst = 0x71c54f88; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for BIC (reg): 0x71c54f88"; + EXPECT_STREQ(info->name, "BIC (reg)") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x79c54f88; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STM (usr reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STM (usr reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STM (usr reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x75c54f88; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x73c54f88; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: BIC (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'BIC (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "BIC (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x70c54f88; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SBC (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SBC (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SBC (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0x71454f88; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SMLALXY + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SMLALXY' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SMLALXY") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x71854f88; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: ORR (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'ORR (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "ORR (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x71e54f88; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x71c54f98; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STREXB + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STREXB' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STREXB") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_BIC_rsr) { + // 1. Positive Verification: Ensures "BIC (rsr)" is correctly identified. + const uint32_t valid_inst = 0x01c7201b; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for BIC (rsr): 0x1c7201b"; + EXPECT_STREQ(info->name, "BIC (rsr)") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x09c7201b; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STM (usr reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STM (usr reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STM (usr reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x05c7201b; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x03c7201b; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: BIC (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'BIC (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "BIC (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x00c7201b; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SBC (rsr) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SBC (rsr)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SBC (rsr)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0x0147201b; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x0187201b; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: ORR (rsr) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'ORR (rsr)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "ORR (rsr)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x01e7201b; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0x01c7209b; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x01c7200b; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: BIC (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'BIC (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "BIC (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_CMN_imm) { + // 1. Positive Verification: Ensures "CMN (imm)" is correctly identified. + const uint32_t valid_inst = 0x037b0067; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for CMN (imm): 0x37b0067"; + EXPECT_STREQ(info->name, "CMN (imm)") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x0b7b0067; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: BL + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'BL' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "BL") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x077b0067; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x017b0067; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: CMN (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'CMN (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "CMN (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x027b0067; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: RSB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'RSB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "RSB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0x03fb0067; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x033b0067; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: TEQ (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'TEQ (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "TEQ (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x035b0067; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: CMP (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'CMP (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "CMP (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0x036b0067; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 15 + const uint32_t corrupt_inst = 0x037b8067; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 14 + const uint32_t corrupt_inst = 0x037b4067; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 13 + const uint32_t corrupt_inst = 0x037b2067; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 12 + const uint32_t corrupt_inst = 0x037b1067; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_CMN_reg) { + // 1. Positive Verification: Ensures "CMN (reg)" is correctly identified. + const uint32_t valid_inst = 0xb1790867; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for CMN (reg): 0xb1790867"; + EXPECT_STREQ(info->name, "CMN (reg)") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0xb9790867; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0xb5790867; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0xb3790867; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: CMN (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'CMN (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "CMN (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0xb0790867; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: RSB (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'RSB (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "RSB (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0xb1f90867; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0xb1390867; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: TEQ (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'TEQ (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "TEQ (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0xb1590867; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: CMP (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'CMP (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "CMP (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0xb1690867; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 15 + const uint32_t corrupt_inst = 0xb1798867; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 14 + const uint32_t corrupt_inst = 0xb1794867; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 13 + const uint32_t corrupt_inst = 0xb1792867; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 12 + const uint32_t corrupt_inst = 0xb1791867; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0xb1790877; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: CMN (rsr) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'CMN (rsr)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "CMN (rsr)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_CMN_rsr) { + // 1. Positive Verification: Ensures "CMN (rsr)" is correctly identified. + const uint32_t valid_inst = 0xb176057e; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for CMN (rsr): 0xb176057e"; + EXPECT_STREQ(info->name, "CMN (rsr)") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0xb976057e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0xb576057e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0xb376057e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: CMN (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'CMN (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "CMN (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0xb076057e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: RSB (rsr) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'RSB (rsr)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "RSB (rsr)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0xb1f6057e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0xb136057e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: TEQ (rsr) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'TEQ (rsr)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "TEQ (rsr)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0xb156057e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: CMP (rsr) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'CMP (rsr)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "CMP (rsr)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0xb166057e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 15 + const uint32_t corrupt_inst = 0xb176857e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 14 + const uint32_t corrupt_inst = 0xb176457e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 13 + const uint32_t corrupt_inst = 0xb176257e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 12 + const uint32_t corrupt_inst = 0xb176157e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0xb17605fe; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRSH (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRSH (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRSH (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0xb176056e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: CMN (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'CMN (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "CMN (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_CMP_imm) { + // 1. Positive Verification: Ensures "CMP (imm)" is correctly identified. + const uint32_t valid_inst = 0x135507b5; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for CMP (imm): 0x135507b5"; + EXPECT_STREQ(info->name, "CMP (imm)") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x1b5507b5; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: BL + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'BL' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "BL") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x175507b5; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x115507b5; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRH (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRH (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRH (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x125507b5; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SUB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SUB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SUB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0x13d507b5; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: BIC (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'BIC (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "BIC (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x131507b5; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: TST (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'TST (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "TST (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x137507b5; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: CMN (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'CMN (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "CMN (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0x134507b5; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MOVT + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MOVT' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MOVT") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 15 + const uint32_t corrupt_inst = 0x135587b5; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 14 + const uint32_t corrupt_inst = 0x135547b5; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 13 + const uint32_t corrupt_inst = 0x135527b5; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 12 + const uint32_t corrupt_inst = 0x135517b5; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_CMP_reg) { + // 1. Positive Verification: Ensures "CMP (reg)" is correctly identified. + const uint32_t valid_inst = 0x41520be0; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for CMP (reg): 0x41520be0"; + EXPECT_STREQ(info->name, "CMP (reg)") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x49520be0; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDM (usr reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDM (usr reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDM (usr reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x45520be0; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x43520be0; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: CMP (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'CMP (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "CMP (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x40520be0; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SUB (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SUB (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SUB (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0x41d20be0; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: BIC (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'BIC (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "BIC (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x41120be0; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: TST (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'TST (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "TST (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x41720be0; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: CMN (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'CMN (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "CMN (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0x41420be0; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SMLALXY + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SMLALXY' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SMLALXY") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 15 + const uint32_t corrupt_inst = 0x41528be0; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 14 + const uint32_t corrupt_inst = 0x41524be0; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 13 + const uint32_t corrupt_inst = 0x41522be0; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 12 + const uint32_t corrupt_inst = 0x41521be0; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x41520bf0; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRSH (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRSH (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRSH (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_CMP_rsr) { + // 1. Positive Verification: Ensures "CMP (rsr)" is correctly identified. + const uint32_t valid_inst = 0xf1540e74; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for CMP (rsr): 0xf1540e74"; + EXPECT_STREQ(info->name, "CMP (rsr)") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0xf9540e74; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDM (usr reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDM (usr reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDM (usr reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0xf5540e74; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0xf3540e74; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: CMP (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'CMP (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "CMP (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0xf0540e74; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SUB (rsr) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SUB (rsr)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SUB (rsr)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0xf1d40e74; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: BIC (rsr) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'BIC (rsr)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "BIC (rsr)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0xf1140e74; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: TST (rsr) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'TST (rsr)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "TST (rsr)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0xf1740e74; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: CMN (rsr) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'CMN (rsr)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "CMN (rsr)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0xf1440e74; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 15 + const uint32_t corrupt_inst = 0xf1548e74; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 14 + const uint32_t corrupt_inst = 0xf1544e74; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 13 + const uint32_t corrupt_inst = 0xf1542e74; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 12 + const uint32_t corrupt_inst = 0xf1541e74; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0xf1540ef4; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRSH (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRSH (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRSH (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0xf1540e64; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: CMP (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'CMP (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "CMP (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_EOR_imm) { + // 1. Positive Verification: Ensures "EOR (imm)" is correctly identified. + const uint32_t valid_inst = 0x92285b10; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for EOR (imm): 0x92285b10"; + EXPECT_STREQ(info->name, "EOR (imm)") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x9a285b10; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: B + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'B' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "B") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x96285b10; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x90285b10; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: EOR (rsr) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'EOR (rsr)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "EOR (rsr)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x93285b10; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0x92a85b10; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: ADC (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'ADC (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "ADC (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x92685b10; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: RSB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'RSB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "RSB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x92085b10; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: AND (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'AND (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "AND (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_EOR_reg) { + // 1. Positive Verification: Ensures "EOR (reg)" is correctly identified. + const uint32_t valid_inst = 0x903b94af; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for EOR (reg): 0x903b94af"; + EXPECT_STREQ(info->name, "EOR (reg)") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x983b94af; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDMDA + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDMDA' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDMDA") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x943b94af; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRT (A1) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRT (A1)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRT (A1)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x923b94af; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: EOR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'EOR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "EOR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x913b94af; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0x90bb94af; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: ADC (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'ADC (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "ADC (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x907b94af; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: RSB (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'RSB (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "RSB (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x901b94af; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: AND (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'AND (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "AND (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x903b94bf; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_EOR_rsr) { + // 1. Positive Verification: Ensures "EOR (rsr)" is correctly identified. + const uint32_t valid_inst = 0x703a3139; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for EOR (rsr): 0x703a3139"; + EXPECT_STREQ(info->name, "EOR (rsr)") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x783a3139; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDMDA + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDMDA' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDMDA") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x743a3139; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRT (A1) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRT (A1)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRT (A1)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x723a3139; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: EOR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'EOR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "EOR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x713a3139; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0x70ba3139; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: ADC (rsr) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'ADC (rsr)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "ADC (rsr)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x707a3139; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: RSB (rsr) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'RSB (rsr)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "RSB (rsr)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x701a3139; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: AND (rsr) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'AND (rsr)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "AND (rsr)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0x703a31b9; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x703a3129; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: EOR (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'EOR (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "EOR (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_MOV_imm) { + // 1. Positive Verification: Ensures "MOV (imm)" is correctly identified. + const uint32_t valid_inst = 0x23a07925; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for MOV (imm): 0x23a07925"; + EXPECT_STREQ(info->name, "MOV (imm)") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x2ba07925; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: BL + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'BL' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "BL") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x27a07925; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STR (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STR (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STR (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x21a07925; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MOV (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MOV (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MOV (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x22a07925; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: ADC (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'ADC (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "ADC (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0x23207925; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x23e07925; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MVN (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MVN (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MVN (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x23807925; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: ORR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'ORR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "ORR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 19 + const uint32_t corrupt_inst = 0x23a87925; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 18 + const uint32_t corrupt_inst = 0x23a47925; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 17 + const uint32_t corrupt_inst = 0x23a27925; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 16 + const uint32_t corrupt_inst = 0x23a17925; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_MOV_reg) { + // 1. Positive Verification: Ensures "MOV (reg)" is correctly identified. + const uint32_t valid_inst = 0x61b00b2e; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for MOV (reg): 0x61b00b2e"; + EXPECT_STREQ(info->name, "MOV (reg)") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x69b00b2e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDMIB + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDMIB' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDMIB") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x65b00b2e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x63b00b2e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MOV (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MOV (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MOV (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x60b00b2e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: ADC (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'ADC (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "ADC (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0x61300b2e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: TEQ (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'TEQ (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "TEQ (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x61f00b2e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MVN (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MVN (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MVN (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x61900b2e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: ORR (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'ORR (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "ORR (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 19 + const uint32_t corrupt_inst = 0x61b80b2e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 18 + const uint32_t corrupt_inst = 0x61b40b2e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 17 + const uint32_t corrupt_inst = 0x61b20b2e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 16 + const uint32_t corrupt_inst = 0x61b10b2e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x61b00b3e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MOV (rsr) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MOV (rsr)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MOV (rsr)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_MOV_rsr) { + // 1. Positive Verification: Ensures "MOV (rsr)" is correctly identified. + const uint32_t valid_inst = 0x41a0ff79; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for MOV (rsr): 0x41a0ff79"; + EXPECT_STREQ(info->name, "MOV (rsr)") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x49a0ff79; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STMIB + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STMIB' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STMIB") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x45a0ff79; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x43a0ff79; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MOV (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MOV (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MOV (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x40a0ff79; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: ADC (rsr) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'ADC (rsr)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "ADC (rsr)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0x4120ff79; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: BKPT + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'BKPT' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "BKPT") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x41e0ff79; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MVN (rsr) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MVN (rsr)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MVN (rsr)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x4180ff79; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: ORR (rsr) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'ORR (rsr)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "ORR (rsr)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 19 + const uint32_t corrupt_inst = 0x41a8ff79; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 18 + const uint32_t corrupt_inst = 0x41a4ff79; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 17 + const uint32_t corrupt_inst = 0x41a2ff79; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 16 + const uint32_t corrupt_inst = 0x41a1ff79; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0x41a0fff9; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x41a0ff69; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MOV (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MOV (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MOV (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_MVN_imm) { + // 1. Positive Verification: Ensures "MVN (imm)" is correctly identified. + const uint32_t valid_inst = 0xc3f04b08; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for MVN (imm): 0xc3f04b08"; + EXPECT_STREQ(info->name, "MVN (imm)") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0xcbf04b08; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: BL + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'BL' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "BL") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0xc7f04b08; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0xc1f04b08; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MVN (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MVN (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MVN (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0xc2f04b08; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: RSC (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'RSC (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "RSC (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0xc3704b08; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0xc3b04b08; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MOV (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MOV (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MOV (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0xc3d04b08; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: BIC (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'BIC (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "BIC (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 19 + const uint32_t corrupt_inst = 0xc3f84b08; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 18 + const uint32_t corrupt_inst = 0xc3f44b08; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 17 + const uint32_t corrupt_inst = 0xc3f24b08; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 16 + const uint32_t corrupt_inst = 0xc3f14b08; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_MVN_reg) { + // 1. Positive Verification: Ensures "MVN (reg)" is correctly identified. + const uint32_t valid_inst = 0x31e08882; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for MVN (reg): 0x31e08882"; + EXPECT_STREQ(info->name, "MVN (reg)") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x39e08882; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x35e08882; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x33e08882; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MVN (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MVN (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MVN (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x30e08882; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: RSC (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'RSC (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "RSC (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0x31608882; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x31a08882; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MOV (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MOV (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MOV (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x31c08882; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: BIC (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'BIC (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "BIC (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 19 + const uint32_t corrupt_inst = 0x31e88882; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 18 + const uint32_t corrupt_inst = 0x31e48882; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 17 + const uint32_t corrupt_inst = 0x31e28882; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 16 + const uint32_t corrupt_inst = 0x31e18882; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x31e08892; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_MVN_rsr) { + // 1. Positive Verification: Ensures "MVN (rsr)" is correctly identified. + const uint32_t valid_inst = 0x21f0d659; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for MVN (rsr): 0x21f0d659"; + EXPECT_STREQ(info->name, "MVN (rsr)") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x29f0d659; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDM (exce ret) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDM (exce ret)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDM (exce ret)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x25f0d659; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x23f0d659; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MVN (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MVN (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MVN (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x20f0d659; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: RSC (rsr) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'RSC (rsr)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "RSC (rsr)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0x2170d659; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x21b0d659; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MOV (rsr) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MOV (rsr)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MOV (rsr)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x21d0d659; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: BIC (rsr) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'BIC (rsr)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "BIC (rsr)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 19 + const uint32_t corrupt_inst = 0x21f8d659; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 18 + const uint32_t corrupt_inst = 0x21f4d659; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 17 + const uint32_t corrupt_inst = 0x21f2d659; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 16 + const uint32_t corrupt_inst = 0x21f1d659; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0x21f0d6d9; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRSB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRSB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRSB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x21f0d649; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MVN (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MVN (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MVN (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_ORR_imm) { + // 1. Positive Verification: Ensures "ORR (imm)" is correctly identified. + const uint32_t valid_inst = 0x93955bf9; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for ORR (imm): 0x93955bf9"; + EXPECT_STREQ(info->name, "ORR (imm)") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x9b955bf9; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: BL + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'BL' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "BL") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x97955bf9; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x91955bf9; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x92955bf9; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: ADD (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'ADD (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "ADD (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0x93155bf9; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x93d55bf9; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: BIC (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'BIC (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "BIC (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x93b55bf9; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_ORR_reg) { + // 1. Positive Verification: Ensures "ORR (reg)" is correctly identified. + const uint32_t valid_inst = 0xc1903828; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for ORR (reg): 0xc1903828"; + EXPECT_STREQ(info->name, "ORR (reg)") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0xc9903828; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDMIB + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDMIB' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDMIB") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0xc5903828; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0xc3903828; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: ORR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'ORR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "ORR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0xc0903828; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: ADD (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'ADD (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "ADD (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0xc1103828; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0xc1d03828; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: BIC (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'BIC (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "BIC (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0xc1b03828; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MOV (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MOV (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MOV (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0xc1903838; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: ORR (rsr) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'ORR (rsr)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "ORR (rsr)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_ORR_rsr) { + // 1. Positive Verification: Ensures "ORR (rsr)" is correctly identified. + const uint32_t valid_inst = 0xc18e185b; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for ORR (rsr): 0xc18e185b"; + EXPECT_STREQ(info->name, "ORR (rsr)") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0xc98e185b; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STMIB + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STMIB' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STMIB") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0xc58e185b; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0xc38e185b; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: ORR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'ORR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "ORR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0xc08e185b; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: ADD (rsr) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'ADD (rsr)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "ADD (rsr)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0xc10e185b; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0xc1ce185b; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: BIC (rsr) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'BIC (rsr)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "BIC (rsr)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0xc1ae185b; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0xc18e18db; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0xc18e184b; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: ORR (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'ORR (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "ORR (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_RSB_imm) { + // 1. Positive Verification: Ensures "RSB (imm)" is correctly identified. + const uint32_t valid_inst = 0x526e5326; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for RSB (imm): 0x526e5326"; + EXPECT_STREQ(info->name, "RSB (imm)") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x5a6e5326; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: B + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'B' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "B") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x566e5326; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRBT (A2) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRBT (A2)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRBT (A2)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x506e5326; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: RSB (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'RSB (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "RSB (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x536e5326; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0x52ee5326; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: RSC (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'RSC (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "RSC (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x522e5326; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: EOR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'EOR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "EOR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x524e5326; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SUB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SUB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SUB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_RSB_reg) { + // 1. Positive Verification: Ensures "RSB (reg)" is correctly identified. + const uint32_t valid_inst = 0xf0609d87; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for RSB (reg): 0xf0609d87"; + EXPECT_STREQ(info->name, "RSB (reg)") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0xf8609d87; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0xf4609d87; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRBT (A1) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRBT (A1)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRBT (A1)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0xf2609d87; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: RSB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'RSB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "RSB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0xf1609d87; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0xf0e09d87; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: RSC (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'RSC (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "RSC (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0xf0209d87; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: EOR (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'EOR (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "EOR (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0xf0409d87; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SUB (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SUB (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SUB (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0xf0609d97; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MLS + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MLS' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MLS") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_RSB_rsr) { + // 1. Positive Verification: Ensures "RSB (rsr)" is correctly identified. + const uint32_t valid_inst = 0x9077d27c; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for RSB (rsr): 0x9077d27c"; + EXPECT_STREQ(info->name, "RSB (rsr)") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x9877d27c; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDM (exce ret) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDM (exce ret)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDM (exce ret)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x9477d27c; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRBT (A1) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRBT (A1)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRBT (A1)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x9277d27c; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: RSB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'RSB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "RSB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x9177d27c; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0x90f7d27c; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: RSC (rsr) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'RSC (rsr)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "RSC (rsr)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x9037d27c; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: EOR (rsr) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'EOR (rsr)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "EOR (rsr)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x9057d27c; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SUB (rsr) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SUB (rsr)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SUB (rsr)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0x9077d2fc; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRSHT (A1) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRSHT (A1)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRSHT (A1)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x9077d26c; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: RSB (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'RSB (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "RSB (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_RSC_imm) { + // 1. Positive Verification: Ensures "RSC (imm)" is correctly identified. + const uint32_t valid_inst = 0xe2f18ab6; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for RSC (imm): 0xe2f18ab6"; + EXPECT_STREQ(info->name, "RSC (imm)") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0xeaf18ab6; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: B + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'B' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "B") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0xe6f18ab6; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0xe0f18ab6; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRHT (A1) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRHT (A1)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRHT (A1)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0xe3f18ab6; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0xe2718ab6; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: RSB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'RSB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "RSB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0xe2b18ab6; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: ADC (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'ADC (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "ADC (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0xe2d18ab6; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SBC (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SBC (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SBC (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_RSC_reg) { + // 1. Positive Verification: Ensures "RSC (reg)" is correctly identified. + const uint32_t valid_inst = 0x00e79c8f; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for RSC (reg): 0xe79c8f"; + EXPECT_STREQ(info->name, "RSC (reg)") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x08e79c8f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x04e79c8f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRBT (A1) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRBT (A1)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRBT (A1)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x02e79c8f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: RSC (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'RSC (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "RSC (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x01e79c8f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0x00679c8f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: RSB (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'RSB (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "RSB (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x00a79c8f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: ADC (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'ADC (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "ADC (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x00c79c8f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SBC (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SBC (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SBC (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x00e79c9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SMLAL + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SMLAL' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SMLAL") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_RSC_rsr) { + // 1. Positive Verification: Ensures "RSC (rsr)" is correctly identified. + const uint32_t valid_inst = 0x20ee6e5b; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for RSC (rsr): 0x20ee6e5b"; + EXPECT_STREQ(info->name, "RSC (rsr)") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x28ee6e5b; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x24ee6e5b; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRBT (A1) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRBT (A1)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRBT (A1)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x22ee6e5b; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: RSC (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'RSC (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "RSC (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x21ee6e5b; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0x206e6e5b; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: RSB (rsr) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'RSB (rsr)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "RSB (rsr)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x20ae6e5b; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: ADC (rsr) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'ADC (rsr)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "ADC (rsr)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x20ce6e5b; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SBC (rsr) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SBC (rsr)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SBC (rsr)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0x20ee6edb; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRD (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRD (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRD (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x20ee6e4b; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: RSC (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'RSC (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "RSC (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_SBC_imm) { + // 1. Positive Verification: Ensures "SBC (imm)" is correctly identified. + const uint32_t valid_inst = 0x62df5e38; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for SBC (imm): 0x62df5e38"; + EXPECT_STREQ(info->name, "SBC (imm)") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x6adf5e38; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: B + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'B' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "B") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x66df5e38; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x60df5e38; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SBC (rsr) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SBC (rsr)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SBC (rsr)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x63df5e38; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: BIC (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'BIC (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "BIC (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0x625f5e38; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SUB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SUB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SUB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x629f5e38; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: ADD (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'ADD (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "ADD (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x62ff5e38; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: RSC (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'RSC (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "RSC (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_SBC_reg) { + // 1. Positive Verification: Ensures "SBC (reg)" is correctly identified. + const uint32_t valid_inst = 0x10c52dcb; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for SBC (reg): 0x10c52dcb"; + EXPECT_STREQ(info->name, "SBC (reg)") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x18c52dcb; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STM (usr reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STM (usr reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STM (usr reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x14c52dcb; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x12c52dcb; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SBC (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SBC (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SBC (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x11c52dcb; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: BIC (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'BIC (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "BIC (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0x10452dcb; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SUB (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SUB (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SUB (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x10852dcb; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: ADD (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'ADD (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "ADD (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x10e52dcb; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: RSC (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'RSC (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "RSC (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x10c52ddb; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRD (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRD (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRD (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_SBC_rsr) { + // 1. Positive Verification: Ensures "SBC (rsr)" is correctly identified. + const uint32_t valid_inst = 0x40c88f3a; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for SBC (rsr): 0x40c88f3a"; + EXPECT_STREQ(info->name, "SBC (rsr)") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x48c88f3a; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STM (usr reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STM (usr reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STM (usr reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x44c88f3a; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x42c88f3a; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SBC (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SBC (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SBC (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x41c88f3a; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: BIC (rsr) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'BIC (rsr)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "BIC (rsr)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0x40488f3a; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SUB (rsr) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SUB (rsr)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SUB (rsr)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x40888f3a; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: ADD (rsr) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'ADD (rsr)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "ADD (rsr)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x40e88f3a; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: RSC (rsr) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'RSC (rsr)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "RSC (rsr)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0x40c88fba; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRH (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRH (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRH (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x40c88f2a; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SBC (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SBC (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SBC (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_SUB_imm) { + // 1. Positive Verification: Ensures "SUB (imm)" is correctly identified. + const uint32_t valid_inst = 0xf2567472; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for SUB (imm): 0xf2567472"; + EXPECT_STREQ(info->name, "SUB (imm)") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0xfa567472; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: BLX (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'BLX (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "BLX (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0xf6567472; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0xf0567472; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SUB (rsr) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SUB (rsr)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SUB (rsr)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0xf3567472; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0xf2d67472; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SBC (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SBC (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SBC (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0xf2167472; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: AND (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'AND (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "AND (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0xf2767472; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: RSB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'RSB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "RSB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_SUB_reg) { + // 1. Positive Verification: Ensures "SUB (reg)" is correctly identified. + const uint32_t valid_inst = 0x30415ce8; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for SUB (reg): 0x30415ce8"; + EXPECT_STREQ(info->name, "SUB (reg)") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x38415ce8; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STM (usr reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STM (usr reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STM (usr reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x34415ce8; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x32415ce8; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SUB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SUB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SUB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x31415ce8; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SMLALXY + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SMLALXY' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SMLALXY") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0x30c15ce8; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SBC (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SBC (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SBC (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x30015ce8; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: AND (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'AND (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "AND (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x30615ce8; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: RSB (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'RSB (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "RSB (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x30415cf8; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRD (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRD (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRD (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_SUB_rsr) { + // 1. Positive Verification: Ensures "SUB (rsr)" is correctly identified. + const uint32_t valid_inst = 0xb049151d; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for SUB (rsr): 0xb049151d"; + EXPECT_STREQ(info->name, "SUB (rsr)") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0xb849151d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STM (usr reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STM (usr reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STM (usr reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0xb449151d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0xb249151d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SUB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SUB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SUB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0xb149151d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0xb0c9151d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SBC (rsr) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SBC (rsr)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SBC (rsr)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0xb009151d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: AND (rsr) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'AND (rsr)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "AND (rsr)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0xb069151d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: RSB (rsr) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'RSB (rsr)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "RSB (rsr)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0xb049159d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: UMAAL + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'UMAAL' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "UMAAL") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0xb049150d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SUB (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SUB (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SUB (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_TEQ_imm) { + // 1. Positive Verification: Ensures "TEQ (imm)" is correctly identified. + const uint32_t valid_inst = 0x533500b3; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for TEQ (imm): 0x533500b3"; + EXPECT_STREQ(info->name, "TEQ (imm)") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x5b3500b3; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: BL + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'BL' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "BL") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x573500b3; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x513500b3; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRH (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRH (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRH (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x523500b3; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: EOR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'EOR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "EOR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0x53b500b3; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x537500b3; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: CMN (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'CMN (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "CMN (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x531500b3; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: TST (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'TST (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "TST (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0x532500b3; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 15 + const uint32_t corrupt_inst = 0x533580b3; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 14 + const uint32_t corrupt_inst = 0x533540b3; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 13 + const uint32_t corrupt_inst = 0x533520b3; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 12 + const uint32_t corrupt_inst = 0x533510b3; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_TEQ_reg) { + // 1. Positive Verification: Ensures "TEQ (reg)" is correctly identified. + const uint32_t valid_inst = 0x813a04a9; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for TEQ (reg): 0x813a04a9"; + EXPECT_STREQ(info->name, "TEQ (reg)") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x893a04a9; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDMDB + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDMDB' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDMDB") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x853a04a9; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x833a04a9; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: TEQ (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'TEQ (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "TEQ (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x803a04a9; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: EOR (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'EOR (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "EOR (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0x81ba04a9; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x817a04a9; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: CMN (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'CMN (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "CMN (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x811a04a9; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: TST (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'TST (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "TST (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0x812a04a9; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SMULWY + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SMULWY' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SMULWY") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 15 + const uint32_t corrupt_inst = 0x813a84a9; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 14 + const uint32_t corrupt_inst = 0x813a44a9; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 13 + const uint32_t corrupt_inst = 0x813a24a9; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 12 + const uint32_t corrupt_inst = 0x813a14a9; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x813a04b9; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_TEQ_rsr) { + // 1. Positive Verification: Ensures "TEQ (rsr)" is correctly identified. + const uint32_t valid_inst = 0xd139005d; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for TEQ (rsr): 0xd139005d"; + EXPECT_STREQ(info->name, "TEQ (rsr)") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0xd939005d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDMDB + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDMDB' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDMDB") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0xd539005d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0xd339005d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: TEQ (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'TEQ (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "TEQ (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0xd039005d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: EOR (rsr) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'EOR (rsr)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "EOR (rsr)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0xd1b9005d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0xd179005d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: CMN (rsr) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'CMN (rsr)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "CMN (rsr)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0xd119005d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: TST (rsr) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'TST (rsr)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "TST (rsr)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0xd129005d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: QSUB + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'QSUB' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "QSUB") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 15 + const uint32_t corrupt_inst = 0xd139805d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 14 + const uint32_t corrupt_inst = 0xd139405d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 13 + const uint32_t corrupt_inst = 0xd139205d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 12 + const uint32_t corrupt_inst = 0xd139105d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0xd13900dd; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRSB (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRSB (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRSB (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0xd139004d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: TEQ (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'TEQ (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "TEQ (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_TST_imm) { + // 1. Positive Verification: Ensures "TST (imm)" is correctly identified. + const uint32_t valid_inst = 0xc3140ada; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for TST (imm): 0xc3140ada"; + EXPECT_STREQ(info->name, "TST (imm)") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0xcb140ada; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: BL + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'BL' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "BL") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0xc7140ada; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0xc1140ada; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0xc2140ada; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: AND (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'AND (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "AND (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0xc3940ada; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: ORR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'ORR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "ORR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0xc3540ada; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: CMP (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'CMP (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "CMP (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0xc3340ada; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: TEQ (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'TEQ (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "TEQ (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0xc3040ada; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MOVW + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MOVW' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MOVW") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 15 + const uint32_t corrupt_inst = 0xc3148ada; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 14 + const uint32_t corrupt_inst = 0xc3144ada; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 13 + const uint32_t corrupt_inst = 0xc3142ada; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 12 + const uint32_t corrupt_inst = 0xc3141ada; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_TST_reg) { + // 1. Positive Verification: Ensures "TST (reg)" is correctly identified. + const uint32_t valid_inst = 0x71110468; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for TST (reg): 0x71110468"; + EXPECT_STREQ(info->name, "TST (reg)") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x79110468; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDMDB + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDMDB' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDMDB") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x75110468; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x73110468; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: TST (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'TST (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "TST (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x70110468; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: AND (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'AND (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "AND (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0x71910468; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: ORR (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'ORR (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "ORR (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x71510468; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: CMP (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'CMP (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "CMP (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x71310468; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: TEQ (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'TEQ (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "TEQ (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0x71010468; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 15 + const uint32_t corrupt_inst = 0x71118468; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 14 + const uint32_t corrupt_inst = 0x71114468; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 13 + const uint32_t corrupt_inst = 0x71112468; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 12 + const uint32_t corrupt_inst = 0x71111468; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x71110478; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: TST (rsr) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'TST (rsr)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "TST (rsr)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_TST_rsr) { + // 1. Positive Verification: Ensures "TST (rsr)" is correctly identified. + const uint32_t valid_inst = 0xa1150a5d; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for TST (rsr): 0xa1150a5d"; + EXPECT_STREQ(info->name, "TST (rsr)") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0xa9150a5d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDMDB + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDMDB' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDMDB") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0xa5150a5d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0xa3150a5d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: TST (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'TST (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "TST (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0xa0150a5d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: AND (rsr) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'AND (rsr)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "AND (rsr)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0xa1950a5d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: ORR (rsr) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'ORR (rsr)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "ORR (rsr)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0xa1550a5d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: CMP (rsr) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'CMP (rsr)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "CMP (rsr)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0xa1350a5d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: TEQ (rsr) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'TEQ (rsr)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "TEQ (rsr)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0xa1050a5d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 15 + const uint32_t corrupt_inst = 0xa1158a5d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 14 + const uint32_t corrupt_inst = 0xa1154a5d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 13 + const uint32_t corrupt_inst = 0xa1152a5d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 12 + const uint32_t corrupt_inst = 0xa1151a5d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0xa1150add; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0xa1150a4d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: TST (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'TST (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "TST (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_BKPT) { + // 1. Positive Verification: Ensures "BKPT" is correctly identified. + const uint32_t valid_inst = 0xe12e1578; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for BKPT: 0xe12e1578"; + EXPECT_STREQ(info->name, "BKPT") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0xe92e1578; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STMDB + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STMDB' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STMDB") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0xe52e1578; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0xe32e1578; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0xe02e1578; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: EOR (rsr) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'EOR (rsr)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "EOR (rsr)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0xe1ae1578; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0xe16e1578; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0xe10e1578; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0xe13e1578; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0xe12e15f8; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0xe12e1538; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0xe12e1558; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0xe12e1568; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_SVC) { + // 1. Positive Verification: Ensures "SVC" is correctly identified. + const uint32_t valid_inst = 0x9f2b0061; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for SVC: 0x9f2b0061"; + EXPECT_STREQ(info->name, "SVC") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x972b0061; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STR (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STR (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STR (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x9b2b0061; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: BL + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'BL' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "BL") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x9d2b0061; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STC + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STC' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STC") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x9e2b0061; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: CDP + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'CDP' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "CDP") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_UDF) { + // 1. Positive Verification: Ensures "UDF" is correctly identified. + const uint32_t valid_inst = 0xe7f99af7; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for UDF: 0xe7f99af7"; + EXPECT_STREQ(info->name, "UDF") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 31 + const uint32_t corrupt_inst = 0x67f99af7; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 30 + const uint32_t corrupt_inst = 0xa7f99af7; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 29 + const uint32_t corrupt_inst = 0xc7f99af7; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 28 + const uint32_t corrupt_inst = 0xf7f99af7; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0xeff99af7; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SVC + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SVC' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SVC") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0xe3f99af7; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0xe5f99af7; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0xe6f99af7; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0xe7799af7; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0xe7b99af7; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0xe7d99af7; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0xe7e99af7; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0xe7f99a77; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0xe7f99ab7; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0xe7f99ad7; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: UBFX + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'UBFX' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "UBFX") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0xe7f99ae7; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_SXTB) { + // 1. Positive Verification: Ensures "SXTB" is correctly identified. + const uint32_t valid_inst = 0x86af4476; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for SXTB: 0x86af4476"; + EXPECT_STREQ(info->name, "SXTB") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x8eaf4476; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MCR + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MCR' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MCR") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x82af4476; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: ADC (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'ADC (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "ADC (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x84af4476; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRT (A1) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRT (A1)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRT (A1)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x87af4476; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0x862f4476; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x86ef4476; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: UXTB + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'UXTB' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "UXTB") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x868f4476; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SXTB16 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SXTB16' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SXTB16") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0x86bf4476; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SXTH + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SXTH' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SXTH") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 19 + const uint32_t corrupt_inst = 0x86a74476; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SXTAB + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SXTAB' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SXTAB") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 18 + const uint32_t corrupt_inst = 0x86ab4476; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SXTAB + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SXTAB' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SXTAB") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 17 + const uint32_t corrupt_inst = 0x86ad4476; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SXTAB + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SXTAB' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SXTAB") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 16 + const uint32_t corrupt_inst = 0x86ae4476; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SXTAB + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SXTAB' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SXTAB") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 9 + const uint32_t corrupt_inst = 0x86af4676; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 8 + const uint32_t corrupt_inst = 0x86af4576; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0x86af44f6; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0x86af4436; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0x86af4456; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SSAT + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SSAT' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SSAT") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x86af4466; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRT (A2) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRT (A2)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRT (A2)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_SXTB16) { + // 1. Positive Verification: Ensures "SXTB16" is correctly identified. + const uint32_t valid_inst = 0x368f9475; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for SXTB16: 0x368f9475"; + EXPECT_STREQ(info->name, "SXTB16") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x3e8f9475; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MCR + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MCR' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MCR") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x328f9475; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: ADD (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'ADD (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "ADD (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x348f9475; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x378f9475; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0x360f9475; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x36cf9475; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: UXTB16 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'UXTB16' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "UXTB16") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x36af9475; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SXTB + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SXTB' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SXTB") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0x369f9475; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 19 + const uint32_t corrupt_inst = 0x36879475; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SXTAB16 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SXTAB16' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SXTAB16") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 18 + const uint32_t corrupt_inst = 0x368b9475; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SXTAB16 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SXTAB16' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SXTAB16") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 17 + const uint32_t corrupt_inst = 0x368d9475; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SXTAB16 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SXTAB16' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SXTAB16") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 16 + const uint32_t corrupt_inst = 0x368e9475; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SXTAB16 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SXTAB16' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SXTAB16") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 9 + const uint32_t corrupt_inst = 0x368f9675; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 8 + const uint32_t corrupt_inst = 0x368f9575; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0x368f94f5; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0x368f9435; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0x368f9455; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: PKHTB + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'PKHTB' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "PKHTB") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x368f9465; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STR (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STR (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STR (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_SXTH) { + // 1. Positive Verification: Ensures "SXTH" is correctly identified. + const uint32_t valid_inst = 0x66bfb073; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for SXTH: 0x66bfb073"; + EXPECT_STREQ(info->name, "SXTH") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x6ebfb073; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MRC + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MRC' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MRC") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x62bfb073; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: ADC (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'ADC (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "ADC (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x64bfb073; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRT (A1) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRT (A1)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRT (A1)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x67bfb073; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0x663fb073; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x66ffb073; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: UXTH + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'UXTH' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "UXTH") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x669fb073; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0x66afb073; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SXTB + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SXTB' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SXTB") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 19 + const uint32_t corrupt_inst = 0x66b7b073; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SXTAH + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SXTAH' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SXTAH") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 18 + const uint32_t corrupt_inst = 0x66bbb073; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SXTAH + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SXTAH' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SXTAH") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 17 + const uint32_t corrupt_inst = 0x66bdb073; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SXTAH + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SXTAH' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SXTAH") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 16 + const uint32_t corrupt_inst = 0x66beb073; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SXTAH + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SXTAH' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SXTAH") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 9 + const uint32_t corrupt_inst = 0x66bfb273; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 8 + const uint32_t corrupt_inst = 0x66bfb173; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0x66bfb0f3; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0x66bfb033; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0x66bfb053; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SSAT + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SSAT' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SSAT") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x66bfb063; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRT (A2) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRT (A2)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRT (A2)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_SXTAB) { + // 1. Positive Verification: Ensures "SXTAB" is correctly identified. + const uint32_t valid_inst = 0x86a0f47c; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for SXTAB: 0x86a0f47c"; + EXPECT_STREQ(info->name, "SXTAB") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x8ea0f47c; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MCR + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MCR' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MCR") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x82a0f47c; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: ADC (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'ADC (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "ADC (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x84a0f47c; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRT (A1) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRT (A1)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRT (A1)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x87a0f47c; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0x8620f47c; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x86e0f47c; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: UXTAB + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'UXTAB' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "UXTAB") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x8680f47c; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SXTAB16 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SXTAB16' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SXTAB16") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0x86b0f47c; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SXTAH + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SXTAH' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SXTAH") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 9 + const uint32_t corrupt_inst = 0x86a0f67c; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 8 + const uint32_t corrupt_inst = 0x86a0f57c; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0x86a0f4fc; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0x86a0f43c; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0x86a0f45c; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SSAT + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SSAT' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SSAT") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x86a0f46c; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRT (A2) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRT (A2)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRT (A2)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_SXTAB16) { + // 1. Positive Verification: Ensures "SXTAB16" is correctly identified. + const uint32_t valid_inst = 0xf6805477; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for SXTAB16: 0xf6805477"; + EXPECT_STREQ(info->name, "SXTAB16") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0xfe805477; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MCR + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MCR' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MCR") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0xf2805477; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: ADD (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'ADD (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "ADD (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0xf4805477; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0xf7805477; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0xf6005477; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0xf6c05477; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: UXTAB16 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'UXTAB16' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "UXTAB16") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0xf6a05477; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SXTAB + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SXTAB' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SXTAB") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0xf6905477; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 9 + const uint32_t corrupt_inst = 0xf6805677; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 8 + const uint32_t corrupt_inst = 0xf6805577; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0xf68054f7; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0xf6805437; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0xf6805457; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: PKHTB + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'PKHTB' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "PKHTB") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0xf6805467; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STR (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STR (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STR (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_SXTAH) { + // 1. Positive Verification: Ensures "SXTAH" is correctly identified. + const uint32_t valid_inst = 0x16b0e076; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for SXTAH: 0x16b0e076"; + EXPECT_STREQ(info->name, "SXTAH") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x1eb0e076; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MRC + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MRC' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MRC") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x12b0e076; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: ADC (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'ADC (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "ADC (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x14b0e076; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRT (A1) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRT (A1)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRT (A1)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x17b0e076; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0x1630e076; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x16f0e076; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: UXTAH + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'UXTAH' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "UXTAH") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x1690e076; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0x16a0e076; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SXTAB + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SXTAB' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SXTAB") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 9 + const uint32_t corrupt_inst = 0x16b0e276; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 8 + const uint32_t corrupt_inst = 0x16b0e176; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0x16b0e0f6; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0x16b0e036; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0x16b0e056; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SSAT + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SSAT' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SSAT") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x16b0e066; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRT (A2) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRT (A2)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRT (A2)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_UXTB) { + // 1. Positive Verification: Ensures "UXTB" is correctly identified. + const uint32_t valid_inst = 0x36ef3472; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for UXTB: 0x36ef3472"; + EXPECT_STREQ(info->name, "UXTB") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x3eef3472; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MCR + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MCR' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MCR") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x32ef3472; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: RSC (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'RSC (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "RSC (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x34ef3472; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRBT (A1) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRBT (A1)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRBT (A1)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x37ef3472; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0x366f3472; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x36af3472; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SXTB + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SXTB' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SXTB") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x36cf3472; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: UXTB16 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'UXTB16' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "UXTB16") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0x36ff3472; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: UXTH + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'UXTH' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "UXTH") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 19 + const uint32_t corrupt_inst = 0x36e73472; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: UXTAB + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'UXTAB' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "UXTAB") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 18 + const uint32_t corrupt_inst = 0x36eb3472; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: UXTAB + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'UXTAB' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "UXTAB") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 17 + const uint32_t corrupt_inst = 0x36ed3472; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: UXTAB + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'UXTAB' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "UXTAB") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 16 + const uint32_t corrupt_inst = 0x36ee3472; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: UXTAB + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'UXTAB' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "UXTAB") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 9 + const uint32_t corrupt_inst = 0x36ef3672; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 8 + const uint32_t corrupt_inst = 0x36ef3572; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0x36ef34f2; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0x36ef3432; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0x36ef3452; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: USAT + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'USAT' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "USAT") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x36ef3462; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRBT (A2) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRBT (A2)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRBT (A2)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_UXTB16) { + // 1. Positive Verification: Ensures "UXTB16" is correctly identified. + const uint32_t valid_inst = 0x16cf187d; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for UXTB16: 0x16cf187d"; + EXPECT_STREQ(info->name, "UXTB16") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x1ecf187d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MCR + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MCR' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MCR") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x12cf187d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SBC (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SBC (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SBC (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x14cf187d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x17cf187d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0x164f187d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x168f187d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SXTB16 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SXTB16' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SXTB16") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x16ef187d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: UXTB + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'UXTB' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "UXTB") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0x16df187d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 19 + const uint32_t corrupt_inst = 0x16c7187d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: UXTAB16 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'UXTAB16' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "UXTAB16") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 18 + const uint32_t corrupt_inst = 0x16cb187d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: UXTAB16 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'UXTAB16' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "UXTAB16") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 17 + const uint32_t corrupt_inst = 0x16cd187d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: UXTAB16 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'UXTAB16' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "UXTAB16") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 16 + const uint32_t corrupt_inst = 0x16ce187d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: UXTAB16 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'UXTAB16' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "UXTAB16") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 9 + const uint32_t corrupt_inst = 0x16cf1a7d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 8 + const uint32_t corrupt_inst = 0x16cf197d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0x16cf18fd; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0x16cf183d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0x16cf185d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x16cf186d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRB (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRB (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRB (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_UXTH) { + // 1. Positive Verification: Ensures "UXTH" is correctly identified. + const uint32_t valid_inst = 0x56ff6079; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for UXTH: 0x56ff6079"; + EXPECT_STREQ(info->name, "UXTH") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x5eff6079; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MRC + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MRC' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MRC") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x52ff6079; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: RSC (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'RSC (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "RSC (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x54ff6079; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRBT (A1) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRBT (A1)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRBT (A1)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x57ff6079; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0x567f6079; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x56bf6079; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SXTH + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SXTH' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SXTH") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x56df6079; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0x56ef6079; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: UXTB + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'UXTB' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "UXTB") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 19 + const uint32_t corrupt_inst = 0x56f76079; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: UXTAH + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'UXTAH' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "UXTAH") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 18 + const uint32_t corrupt_inst = 0x56fb6079; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: UXTAH + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'UXTAH' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "UXTAH") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 17 + const uint32_t corrupt_inst = 0x56fd6079; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: UXTAH + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'UXTAH' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "UXTAH") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 16 + const uint32_t corrupt_inst = 0x56fe6079; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: UXTAH + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'UXTAH' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "UXTAH") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 9 + const uint32_t corrupt_inst = 0x56ff6279; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 8 + const uint32_t corrupt_inst = 0x56ff6179; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0x56ff60f9; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0x56ff6039; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0x56ff6059; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: USAT + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'USAT' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "USAT") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x56ff6069; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRBT (A2) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRBT (A2)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRBT (A2)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_UXTAB) { + // 1. Positive Verification: Ensures "UXTAB" is correctly identified. + const uint32_t valid_inst = 0xb6e08c70; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for UXTAB: 0xb6e08c70"; + EXPECT_STREQ(info->name, "UXTAB") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0xbee08c70; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MCR + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MCR' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MCR") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0xb2e08c70; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: RSC (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'RSC (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "RSC (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0xb4e08c70; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRBT (A1) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRBT (A1)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRBT (A1)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0xb7e08c70; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0xb6608c70; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0xb6a08c70; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SXTAB + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SXTAB' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SXTAB") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0xb6c08c70; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: UXTAB16 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'UXTAB16' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "UXTAB16") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0xb6f08c70; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: UXTAH + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'UXTAH' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "UXTAH") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 9 + const uint32_t corrupt_inst = 0xb6e08e70; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 8 + const uint32_t corrupt_inst = 0xb6e08d70; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0xb6e08cf0; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0xb6e08c30; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0xb6e08c50; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: USAT + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'USAT' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "USAT") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0xb6e08c60; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRBT (A2) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRBT (A2)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRBT (A2)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_UXTAB16) { + // 1. Positive Verification: Ensures "UXTAB16" is correctly identified. + const uint32_t valid_inst = 0x36c07c7b; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for UXTAB16: 0x36c07c7b"; + EXPECT_STREQ(info->name, "UXTAB16") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x3ec07c7b; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MCR + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MCR' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MCR") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x32c07c7b; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SBC (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SBC (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SBC (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x34c07c7b; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x37c07c7b; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0x36407c7b; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x36807c7b; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SXTAB16 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SXTAB16' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SXTAB16") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x36e07c7b; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: UXTAB + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'UXTAB' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "UXTAB") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0x36d07c7b; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 9 + const uint32_t corrupt_inst = 0x36c07e7b; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 8 + const uint32_t corrupt_inst = 0x36c07d7b; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0x36c07cfb; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0x36c07c3b; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0x36c07c5b; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x36c07c6b; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRB (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRB (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRB (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_UXTAH) { + // 1. Positive Verification: Ensures "UXTAH" is correctly identified. + const uint32_t valid_inst = 0xf6f0b073; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for UXTAH: 0xf6f0b073"; + EXPECT_STREQ(info->name, "UXTAH") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0xfef0b073; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MRC + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MRC' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MRC") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0xf2f0b073; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: RSC (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'RSC (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "RSC (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0xf4f0b073; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRBT (A1) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRBT (A1)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRBT (A1)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0xf7f0b073; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0xf670b073; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0xf6b0b073; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SXTAH + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SXTAH' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SXTAH") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0xf6d0b073; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0xf6e0b073; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: UXTAB + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'UXTAB' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "UXTAB") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 9 + const uint32_t corrupt_inst = 0xf6f0b273; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 8 + const uint32_t corrupt_inst = 0xf6f0b173; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0xf6f0b0f3; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0xf6f0b033; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0xf6f0b053; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: USAT + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'USAT' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "USAT") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0xf6f0b063; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRBT (A2) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRBT (A2)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRBT (A2)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_PLD_imm) { + // 1. Positive Verification: Ensures "PLD (imm)" is correctly identified. + const uint32_t valid_inst = 0xf599fcb1; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for PLD (imm): 0xf599fcb1"; + EXPECT_STREQ(info->name, "PLD (imm)") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 31 + const uint32_t corrupt_inst = 0x7599fcb1; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 30 + const uint32_t corrupt_inst = 0xb599fcb1; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 29 + const uint32_t corrupt_inst = 0xd599fcb1; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 28 + const uint32_t corrupt_inst = 0xe599fcb1; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0xfd99fcb1; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDC + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDC' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDC") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0xf199fcb1; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0xf799fcb1; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0xf499fcb1; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0xf5b9fcb1; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0xf589fcb1; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 15 + const uint32_t corrupt_inst = 0xf5997cb1; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 14 + const uint32_t corrupt_inst = 0xf599bcb1; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 13 + const uint32_t corrupt_inst = 0xf599dcb1; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 12 + const uint32_t corrupt_inst = 0xf599ecb1; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_PLD_reg) { + // 1. Positive Verification: Ensures "PLD (reg)" is correctly identified. + const uint32_t valid_inst = 0xf719f946; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for PLD (reg): 0xf719f946"; + EXPECT_STREQ(info->name, "PLD (reg)") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 31 + const uint32_t corrupt_inst = 0x7719f946; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDR (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDR (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDR (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 30 + const uint32_t corrupt_inst = 0xb719f946; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDR (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDR (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDR (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 29 + const uint32_t corrupt_inst = 0xd719f946; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDR (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDR (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDR (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 28 + const uint32_t corrupt_inst = 0xe719f946; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDR (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDR (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDR (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0xff19f946; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SVC + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SVC' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SVC") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0xf319f946; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0xf519f946; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: PLD (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'PLD (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "PLD (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0xf619f946; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDR (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDR (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDR (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0xf739f946; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDR (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDR (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDR (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0xf709f946; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STR (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STR (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STR (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 15 + const uint32_t corrupt_inst = 0xf7197946; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDR (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDR (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDR (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 14 + const uint32_t corrupt_inst = 0xf719b946; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDR (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDR (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDR (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 13 + const uint32_t corrupt_inst = 0xf719d946; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDR (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDR (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDR (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 12 + const uint32_t corrupt_inst = 0xf719e946; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDR (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDR (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDR (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0xf719f956; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_SEV) { + // 1. Positive Verification: Ensures "SEV" is correctly identified. + const uint32_t valid_inst = 0x6320f004; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for SEV: 0x6320f004"; + EXPECT_STREQ(info->name, "SEV") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x6b20f004; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: BL + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'BL' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "BL") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x6720f004; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STR (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STR (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STR (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x6120f004; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MSR (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MSR (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MSR (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x6220f004; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: EOR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'EOR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "EOR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0x63a0f004; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MOV (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MOV (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MOV (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x6360f004; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x6300f004; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MOVW + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MOVW' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MOVW") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0x6330f004; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 19 + const uint32_t corrupt_inst = 0x6328f004; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MSR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MSR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MSR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 18 + const uint32_t corrupt_inst = 0x6324f004; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MSR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MSR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MSR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 17 + const uint32_t corrupt_inst = 0x6322f004; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MSR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MSR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MSR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 16 + const uint32_t corrupt_inst = 0x6321f004; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MSR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MSR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MSR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 15 + const uint32_t corrupt_inst = 0x63207004; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 14 + const uint32_t corrupt_inst = 0x6320b004; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 13 + const uint32_t corrupt_inst = 0x6320d004; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 12 + const uint32_t corrupt_inst = 0x6320e004; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 11 + const uint32_t corrupt_inst = 0x6320f804; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MSR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MSR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MSR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 10 + const uint32_t corrupt_inst = 0x6320f404; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MSR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MSR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MSR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 9 + const uint32_t corrupt_inst = 0x6320f204; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MSR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MSR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MSR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 8 + const uint32_t corrupt_inst = 0x6320f104; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MSR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MSR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MSR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0x6320f084; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MSR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MSR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MSR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0x6320f044; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MSR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MSR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MSR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0x6320f024; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MSR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MSR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MSR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x6320f014; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MSR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MSR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MSR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 3 + const uint32_t corrupt_inst = 0x6320f00c; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MSR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MSR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MSR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 2 + const uint32_t corrupt_inst = 0x6320f000; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: NOP + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'NOP' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "NOP") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 1 + const uint32_t corrupt_inst = 0x6320f006; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MSR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MSR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MSR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 0 + const uint32_t corrupt_inst = 0x6320f005; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SEVL + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SEVL' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SEVL") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_SEVL) { + // 1. Positive Verification: Ensures "SEVL" is correctly identified. + const uint32_t valid_inst = 0x8320f005; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for SEVL: 0x8320f005"; + EXPECT_STREQ(info->name, "SEVL") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x8b20f005; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: BL + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'BL' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "BL") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x8720f005; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STR (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STR (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STR (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x8120f005; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MSR (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MSR (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MSR (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x8220f005; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: EOR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'EOR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "EOR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0x83a0f005; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MOV (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MOV (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MOV (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x8360f005; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x8300f005; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MOVW + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MOVW' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MOVW") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0x8330f005; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 19 + const uint32_t corrupt_inst = 0x8328f005; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MSR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MSR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MSR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 18 + const uint32_t corrupt_inst = 0x8324f005; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MSR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MSR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MSR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 17 + const uint32_t corrupt_inst = 0x8322f005; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MSR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MSR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MSR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 16 + const uint32_t corrupt_inst = 0x8321f005; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MSR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MSR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MSR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 15 + const uint32_t corrupt_inst = 0x83207005; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 14 + const uint32_t corrupt_inst = 0x8320b005; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 13 + const uint32_t corrupt_inst = 0x8320d005; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 12 + const uint32_t corrupt_inst = 0x8320e005; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 11 + const uint32_t corrupt_inst = 0x8320f805; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MSR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MSR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MSR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 10 + const uint32_t corrupt_inst = 0x8320f405; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MSR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MSR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MSR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 9 + const uint32_t corrupt_inst = 0x8320f205; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MSR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MSR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MSR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 8 + const uint32_t corrupt_inst = 0x8320f105; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MSR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MSR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MSR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0x8320f085; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MSR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MSR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MSR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0x8320f045; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MSR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MSR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MSR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0x8320f025; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MSR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MSR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MSR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x8320f015; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MSR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MSR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MSR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 3 + const uint32_t corrupt_inst = 0x8320f00d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MSR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MSR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MSR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 2 + const uint32_t corrupt_inst = 0x8320f001; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: YIELD + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'YIELD' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "YIELD") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 1 + const uint32_t corrupt_inst = 0x8320f007; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MSR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MSR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MSR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 0 + const uint32_t corrupt_inst = 0x8320f004; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SEV + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SEV' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SEV") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_WFE) { + // 1. Positive Verification: Ensures "WFE" is correctly identified. + const uint32_t valid_inst = 0xd320f002; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for WFE: 0xd320f002"; + EXPECT_STREQ(info->name, "WFE") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0xdb20f002; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: BL + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'BL' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "BL") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0xd720f002; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STR (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STR (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STR (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0xd120f002; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MSR (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MSR (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MSR (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0xd220f002; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: EOR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'EOR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "EOR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0xd3a0f002; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MOV (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MOV (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MOV (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0xd360f002; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0xd300f002; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MOVW + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MOVW' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MOVW") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0xd330f002; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 19 + const uint32_t corrupt_inst = 0xd328f002; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MSR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MSR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MSR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 18 + const uint32_t corrupt_inst = 0xd324f002; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MSR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MSR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MSR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 17 + const uint32_t corrupt_inst = 0xd322f002; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MSR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MSR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MSR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 16 + const uint32_t corrupt_inst = 0xd321f002; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MSR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MSR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MSR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 15 + const uint32_t corrupt_inst = 0xd3207002; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 14 + const uint32_t corrupt_inst = 0xd320b002; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 13 + const uint32_t corrupt_inst = 0xd320d002; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 12 + const uint32_t corrupt_inst = 0xd320e002; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 11 + const uint32_t corrupt_inst = 0xd320f802; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MSR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MSR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MSR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 10 + const uint32_t corrupt_inst = 0xd320f402; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MSR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MSR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MSR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 9 + const uint32_t corrupt_inst = 0xd320f202; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MSR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MSR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MSR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 8 + const uint32_t corrupt_inst = 0xd320f102; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MSR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MSR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MSR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0xd320f082; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MSR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MSR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MSR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0xd320f042; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MSR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MSR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MSR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0xd320f022; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MSR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MSR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MSR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0xd320f012; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MSR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MSR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MSR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 3 + const uint32_t corrupt_inst = 0xd320f00a; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MSR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MSR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MSR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 2 + const uint32_t corrupt_inst = 0xd320f006; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MSR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MSR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MSR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 1 + const uint32_t corrupt_inst = 0xd320f000; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: NOP + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'NOP' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "NOP") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 0 + const uint32_t corrupt_inst = 0xd320f003; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: WFI + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'WFI' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "WFI") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_WFI) { + // 1. Positive Verification: Ensures "WFI" is correctly identified. + const uint32_t valid_inst = 0x7320f003; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for WFI: 0x7320f003"; + EXPECT_STREQ(info->name, "WFI") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x7b20f003; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: BL + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'BL' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "BL") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x7720f003; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STR (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STR (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STR (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x7120f003; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MSR (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MSR (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MSR (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x7220f003; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: EOR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'EOR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "EOR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0x73a0f003; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MOV (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MOV (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MOV (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x7360f003; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x7300f003; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MOVW + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MOVW' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MOVW") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0x7330f003; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 19 + const uint32_t corrupt_inst = 0x7328f003; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MSR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MSR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MSR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 18 + const uint32_t corrupt_inst = 0x7324f003; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MSR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MSR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MSR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 17 + const uint32_t corrupt_inst = 0x7322f003; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MSR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MSR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MSR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 16 + const uint32_t corrupt_inst = 0x7321f003; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MSR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MSR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MSR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 15 + const uint32_t corrupt_inst = 0x73207003; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 14 + const uint32_t corrupt_inst = 0x7320b003; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 13 + const uint32_t corrupt_inst = 0x7320d003; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 12 + const uint32_t corrupt_inst = 0x7320e003; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 11 + const uint32_t corrupt_inst = 0x7320f803; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MSR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MSR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MSR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 10 + const uint32_t corrupt_inst = 0x7320f403; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MSR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MSR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MSR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 9 + const uint32_t corrupt_inst = 0x7320f203; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MSR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MSR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MSR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 8 + const uint32_t corrupt_inst = 0x7320f103; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MSR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MSR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MSR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0x7320f083; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MSR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MSR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MSR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0x7320f043; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MSR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MSR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MSR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0x7320f023; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MSR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MSR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MSR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x7320f013; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MSR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MSR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MSR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 3 + const uint32_t corrupt_inst = 0x7320f00b; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MSR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MSR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MSR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 2 + const uint32_t corrupt_inst = 0x7320f007; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MSR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MSR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MSR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 1 + const uint32_t corrupt_inst = 0x7320f001; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: YIELD + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'YIELD' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "YIELD") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 0 + const uint32_t corrupt_inst = 0x7320f002; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: WFE + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'WFE' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "WFE") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_YIELD) { + // 1. Positive Verification: Ensures "YIELD" is correctly identified. + const uint32_t valid_inst = 0xf320f001; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for YIELD: 0xf320f001"; + EXPECT_STREQ(info->name, "YIELD") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0xfb20f001; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: BLX (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'BLX (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "BLX (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0xf720f001; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STR (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STR (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STR (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0xf120f001; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MSR (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MSR (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MSR (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0xf220f001; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: EOR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'EOR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "EOR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0xf3a0f001; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MOV (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MOV (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MOV (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0xf360f001; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0xf300f001; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MOVW + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MOVW' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MOVW") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0xf330f001; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 19 + const uint32_t corrupt_inst = 0xf328f001; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MSR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MSR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MSR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 18 + const uint32_t corrupt_inst = 0xf324f001; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MSR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MSR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MSR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 17 + const uint32_t corrupt_inst = 0xf322f001; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MSR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MSR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MSR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 16 + const uint32_t corrupt_inst = 0xf321f001; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MSR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MSR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MSR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 15 + const uint32_t corrupt_inst = 0xf3207001; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 14 + const uint32_t corrupt_inst = 0xf320b001; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 13 + const uint32_t corrupt_inst = 0xf320d001; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 12 + const uint32_t corrupt_inst = 0xf320e001; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 11 + const uint32_t corrupt_inst = 0xf320f801; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MSR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MSR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MSR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 10 + const uint32_t corrupt_inst = 0xf320f401; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MSR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MSR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MSR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 9 + const uint32_t corrupt_inst = 0xf320f201; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MSR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MSR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MSR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 8 + const uint32_t corrupt_inst = 0xf320f101; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MSR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MSR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MSR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0xf320f081; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MSR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MSR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MSR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0xf320f041; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MSR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MSR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MSR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0xf320f021; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MSR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MSR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MSR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0xf320f011; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MSR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MSR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MSR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 3 + const uint32_t corrupt_inst = 0xf320f009; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MSR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MSR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MSR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 2 + const uint32_t corrupt_inst = 0xf320f005; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SEVL + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SEVL' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SEVL") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 1 + const uint32_t corrupt_inst = 0xf320f003; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: WFI + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'WFI' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "WFI") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 0 + const uint32_t corrupt_inst = 0xf320f000; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: NOP + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'NOP' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "NOP") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_NOP) { + // 1. Positive Verification: Ensures "NOP" is correctly identified. + const uint32_t valid_inst = 0x6320f000; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for NOP: 0x6320f000"; + EXPECT_STREQ(info->name, "NOP") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x6b20f000; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: BL + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'BL' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "BL") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x6720f000; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STR (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STR (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STR (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x6120f000; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MSR (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MSR (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MSR (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x6220f000; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: EOR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'EOR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "EOR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0x63a0f000; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MOV (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MOV (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MOV (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x6360f000; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x6300f000; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MOVW + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MOVW' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MOVW") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0x6330f000; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 19 + const uint32_t corrupt_inst = 0x6328f000; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MSR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MSR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MSR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 18 + const uint32_t corrupt_inst = 0x6324f000; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MSR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MSR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MSR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 17 + const uint32_t corrupt_inst = 0x6322f000; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MSR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MSR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MSR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 16 + const uint32_t corrupt_inst = 0x6321f000; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MSR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MSR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MSR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 15 + const uint32_t corrupt_inst = 0x63207000; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 14 + const uint32_t corrupt_inst = 0x6320b000; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 13 + const uint32_t corrupt_inst = 0x6320d000; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 12 + const uint32_t corrupt_inst = 0x6320e000; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 11 + const uint32_t corrupt_inst = 0x6320f800; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MSR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MSR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MSR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 10 + const uint32_t corrupt_inst = 0x6320f400; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MSR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MSR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MSR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 9 + const uint32_t corrupt_inst = 0x6320f200; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MSR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MSR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MSR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 8 + const uint32_t corrupt_inst = 0x6320f100; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MSR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MSR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MSR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0x6320f080; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MSR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MSR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MSR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0x6320f040; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MSR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MSR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MSR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0x6320f020; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MSR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MSR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MSR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x6320f010; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MSR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MSR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MSR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 3 + const uint32_t corrupt_inst = 0x6320f008; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MSR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MSR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MSR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 2 + const uint32_t corrupt_inst = 0x6320f004; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SEV + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SEV' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SEV") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 1 + const uint32_t corrupt_inst = 0x6320f002; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: WFE + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'WFE' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "WFE") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 0 + const uint32_t corrupt_inst = 0x6320f001; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: YIELD + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'YIELD' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "YIELD") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_CLREX) { + // 1. Positive Verification: Ensures "CLREX" is correctly identified. + const uint32_t valid_inst = 0xf57ff01f; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for CLREX: 0xf57ff01f"; + EXPECT_STREQ(info->name, "CLREX") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 31 + const uint32_t corrupt_inst = 0x757ff01f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 30 + const uint32_t corrupt_inst = 0xb57ff01f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 29 + const uint32_t corrupt_inst = 0xd57ff01f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 28 + const uint32_t corrupt_inst = 0xe57ff01f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0xfd7ff01f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDC + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDC' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDC") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0xf17ff01f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0xf77ff01f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0xf47ff01f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRBT (A1) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRBT (A1)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRBT (A1)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0xf5fff01f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0xf53ff01f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0xf55ff01f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: PLD (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'PLD (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "PLD (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0xf56ff01f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 19 + const uint32_t corrupt_inst = 0xf577f01f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 18 + const uint32_t corrupt_inst = 0xf57bf01f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 17 + const uint32_t corrupt_inst = 0xf57df01f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 16 + const uint32_t corrupt_inst = 0xf57ef01f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 15 + const uint32_t corrupt_inst = 0xf57f701f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 14 + const uint32_t corrupt_inst = 0xf57fb01f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 13 + const uint32_t corrupt_inst = 0xf57fd01f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 12 + const uint32_t corrupt_inst = 0xf57fe01f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 11 + const uint32_t corrupt_inst = 0xf57ff81f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 10 + const uint32_t corrupt_inst = 0xf57ff41f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 9 + const uint32_t corrupt_inst = 0xf57ff21f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 8 + const uint32_t corrupt_inst = 0xf57ff11f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0xf57ff09f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0xf57ff05f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: DMB + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'DMB' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "DMB") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0xf57ff03f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0xf57ff00f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 3 + const uint32_t corrupt_inst = 0xf57ff017; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 2 + const uint32_t corrupt_inst = 0xf57ff01b; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 1 + const uint32_t corrupt_inst = 0xf57ff01d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 0 + const uint32_t corrupt_inst = 0xf57ff01e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_SWP) { + // 1. Positive Verification: Ensures "SWP" is correctly identified. + const uint32_t valid_inst = 0xe10ba090; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for SWP: 0xe10ba090"; + EXPECT_STREQ(info->name, "SWP") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0xe90ba090; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STMDB + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STMDB' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STMDB") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0xe50ba090; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0xe30ba090; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MOVW + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MOVW' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MOVW") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0xe00ba090; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0xe18ba090; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0xe14ba090; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SWPB + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SWPB' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SWPB") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0xe12ba090; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0xe11ba090; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 11 + const uint32_t corrupt_inst = 0xe10ba890; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 10 + const uint32_t corrupt_inst = 0xe10ba490; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 9 + const uint32_t corrupt_inst = 0xe10ba290; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 8 + const uint32_t corrupt_inst = 0xe10ba190; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0xe10ba010; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0xe10ba0d0; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRD (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRD (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRD (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0xe10ba0b0; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRH (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRH (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRH (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0xe10ba080; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SMLAXY + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SMLAXY' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SMLAXY") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_SWPB) { + // 1. Positive Verification: Ensures "SWPB" is correctly identified. + const uint32_t valid_inst = 0x414e4091; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for SWPB: 0x414e4091"; + EXPECT_STREQ(info->name, "SWPB") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x494e4091; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STM (usr reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STM (usr reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STM (usr reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x454e4091; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x434e4091; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MOVT + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MOVT' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MOVT") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x404e4091; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: UMAAL + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'UMAAL' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "UMAAL") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0x41ce4091; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x410e4091; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SWP + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SWP' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SWP") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x416e4091; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0x415e4091; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 11 + const uint32_t corrupt_inst = 0x414e4891; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 10 + const uint32_t corrupt_inst = 0x414e4491; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 9 + const uint32_t corrupt_inst = 0x414e4291; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 8 + const uint32_t corrupt_inst = 0x414e4191; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0x414e4011; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0x414e40d1; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRD (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRD (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRD (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0x414e40b1; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRH (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRH (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRH (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x414e4081; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SMLALXY + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SMLALXY' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SMLALXY") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_STL) { + // 1. Positive Verification: Ensures "STL" is correctly identified. + const uint32_t valid_inst = 0xb182fc9f; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for STL: 0xb182fc9f"; + EXPECT_STREQ(info->name, "STL") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0xb982fc9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STMIB + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STMIB' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STMIB") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0xb582fc9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0xb382fc9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: ORR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'ORR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "ORR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0xb082fc9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: UMULL + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'UMULL' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "UMULL") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0xb102fc9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0xb1c2fc9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STLB + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STLB' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STLB") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0xb1a2fc9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0xb192fc9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDA + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDA' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDA") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 15 + const uint32_t corrupt_inst = 0xb1827c9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 14 + const uint32_t corrupt_inst = 0xb182bc9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 13 + const uint32_t corrupt_inst = 0xb182dc9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 12 + const uint32_t corrupt_inst = 0xb182ec9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 11 + const uint32_t corrupt_inst = 0xb182f49f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 10 + const uint32_t corrupt_inst = 0xb182f89f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 9 + const uint32_t corrupt_inst = 0xb182fe9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STLEX + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STLEX' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STLEX") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 8 + const uint32_t corrupt_inst = 0xb182fd9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0xb182fc1f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: ORR (rsr) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'ORR (rsr)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "ORR (rsr)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0xb182fcdf; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0xb182fcbf; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0xb182fc8f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: ORR (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'ORR (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "ORR (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_STLEX) { + // 1. Positive Verification: Ensures "STLEX" is correctly identified. + const uint32_t valid_inst = 0xc18c2e97; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for STLEX: 0xc18c2e97"; + EXPECT_STREQ(info->name, "STLEX") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0xc98c2e97; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STMIB + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STMIB' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STMIB") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0xc58c2e97; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0xc38c2e97; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: ORR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'ORR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "ORR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0xc08c2e97; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: UMULL + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'UMULL' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "UMULL") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0xc10c2e97; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0xc1cc2e97; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STLEXB + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STLEXB' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STLEXB") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0xc1ac2e97; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STLEXD + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STLEXD' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STLEXD") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0xc19c2e97; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 11 + const uint32_t corrupt_inst = 0xc18c2697; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 10 + const uint32_t corrupt_inst = 0xc18c2a97; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 9 + const uint32_t corrupt_inst = 0xc18c2c97; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 8 + const uint32_t corrupt_inst = 0xc18c2f97; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STREX + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STREX' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STREX") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0xc18c2e17; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: ORR (rsr) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'ORR (rsr)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "ORR (rsr)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0xc18c2ed7; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0xc18c2eb7; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0xc18c2e87; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: ORR (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'ORR (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "ORR (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_STREX) { + // 1. Positive Verification: Ensures "STREX" is correctly identified. + const uint32_t valid_inst = 0x318f8f9e; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for STREX: 0x318f8f9e"; + EXPECT_STREQ(info->name, "STREX") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x398f8f9e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STMIB + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STMIB' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STMIB") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x358f8f9e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x338f8f9e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: ORR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'ORR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "ORR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x308f8f9e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: UMULL + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'UMULL' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "UMULL") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0x310f8f9e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x31cf8f9e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STREXB + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STREXB' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STREXB") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x31af8f9e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STREXD + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STREXD' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STREXD") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0x319f8f9e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 11 + const uint32_t corrupt_inst = 0x318f879e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 10 + const uint32_t corrupt_inst = 0x318f8b9e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 9 + const uint32_t corrupt_inst = 0x318f8d9e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 8 + const uint32_t corrupt_inst = 0x318f8e9e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STLEX + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STLEX' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STLEX") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0x318f8f1e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: ORR (rsr) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'ORR (rsr)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "ORR (rsr)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0x318f8fde; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0x318f8fbe; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x318f8f8e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: ORR (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'ORR (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "ORR (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_LDA) { + // 1. Positive Verification: Ensures "LDA" is correctly identified. + const uint32_t valid_inst = 0xf192fc9f; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for LDA: 0xf192fc9f"; + EXPECT_STREQ(info->name, "LDA") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0xf992fc9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDMIB + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDMIB' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDMIB") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0xf592fc9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: PLD (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'PLD (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "PLD (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0xf392fc9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: ORR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'ORR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "ORR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0xf092fc9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: UMULL + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'UMULL' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "UMULL") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0xf112fc9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0xf1d2fc9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDAB + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDAB' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDAB") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0xf1b2fc9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0xf182fc9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STL + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STL' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STL") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 11 + const uint32_t corrupt_inst = 0xf192f49f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 10 + const uint32_t corrupt_inst = 0xf192f89f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 9 + const uint32_t corrupt_inst = 0xf192fe9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDAEX + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDAEX' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDAEX") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 8 + const uint32_t corrupt_inst = 0xf192fd9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0xf192fc1f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: ORR (rsr) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'ORR (rsr)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "ORR (rsr)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0xf192fcdf; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0xf192fcbf; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0xf192fc8f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: ORR (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'ORR (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "ORR (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 3 + const uint32_t corrupt_inst = 0xf192fc97; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 2 + const uint32_t corrupt_inst = 0xf192fc9b; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 1 + const uint32_t corrupt_inst = 0xf192fc9d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 0 + const uint32_t corrupt_inst = 0xf192fc9e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_LDAEX) { + // 1. Positive Verification: Ensures "LDAEX" is correctly identified. + const uint32_t valid_inst = 0x71920e9f; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for LDAEX: 0x71920e9f"; + EXPECT_STREQ(info->name, "LDAEX") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x79920e9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDMIB + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDMIB' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDMIB") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x75920e9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x73920e9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: ORR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'ORR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "ORR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x70920e9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: UMULL + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'UMULL' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "UMULL") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0x71120e9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x71d20e9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDAEXB + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDAEXB' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDAEXB") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x71b20e9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDAEXD + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDAEXD' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDAEXD") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0x71820e9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STLEX + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STLEX' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STLEX") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 11 + const uint32_t corrupt_inst = 0x7192069f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 10 + const uint32_t corrupt_inst = 0x71920a9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 9 + const uint32_t corrupt_inst = 0x71920c9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDA + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDA' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDA") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 8 + const uint32_t corrupt_inst = 0x71920f9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDREX + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDREX' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDREX") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0x71920e1f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: ORR (rsr) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'ORR (rsr)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "ORR (rsr)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0x71920edf; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0x71920ebf; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x71920e8f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: ORR (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'ORR (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "ORR (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 3 + const uint32_t corrupt_inst = 0x71920e97; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 2 + const uint32_t corrupt_inst = 0x71920e9b; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 1 + const uint32_t corrupt_inst = 0x71920e9d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 0 + const uint32_t corrupt_inst = 0x71920e9e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_LDREX) { + // 1. Positive Verification: Ensures "LDREX" is correctly identified. + const uint32_t valid_inst = 0xa197df9f; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for LDREX: 0xa197df9f"; + EXPECT_STREQ(info->name, "LDREX") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0xa997df9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDMIB + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDMIB' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDMIB") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0xa597df9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0xa397df9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: ORR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'ORR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "ORR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0xa097df9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: UMULL + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'UMULL' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "UMULL") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0xa117df9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0xa1d7df9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDREXB + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDREXB' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDREXB") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0xa1b7df9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDREXD + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDREXD' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDREXD") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0xa187df9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STREX + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STREX' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STREX") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 11 + const uint32_t corrupt_inst = 0xa197d79f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 10 + const uint32_t corrupt_inst = 0xa197db9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 9 + const uint32_t corrupt_inst = 0xa197dd9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 8 + const uint32_t corrupt_inst = 0xa197de9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDAEX + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDAEX' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDAEX") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0xa197df1f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: ORR (rsr) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'ORR (rsr)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "ORR (rsr)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0xa197dfdf; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0xa197dfbf; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0xa197df8f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: ORR (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'ORR (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "ORR (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 3 + const uint32_t corrupt_inst = 0xa197df97; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 2 + const uint32_t corrupt_inst = 0xa197df9b; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 1 + const uint32_t corrupt_inst = 0xa197df9d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 0 + const uint32_t corrupt_inst = 0xa197df9e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_STLEXD) { + // 1. Positive Verification: Ensures "STLEXD" is correctly identified. + const uint32_t valid_inst = 0x81adbe92; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for STLEXD: 0x81adbe92"; + EXPECT_STREQ(info->name, "STLEXD") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x89adbe92; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STMIB + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STMIB' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STMIB") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x85adbe92; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x83adbe92; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x80adbe92; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: UMLAL + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'UMLAL' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "UMLAL") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0x812dbe92; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x81edbe92; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STLEXH + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STLEXH' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STLEXH") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x818dbe92; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STLEX + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STLEX' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STLEX") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0x81bdbe92; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 11 + const uint32_t corrupt_inst = 0x81adb692; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 10 + const uint32_t corrupt_inst = 0x81adba92; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 9 + const uint32_t corrupt_inst = 0x81adbc92; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 8 + const uint32_t corrupt_inst = 0x81adbf92; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STREXD + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STREXD' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STREXD") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0x81adbe12; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0x81adbed2; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0x81adbeb2; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x81adbe82; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_STREXD) { + // 1. Positive Verification: Ensures "STREXD" is correctly identified. + const uint32_t valid_inst = 0x31a0bf90; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for STREXD: 0x31a0bf90"; + EXPECT_STREQ(info->name, "STREXD") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x39a0bf90; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STMIB + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STMIB' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STMIB") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x35a0bf90; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x33a0bf90; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MOV (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MOV (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MOV (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x30a0bf90; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: UMLAL + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'UMLAL' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "UMLAL") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0x3120bf90; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x31e0bf90; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STREXH + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STREXH' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STREXH") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x3180bf90; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STREX + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STREX' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STREX") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0x31b0bf90; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 11 + const uint32_t corrupt_inst = 0x31a0b790; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 10 + const uint32_t corrupt_inst = 0x31a0bb90; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 9 + const uint32_t corrupt_inst = 0x31a0bd90; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 8 + const uint32_t corrupt_inst = 0x31a0be90; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STLEXD + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STLEXD' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STLEXD") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0x31a0bf10; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MOV (rsr) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MOV (rsr)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MOV (rsr)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0x31a0bfd0; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0x31a0bfb0; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x31a0bf80; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MOV (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MOV (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MOV (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_LDAEXD) { + // 1. Positive Verification: Ensures "LDAEXD" is correctly identified. + const uint32_t valid_inst = 0xa1b1de9f; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for LDAEXD: 0xa1b1de9f"; + EXPECT_STREQ(info->name, "LDAEXD") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0xa9b1de9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDMIB + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDMIB' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDMIB") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0xa5b1de9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0xa3b1de9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0xa0b1de9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: UMLAL + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'UMLAL' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "UMLAL") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0xa131de9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0xa1f1de9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDAEXH + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDAEXH' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDAEXH") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0xa191de9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDAEX + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDAEX' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDAEX") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0xa1a1de9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STLEXD + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STLEXD' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STLEXD") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 11 + const uint32_t corrupt_inst = 0xa1b1d69f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 10 + const uint32_t corrupt_inst = 0xa1b1da9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 9 + const uint32_t corrupt_inst = 0xa1b1dc9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 8 + const uint32_t corrupt_inst = 0xa1b1df9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDREXD + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDREXD' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDREXD") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0xa1b1de1f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0xa1b1dedf; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0xa1b1debf; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0xa1b1de8f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 3 + const uint32_t corrupt_inst = 0xa1b1de97; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 2 + const uint32_t corrupt_inst = 0xa1b1de9b; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 1 + const uint32_t corrupt_inst = 0xa1b1de9d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 0 + const uint32_t corrupt_inst = 0xa1b1de9e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_LDREXD) { + // 1. Positive Verification: Ensures "LDREXD" is correctly identified. + const uint32_t valid_inst = 0x21badf9f; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for LDREXD: 0x21badf9f"; + EXPECT_STREQ(info->name, "LDREXD") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x29badf9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDMIB + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDMIB' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDMIB") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x25badf9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x23badf9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x20badf9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: UMLAL + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'UMLAL' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "UMLAL") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0x213adf9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x21fadf9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDREXH + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDREXH' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDREXH") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x219adf9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDREX + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDREX' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDREX") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0x21aadf9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STREXD + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STREXD' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STREXD") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 11 + const uint32_t corrupt_inst = 0x21bad79f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 10 + const uint32_t corrupt_inst = 0x21badb9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 9 + const uint32_t corrupt_inst = 0x21badd9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 8 + const uint32_t corrupt_inst = 0x21bade9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDAEXD + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDAEXD' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDAEXD") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0x21badf1f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0x21badfdf; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0x21badfbf; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x21badf8f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 3 + const uint32_t corrupt_inst = 0x21badf97; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 2 + const uint32_t corrupt_inst = 0x21badf9b; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 1 + const uint32_t corrupt_inst = 0x21badf9d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 0 + const uint32_t corrupt_inst = 0x21badf9e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_STLB) { + // 1. Positive Verification: Ensures "STLB" is correctly identified. + const uint32_t valid_inst = 0x71c5fc99; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for STLB: 0x71c5fc99"; + EXPECT_STREQ(info->name, "STLB") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x79c5fc99; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STM (usr reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STM (usr reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STM (usr reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x75c5fc99; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x73c5fc99; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: BIC (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'BIC (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "BIC (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x70c5fc99; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SMULL + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SMULL' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SMULL") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0x7145fc99; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x7185fc99; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STL + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STL' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STL") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x71e5fc99; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STLH + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STLH' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STLH") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0x71d5fc99; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 15 + const uint32_t corrupt_inst = 0x71c57c99; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 14 + const uint32_t corrupt_inst = 0x71c5bc99; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 13 + const uint32_t corrupt_inst = 0x71c5dc99; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 12 + const uint32_t corrupt_inst = 0x71c5ec99; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 11 + const uint32_t corrupt_inst = 0x71c5f499; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 10 + const uint32_t corrupt_inst = 0x71c5f899; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 9 + const uint32_t corrupt_inst = 0x71c5fe99; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STLEXB + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STLEXB' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STLEXB") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 8 + const uint32_t corrupt_inst = 0x71c5fd99; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0x71c5fc19; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: BIC (rsr) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'BIC (rsr)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "BIC (rsr)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0x71c5fcd9; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRD (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRD (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRD (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0x71c5fcb9; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRH (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRH (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRH (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x71c5fc89; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: BIC (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'BIC (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "BIC (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_STLEXB) { + // 1. Positive Verification: Ensures "STLEXB" is correctly identified. + const uint32_t valid_inst = 0x81cb0e9c; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for STLEXB: 0x81cb0e9c"; + EXPECT_STREQ(info->name, "STLEXB") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x89cb0e9c; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STM (usr reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STM (usr reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STM (usr reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x85cb0e9c; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x83cb0e9c; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: BIC (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'BIC (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "BIC (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x80cb0e9c; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SMULL + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SMULL' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SMULL") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0x814b0e9c; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x818b0e9c; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STLEX + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STLEX' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STLEX") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x81eb0e9c; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STLEXH + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STLEXH' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STLEXH") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0x81db0e9c; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 11 + const uint32_t corrupt_inst = 0x81cb069c; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 10 + const uint32_t corrupt_inst = 0x81cb0a9c; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 9 + const uint32_t corrupt_inst = 0x81cb0c9c; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 8 + const uint32_t corrupt_inst = 0x81cb0f9c; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STREXB + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STREXB' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STREXB") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0x81cb0e1c; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: BIC (rsr) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'BIC (rsr)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "BIC (rsr)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0x81cb0edc; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRD (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRD (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRD (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0x81cb0ebc; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRH (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRH (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRH (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x81cb0e8c; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: BIC (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'BIC (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "BIC (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_STREXB) { + // 1. Positive Verification: Ensures "STREXB" is correctly identified. + const uint32_t valid_inst = 0x51c06f95; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for STREXB: 0x51c06f95"; + EXPECT_STREQ(info->name, "STREXB") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x59c06f95; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STM (usr reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STM (usr reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STM (usr reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x55c06f95; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x53c06f95; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: BIC (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'BIC (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "BIC (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x50c06f95; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SMULL + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SMULL' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SMULL") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0x51406f95; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x51806f95; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STREX + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STREX' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STREX") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x51e06f95; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STREXH + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STREXH' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STREXH") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0x51d06f95; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 11 + const uint32_t corrupt_inst = 0x51c06795; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 10 + const uint32_t corrupt_inst = 0x51c06b95; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 9 + const uint32_t corrupt_inst = 0x51c06d95; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 8 + const uint32_t corrupt_inst = 0x51c06e95; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STLEXB + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STLEXB' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STLEXB") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0x51c06f15; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: BIC (rsr) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'BIC (rsr)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "BIC (rsr)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0x51c06fd5; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRD (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRD (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRD (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0x51c06fb5; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRH (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRH (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRH (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x51c06f85; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: BIC (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'BIC (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "BIC (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_LDAB) { + // 1. Positive Verification: Ensures "LDAB" is correctly identified. + const uint32_t valid_inst = 0x91d30c9f; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for LDAB: 0x91d30c9f"; + EXPECT_STREQ(info->name, "LDAB") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x99d30c9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDM (usr reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDM (usr reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDM (usr reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x95d30c9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x93d30c9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: BIC (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'BIC (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "BIC (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x90d30c9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SMULL + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SMULL' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SMULL") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0x91530c9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x91930c9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDA + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDA' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDA") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x91f30c9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDAH + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDAH' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDAH") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0x91c30c9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 11 + const uint32_t corrupt_inst = 0x91d3049f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 10 + const uint32_t corrupt_inst = 0x91d3089f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 9 + const uint32_t corrupt_inst = 0x91d30e9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDAEXB + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDAEXB' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDAEXB") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 8 + const uint32_t corrupt_inst = 0x91d30d9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0x91d30c1f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: BIC (rsr) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'BIC (rsr)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "BIC (rsr)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0x91d30cdf; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRSB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRSB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRSB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0x91d30cbf; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRH (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRH (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRH (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x91d30c8f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: BIC (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'BIC (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "BIC (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 3 + const uint32_t corrupt_inst = 0x91d30c97; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 2 + const uint32_t corrupt_inst = 0x91d30c9b; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 1 + const uint32_t corrupt_inst = 0x91d30c9d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 0 + const uint32_t corrupt_inst = 0x91d30c9e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_LDAEXB) { + // 1. Positive Verification: Ensures "LDAEXB" is correctly identified. + const uint32_t valid_inst = 0xd1d0de9f; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for LDAEXB: 0xd1d0de9f"; + EXPECT_STREQ(info->name, "LDAEXB") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0xd9d0de9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDM (exce ret) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDM (exce ret)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDM (exce ret)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0xd5d0de9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0xd3d0de9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: BIC (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'BIC (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "BIC (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0xd0d0de9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SMULL + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SMULL' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SMULL") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0xd150de9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0xd190de9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDAEX + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDAEX' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDAEX") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0xd1f0de9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDAEXH + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDAEXH' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDAEXH") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0xd1c0de9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STLEXB + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STLEXB' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STLEXB") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 11 + const uint32_t corrupt_inst = 0xd1d0d69f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 10 + const uint32_t corrupt_inst = 0xd1d0da9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 9 + const uint32_t corrupt_inst = 0xd1d0dc9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDAB + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDAB' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDAB") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 8 + const uint32_t corrupt_inst = 0xd1d0df9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDREXB + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDREXB' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDREXB") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0xd1d0de1f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: BIC (rsr) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'BIC (rsr)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "BIC (rsr)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0xd1d0dedf; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRSB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRSB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRSB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0xd1d0debf; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRH (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRH (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRH (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0xd1d0de8f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: BIC (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'BIC (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "BIC (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 3 + const uint32_t corrupt_inst = 0xd1d0de97; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 2 + const uint32_t corrupt_inst = 0xd1d0de9b; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 1 + const uint32_t corrupt_inst = 0xd1d0de9d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 0 + const uint32_t corrupt_inst = 0xd1d0de9e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_LDREXB) { + // 1. Positive Verification: Ensures "LDREXB" is correctly identified. + const uint32_t valid_inst = 0xc1d5ff9f; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for LDREXB: 0xc1d5ff9f"; + EXPECT_STREQ(info->name, "LDREXB") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0xc9d5ff9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDM (exce ret) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDM (exce ret)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDM (exce ret)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0xc5d5ff9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0xc3d5ff9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: BIC (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'BIC (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "BIC (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0xc0d5ff9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SMULL + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SMULL' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SMULL") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0xc155ff9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0xc195ff9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDREX + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDREX' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDREX") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0xc1f5ff9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDREXH + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDREXH' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDREXH") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0xc1c5ff9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STREXB + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STREXB' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STREXB") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 11 + const uint32_t corrupt_inst = 0xc1d5f79f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 10 + const uint32_t corrupt_inst = 0xc1d5fb9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 9 + const uint32_t corrupt_inst = 0xc1d5fd9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 8 + const uint32_t corrupt_inst = 0xc1d5fe9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDAEXB + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDAEXB' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDAEXB") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0xc1d5ff1f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: BIC (rsr) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'BIC (rsr)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "BIC (rsr)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0xc1d5ffdf; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRSB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRSB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRSB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0xc1d5ffbf; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRH (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRH (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRH (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0xc1d5ff8f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: BIC (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'BIC (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "BIC (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 3 + const uint32_t corrupt_inst = 0xc1d5ff97; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 2 + const uint32_t corrupt_inst = 0xc1d5ff9b; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 1 + const uint32_t corrupt_inst = 0xc1d5ff9d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 0 + const uint32_t corrupt_inst = 0xc1d5ff9e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_STLH) { + // 1. Positive Verification: Ensures "STLH" is correctly identified. + const uint32_t valid_inst = 0x21e3fc96; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for STLH: 0x21e3fc96"; + EXPECT_STREQ(info->name, "STLH") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x29e3fc96; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x25e3fc96; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x23e3fc96; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x20e3fc96; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SMLAL + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SMLAL' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SMLAL") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0x2163fc96; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x21a3fc96; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x21c3fc96; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STLB + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STLB' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STLB") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0x21f3fc96; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 15 + const uint32_t corrupt_inst = 0x21e37c96; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 14 + const uint32_t corrupt_inst = 0x21e3bc96; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 13 + const uint32_t corrupt_inst = 0x21e3dc96; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 12 + const uint32_t corrupt_inst = 0x21e3ec96; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 11 + const uint32_t corrupt_inst = 0x21e3f496; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 10 + const uint32_t corrupt_inst = 0x21e3f896; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 9 + const uint32_t corrupt_inst = 0x21e3fe96; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STLEXH + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STLEXH' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STLEXH") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 8 + const uint32_t corrupt_inst = 0x21e3fd96; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0x21e3fc16; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0x21e3fcd6; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRD (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRD (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRD (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0x21e3fcb6; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRH (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRH (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRH (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x21e3fc86; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_STLEXH) { + // 1. Positive Verification: Ensures "STLEXH" is correctly identified. + const uint32_t valid_inst = 0xe1e91e99; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for STLEXH: 0xe1e91e99"; + EXPECT_STREQ(info->name, "STLEXH") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0xe9e91e99; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0xe5e91e99; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0xe3e91e99; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0xe0e91e99; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SMLAL + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SMLAL' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SMLAL") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0xe1691e99; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0xe1a91e99; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STLEXD + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STLEXD' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STLEXD") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0xe1c91e99; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STLEXB + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STLEXB' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STLEXB") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0xe1f91e99; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 11 + const uint32_t corrupt_inst = 0xe1e91699; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 10 + const uint32_t corrupt_inst = 0xe1e91a99; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 9 + const uint32_t corrupt_inst = 0xe1e91c99; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 8 + const uint32_t corrupt_inst = 0xe1e91f99; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STREXH + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STREXH' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STREXH") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0xe1e91e19; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0xe1e91ed9; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRD (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRD (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRD (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0xe1e91eb9; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRH (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRH (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRH (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0xe1e91e89; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_STREXH) { + // 1. Positive Verification: Ensures "STREXH" is correctly identified. + const uint32_t valid_inst = 0x81ed3f96; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for STREXH: 0x81ed3f96"; + EXPECT_STREQ(info->name, "STREXH") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x89ed3f96; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x85ed3f96; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x83ed3f96; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x80ed3f96; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SMLAL + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SMLAL' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SMLAL") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0x816d3f96; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x81ad3f96; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STREXD + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STREXD' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STREXD") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x81cd3f96; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STREXB + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STREXB' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STREXB") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0x81fd3f96; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 11 + const uint32_t corrupt_inst = 0x81ed3796; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 10 + const uint32_t corrupt_inst = 0x81ed3b96; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 9 + const uint32_t corrupt_inst = 0x81ed3d96; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 8 + const uint32_t corrupt_inst = 0x81ed3e96; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STLEXH + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STLEXH' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STLEXH") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0x81ed3f16; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0x81ed3fd6; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRD (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRD (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRD (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0x81ed3fb6; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRH (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRH (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRH (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x81ed3f86; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_LDAH) { + // 1. Positive Verification: Ensures "LDAH" is correctly identified. + const uint32_t valid_inst = 0x51fbec9f; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for LDAH: 0x51fbec9f"; + EXPECT_STREQ(info->name, "LDAH") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x59fbec9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDM (exce ret) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDM (exce ret)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDM (exce ret)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x55fbec9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x53fbec9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x50fbec9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SMLAL + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SMLAL' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SMLAL") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0x517bec9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x51bbec9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x51dbec9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDAB + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDAB' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDAB") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0x51ebec9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 11 + const uint32_t corrupt_inst = 0x51fbe49f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 10 + const uint32_t corrupt_inst = 0x51fbe89f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 9 + const uint32_t corrupt_inst = 0x51fbee9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDAEXH + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDAEXH' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDAEXH") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 8 + const uint32_t corrupt_inst = 0x51fbed9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0x51fbec1f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0x51fbecdf; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRSB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRSB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRSB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0x51fbecbf; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRH (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRH (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRH (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x51fbec8f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 3 + const uint32_t corrupt_inst = 0x51fbec97; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 2 + const uint32_t corrupt_inst = 0x51fbec9b; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 1 + const uint32_t corrupt_inst = 0x51fbec9d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 0 + const uint32_t corrupt_inst = 0x51fbec9e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_LDAEXH) { + // 1. Positive Verification: Ensures "LDAEXH" is correctly identified. + const uint32_t valid_inst = 0xd1f0ae9f; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for LDAEXH: 0xd1f0ae9f"; + EXPECT_STREQ(info->name, "LDAEXH") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0xd9f0ae9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDM (exce ret) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDM (exce ret)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDM (exce ret)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0xd5f0ae9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0xd3f0ae9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MVN (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MVN (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MVN (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0xd0f0ae9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SMLAL + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SMLAL' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SMLAL") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0xd170ae9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0xd1b0ae9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDAEXD + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDAEXD' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDAEXD") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0xd1d0ae9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDAEXB + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDAEXB' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDAEXB") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0xd1e0ae9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STLEXH + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STLEXH' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STLEXH") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 11 + const uint32_t corrupt_inst = 0xd1f0a69f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 10 + const uint32_t corrupt_inst = 0xd1f0aa9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 9 + const uint32_t corrupt_inst = 0xd1f0ac9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDAH + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDAH' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDAH") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 8 + const uint32_t corrupt_inst = 0xd1f0af9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDREXH + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDREXH' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDREXH") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0xd1f0ae1f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MVN (rsr) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MVN (rsr)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MVN (rsr)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0xd1f0aedf; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRSB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRSB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRSB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0xd1f0aebf; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRH (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRH (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRH (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0xd1f0ae8f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MVN (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MVN (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MVN (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 3 + const uint32_t corrupt_inst = 0xd1f0ae97; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 2 + const uint32_t corrupt_inst = 0xd1f0ae9b; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 1 + const uint32_t corrupt_inst = 0xd1f0ae9d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 0 + const uint32_t corrupt_inst = 0xd1f0ae9e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_LDREXH) { + // 1. Positive Verification: Ensures "LDREXH" is correctly identified. + const uint32_t valid_inst = 0x21f8bf9f; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for LDREXH: 0x21f8bf9f"; + EXPECT_STREQ(info->name, "LDREXH") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x29f8bf9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDM (exce ret) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDM (exce ret)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDM (exce ret)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x25f8bf9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x23f8bf9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x20f8bf9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SMLAL + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SMLAL' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SMLAL") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0x2178bf9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x21b8bf9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDREXD + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDREXD' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDREXD") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x21d8bf9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDREXB + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDREXB' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDREXB") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0x21e8bf9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STREXH + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STREXH' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STREXH") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 11 + const uint32_t corrupt_inst = 0x21f8b79f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 10 + const uint32_t corrupt_inst = 0x21f8bb9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 9 + const uint32_t corrupt_inst = 0x21f8bd9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 8 + const uint32_t corrupt_inst = 0x21f8be9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDAEXH + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDAEXH' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDAEXH") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0x21f8bf1f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0x21f8bfdf; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRSB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRSB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRSB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0x21f8bfbf; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRH (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRH (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRH (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x21f8bf8f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 3 + const uint32_t corrupt_inst = 0x21f8bf97; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 2 + const uint32_t corrupt_inst = 0x21f8bf9b; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 1 + const uint32_t corrupt_inst = 0x21f8bf9d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 0 + const uint32_t corrupt_inst = 0x21f8bf9e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_LDRBT) { + // 1. Positive Verification: Ensures "LDRBT (A1)" is correctly identified. + const uint32_t valid_inst = 0xe476da3b; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for LDRBT (A1): 0xe476da3b"; + EXPECT_STREQ(info->name, "LDRBT (A1)") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0xec76da3b; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDC + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDC' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDC") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0xe076da3b; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: RSB (rsr) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'RSB (rsr)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "RSB (rsr)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0xe676da3b; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0xe576da3b; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0xe436da3b; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRT (A1) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRT (A1)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRT (A1)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0xe456da3b; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0xe466da3b; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRBT (A1) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRBT (A1)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRBT (A1)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_LDRBT_2) { + // 1. Positive Verification: Ensures "LDRBT (A2)" is correctly identified. + const uint32_t valid_inst = 0xd6712946; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for LDRBT (A2): 0xd6712946"; + EXPECT_STREQ(info->name, "LDRBT (A2)") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0xde712946; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: CDP + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'CDP' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "CDP") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0xd2712946; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: RSB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'RSB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "RSB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0xd4712946; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRBT (A1) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRBT (A1)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRBT (A1)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0xd7712946; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0xd6312946; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRT (A2) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRT (A2)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRT (A2)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0xd6512946; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0xd6612946; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRBT (A2) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRBT (A2)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRBT (A2)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0xd6712956; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_LDRHT) { + // 1. Positive Verification: Ensures "LDRHT (A1)" is correctly identified. + const uint32_t valid_inst = 0xf07be3bf; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for LDRHT (A1): 0xf07be3bf"; + EXPECT_STREQ(info->name, "LDRHT (A1)") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0xf87be3bf; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDM (exce ret) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDM (exce ret)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDM (exce ret)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0xf47be3bf; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRBT (A1) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRBT (A1)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRBT (A1)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0xf27be3bf; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: RSB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'RSB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "RSB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0xf17be3bf; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRH (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRH (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRH (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0xf03be3bf; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0xf05be3bf; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRH (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRH (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRH (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0xf06be3bf; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRHT (A1) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRHT (A1)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRHT (A1)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0xf07be33f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: RSB (rsr) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'RSB (rsr)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "RSB (rsr)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0xf07be3ff; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRSHT (A1) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRSHT (A1)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRSHT (A1)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0xf07be39f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0xf07be3af; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: RSB (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'RSB (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "RSB (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_LDRHT_2) { + // 1. Positive Verification: Ensures "LDRHT (A1)" is correctly identified. + const uint32_t valid_inst = 0x207f09b1; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for LDRHT (A1): 0x207f09b1"; + EXPECT_STREQ(info->name, "LDRHT (A1)") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x287f09b1; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x247f09b1; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRBT (A1) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRBT (A1)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRBT (A1)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x227f09b1; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: RSB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'RSB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "RSB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x217f09b1; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRH (lit) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRH (lit)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRH (lit)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x203f09b1; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x205f09b1; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRH (lit) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRH (lit)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRH (lit)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0x206f09b1; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRHT (A1) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRHT (A1)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRHT (A1)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 19 + const uint32_t corrupt_inst = 0x207709b1; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRHT (A1) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRHT (A1)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRHT (A1)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 18 + const uint32_t corrupt_inst = 0x207b09b1; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRHT (A1) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRHT (A1)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRHT (A1)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 17 + const uint32_t corrupt_inst = 0x207d09b1; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRHT (A1) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRHT (A1)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRHT (A1)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 16 + const uint32_t corrupt_inst = 0x207e09b1; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRHT (A1) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRHT (A1)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRHT (A1)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0x207f0931; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: RSB (rsr) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'RSB (rsr)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "RSB (rsr)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0x207f09f1; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRSHT (A1) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRSHT (A1)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRSHT (A1)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0x207f0991; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x207f09a1; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: RSB (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'RSB (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "RSB (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_LDRHT_3) { + // 1. Positive Verification: Ensures "LDRHT (A2)" is correctly identified. + const uint32_t valid_inst = 0x303380b8; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for LDRHT (A2): 0x303380b8"; + EXPECT_STREQ(info->name, "LDRHT (A2)") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x383380b8; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDMDA + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDMDA' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDMDA") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x343380b8; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRT (A1) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRT (A1)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRT (A1)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x323380b8; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: EOR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'EOR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "EOR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x313380b8; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRH (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRH (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRH (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x307380b8; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRHT (A1) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRHT (A1)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRHT (A1)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x301380b8; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRH (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRH (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRH (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0x302380b8; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRHT (A2) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRHT (A2)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRHT (A2)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 11 + const uint32_t corrupt_inst = 0x303388b8; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 10 + const uint32_t corrupt_inst = 0x303384b8; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 9 + const uint32_t corrupt_inst = 0x303382b8; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 8 + const uint32_t corrupt_inst = 0x303381b8; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0x30338038; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: EOR (rsr) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'EOR (rsr)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "EOR (rsr)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0x303380f8; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRSHT (A2) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRSHT (A2)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRSHT (A2)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0x30338098; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MLA + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MLA' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MLA") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x303380a8; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: EOR (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'EOR (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "EOR (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_LDRSBT) { + // 1. Positive Verification: Ensures "LDRSBT (A1)" is correctly identified. + const uint32_t valid_inst = 0x70f4f0da; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for LDRSBT (A1): 0x70f4f0da"; + EXPECT_STREQ(info->name, "LDRSBT (A1)") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x78f4f0da; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDM (exce ret) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDM (exce ret)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDM (exce ret)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x74f4f0da; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRBT (A1) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRBT (A1)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRBT (A1)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x72f4f0da; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: RSC (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'RSC (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "RSC (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x71f4f0da; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRSB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRSB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRSB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x70b4f0da; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRSBT (A2) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRSBT (A2)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRSBT (A2)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x70d4f0da; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRSB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRSB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRSB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0x70e4f0da; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRD (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRD (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRD (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0x70f4f05a; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: RSC (rsr) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'RSC (rsr)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "RSC (rsr)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0x70f4f09a; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SMLAL + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SMLAL' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SMLAL") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0x70f4f0fa; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRSHT (A1) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRSHT (A1)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRSHT (A1)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x70f4f0ca; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: RSC (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'RSC (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "RSC (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_LDRSBT_2) { + // 1. Positive Verification: Ensures "LDRSBT (A2)" is correctly identified. + const uint32_t valid_inst = 0x60b670dc; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for LDRSBT (A2): 0x60b670dc"; + EXPECT_STREQ(info->name, "LDRSBT (A2)") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x68b670dc; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDM + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDM' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDM") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x64b670dc; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRT (A1) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRT (A1)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRT (A1)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x62b670dc; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: ADC (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'ADC (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "ADC (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x61b670dc; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRSB (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRSB (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRSB (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x60f670dc; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRSBT (A1) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRSBT (A1)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRSBT (A1)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x609670dc; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRSB (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRSB (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRSB (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0x60a670dc; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRD (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRD (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRD (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 11 + const uint32_t corrupt_inst = 0x60b678dc; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 10 + const uint32_t corrupt_inst = 0x60b674dc; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 9 + const uint32_t corrupt_inst = 0x60b672dc; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 8 + const uint32_t corrupt_inst = 0x60b671dc; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0x60b6705c; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: ADC (rsr) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'ADC (rsr)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "ADC (rsr)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0x60b6709c; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: UMLAL + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'UMLAL' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "UMLAL") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0x60b670fc; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRSHT (A2) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRSHT (A2)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRSHT (A2)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x60b670cc; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: ADC (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'ADC (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "ADC (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_LDRSHT) { + // 1. Positive Verification: Ensures "LDRSHT (A1)" is correctly identified. + const uint32_t valid_inst = 0x607c25f7; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for LDRSHT (A1): 0x607c25f7"; + EXPECT_STREQ(info->name, "LDRSHT (A1)") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x687c25f7; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x647c25f7; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRBT (A1) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRBT (A1)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRBT (A1)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x627c25f7; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: RSB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'RSB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "RSB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x617c25f7; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRSH (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRSH (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRSH (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x603c25f7; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x605c25f7; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRSH (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRSH (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRSH (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0x606c25f7; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRD (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRD (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRD (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0x607c2577; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: RSB (rsr) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'RSB (rsr)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "RSB (rsr)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0x607c25b7; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRHT (A1) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRHT (A1)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRHT (A1)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0x607c25d7; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRSBT (A1) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRSBT (A1)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRSBT (A1)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x607c25e7; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: RSB (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'RSB (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "RSB (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_LDRSHT_2) { + // 1. Positive Verification: Ensures "LDRSHT (A2)" is correctly identified. + const uint32_t valid_inst = 0xa0bef0f4; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for LDRSHT (A2): 0xa0bef0f4"; + EXPECT_STREQ(info->name, "LDRSHT (A2)") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0xa8bef0f4; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDM + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDM' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDM") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0xa4bef0f4; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRT (A1) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRT (A1)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRT (A1)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0xa2bef0f4; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: ADC (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'ADC (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "ADC (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0xa1bef0f4; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRSH (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRSH (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRSH (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0xa0fef0f4; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRSHT (A1) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRSHT (A1)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRSHT (A1)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0xa09ef0f4; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRSH (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRSH (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRSH (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0xa0aef0f4; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRD (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRD (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRD (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 11 + const uint32_t corrupt_inst = 0xa0bef8f4; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 10 + const uint32_t corrupt_inst = 0xa0bef4f4; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 9 + const uint32_t corrupt_inst = 0xa0bef2f4; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 8 + const uint32_t corrupt_inst = 0xa0bef1f4; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0xa0bef074; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: ADC (rsr) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'ADC (rsr)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "ADC (rsr)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0xa0bef0b4; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRHT (A2) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRHT (A2)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRHT (A2)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0xa0bef0d4; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRSBT (A2) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRSBT (A2)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRSBT (A2)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0xa0bef0e4; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: ADC (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'ADC (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "ADC (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_LDRT) { + // 1. Positive Verification: Ensures "LDRT (A1)" is correctly identified. + const uint32_t valid_inst = 0x843617b7; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for LDRT (A1): 0x843617b7"; + EXPECT_STREQ(info->name, "LDRT (A1)") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x8c3617b7; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDC + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDC' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDC") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x803617b7; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x863617b7; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x853617b7; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x847617b7; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRBT (A1) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRBT (A1)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRBT (A1)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x841617b7; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0x842617b7; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRT (A1) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRT (A1)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRT (A1)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_LDRT_2) { + // 1. Positive Verification: Ensures "LDRT (A2)" is correctly identified. + const uint32_t valid_inst = 0xe63354af; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for LDRT (A2): 0xe63354af"; + EXPECT_STREQ(info->name, "LDRT (A2)") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0xee3354af; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: CDP + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'CDP' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "CDP") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0xe23354af; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: EOR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'EOR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "EOR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0xe43354af; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRT (A1) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRT (A1)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRT (A1)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0xe73354af; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDR (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDR (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDR (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0xe67354af; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRBT (A2) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRBT (A2)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRBT (A2)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0xe61354af; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDR (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDR (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDR (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0xe62354af; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRT (A2) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRT (A2)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRT (A2)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0xe63354bf; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_STRBT) { + // 1. Positive Verification: Ensures "STRBT (A1)" is correctly identified. + const uint32_t valid_inst = 0xd4e74878; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for STRBT (A1): 0xd4e74878"; + EXPECT_STREQ(info->name, "STRBT (A1)") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0xdce74878; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STC + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STC' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STC") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0xd0e74878; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: RSC (rsr) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'RSC (rsr)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "RSC (rsr)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0xd6e74878; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: UXTAB + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'UXTAB' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "UXTAB") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0xd5e74878; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0xd4a74878; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRT (A1) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRT (A1)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRT (A1)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0xd4c74878; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0xd4f74878; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRBT (A1) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRBT (A1)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRBT (A1)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_STRBT_2) { + // 1. Positive Verification: Ensures "STRBT (A2)" is correctly identified. + const uint32_t valid_inst = 0xb662cd82; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for STRBT (A2): 0xb662cd82"; + EXPECT_STREQ(info->name, "STRBT (A2)") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0xbe62cd82; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: CDP + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'CDP' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "CDP") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0xb262cd82; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: RSB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'RSB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "RSB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0xb462cd82; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRBT (A1) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRBT (A1)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRBT (A1)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0xb762cd82; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRB (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRB (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRB (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0xb622cd82; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRT (A2) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRT (A2)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRT (A2)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0xb642cd82; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRB (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRB (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRB (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0xb672cd82; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRBT (A2) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRBT (A2)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRBT (A2)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0xb662cd92; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_STRHT) { + // 1. Positive Verification: Ensures "STRHT (A1)" is correctly identified. + const uint32_t valid_inst = 0x706653b8; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for STRHT (A1): 0x706653b8"; + EXPECT_STREQ(info->name, "STRHT (A1)") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x786653b8; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x746653b8; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRBT (A1) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRBT (A1)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRBT (A1)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x726653b8; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: RSB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'RSB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "RSB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x716653b8; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRH (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRH (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRH (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x702653b8; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x704653b8; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRH (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRH (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRH (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0x707653b8; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRHT (A1) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRHT (A1)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRHT (A1)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0x70665338; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: RSB (rsr) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'RSB (rsr)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "RSB (rsr)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0x706653f8; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRD (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRD (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRD (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0x70665398; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MLS + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MLS' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MLS") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x706653a8; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: RSB (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'RSB (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "RSB (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_STRHT_2) { + // 1. Positive Verification: Ensures "STRHT (A2)" is correctly identified. + const uint32_t valid_inst = 0x1022d0ba; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for STRHT (A2): 0x1022d0ba"; + EXPECT_STREQ(info->name, "STRHT (A2)") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x1822d0ba; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STMDA + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STMDA' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STMDA") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x1422d0ba; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRT (A1) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRT (A1)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRT (A1)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x1222d0ba; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: EOR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'EOR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "EOR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x1122d0ba; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRH (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRH (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRH (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x1062d0ba; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRHT (A1) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRHT (A1)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRHT (A1)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x1002d0ba; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRH (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRH (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRH (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0x1032d0ba; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRHT (A2) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRHT (A2)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRHT (A2)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 11 + const uint32_t corrupt_inst = 0x1022d8ba; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 10 + const uint32_t corrupt_inst = 0x1022d4ba; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 9 + const uint32_t corrupt_inst = 0x1022d2ba; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 8 + const uint32_t corrupt_inst = 0x1022d1ba; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0x1022d03a; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: EOR (rsr) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'EOR (rsr)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "EOR (rsr)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0x1022d0fa; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRD (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRD (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRD (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0x1022d09a; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MLA + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MLA' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MLA") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x1022d0aa; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: EOR (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'EOR (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "EOR (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_STRT) { + // 1. Positive Verification: Ensures "STRT (A1)" is correctly identified. + const uint32_t valid_inst = 0x5423c7d1; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for STRT (A1): 0x5423c7d1"; + EXPECT_STREQ(info->name, "STRT (A1)") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x5c23c7d1; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STC + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STC' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STC") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x5023c7d1; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x5623c7d1; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x5523c7d1; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x5463c7d1; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRBT (A1) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRBT (A1)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRBT (A1)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x5403c7d1; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0x5433c7d1; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRT (A1) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRT (A1)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRT (A1)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_STRT_2) { + // 1. Positive Verification: Ensures "STRT (A2)" is correctly identified. + const uint32_t valid_inst = 0x362fab00; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for STRT (A2): 0x362fab00"; + EXPECT_STREQ(info->name, "STRT (A2)") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x3e2fab00; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: CDP + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'CDP' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "CDP") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x322fab00; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: EOR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'EOR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "EOR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x342fab00; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRT (A1) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRT (A1)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRT (A1)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x372fab00; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STR (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STR (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STR (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x366fab00; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRBT (A2) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRBT (A2)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRBT (A2)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x360fab00; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STR (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STR (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STR (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0x363fab00; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRT (A2) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRT (A2)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRT (A2)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x362fab10; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_LDR_lit) { + // 1. Positive Verification: Ensures "LDR (lit)" is correctly identified. + const uint32_t valid_inst = 0xd59f8499; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for LDR (lit): 0xd59f8499"; + EXPECT_STREQ(info->name, "LDR (lit)") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0xdd9f8499; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDC + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDC' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDC") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0xd19f8499; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0xd79f8499; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0xd49f8499; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0xd5df8499; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (lit) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (lit)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (lit)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0xd5bf8499; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0xd58f8499; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 19 + const uint32_t corrupt_inst = 0xd5978499; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 18 + const uint32_t corrupt_inst = 0xd59b8499; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 17 + const uint32_t corrupt_inst = 0xd59d8499; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 16 + const uint32_t corrupt_inst = 0xd59e8499; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_LDR_imm) { + // 1. Positive Verification: Ensures "LDR (imm)" is correctly identified. + const uint32_t valid_inst = 0x45bbb613; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for LDR (imm): 0x45bbb613"; + EXPECT_STREQ(info->name, "LDR (imm)") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x4dbbb613; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDC + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDC' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDC") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x41bbb613; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x47bbb613; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x45fbb613; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0x45abb613; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_LDR_reg) { + // 1. Positive Verification: Ensures "LDR (reg)" is correctly identified. + const uint32_t valid_inst = 0x17b019c9; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for LDR (reg): 0x17b019c9"; + EXPECT_STREQ(info->name, "LDR (reg)") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x1fb019c9; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SVC + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SVC' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SVC") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x13b019c9; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MOV (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MOV (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MOV (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x15b019c9; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x17f019c9; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0x17a019c9; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STR (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STR (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STR (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x17b019d9; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SBFX + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SBFX' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SBFX") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_LDRB_lit) { + // 1. Positive Verification: Ensures "LDRB (lit)" is correctly identified. + const uint32_t valid_inst = 0x655f7bb8; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for LDRB (lit): 0x655f7bb8"; + EXPECT_STREQ(info->name, "LDRB (lit)") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x6d5f7bb8; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDC + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDC' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDC") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x615f7bb8; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRH (lit) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRH (lit)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRH (lit)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x675f7bb8; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x645f7bb8; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x651f7bb8; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDR (lit) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDR (lit)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDR (lit)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x657f7bb8; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0x654f7bb8; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 19 + const uint32_t corrupt_inst = 0x65577bb8; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 18 + const uint32_t corrupt_inst = 0x655b7bb8; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 17 + const uint32_t corrupt_inst = 0x655d7bb8; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 16 + const uint32_t corrupt_inst = 0x655e7bb8; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_LDRB_imm) { + // 1. Positive Verification: Ensures "LDRB (imm)" is correctly identified. + const uint32_t valid_inst = 0x357cb146; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for LDRB (imm): 0x357cb146"; + EXPECT_STREQ(info->name, "LDRB (imm)") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x3d7cb146; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDC + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDC' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDC") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x317cb146; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x377cb146; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x353cb146; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0x356cb146; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_LDRB_reg) { + // 1. Positive Verification: Ensures "LDRB (reg)" is correctly identified. + const uint32_t valid_inst = 0xc777fbe8; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for LDRB (reg): 0xc777fbe8"; + EXPECT_STREQ(info->name, "LDRB (reg)") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0xcf77fbe8; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SVC + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SVC' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SVC") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0xc377fbe8; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0xc577fbe8; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0xc737fbe8; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDR (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDR (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDR (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0xc767fbe8; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRB (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRB (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRB (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0xc777fbf8; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_LDRD_lit) { + // 1. Positive Verification: Ensures "LDRD (lit)" is correctly identified. + const uint32_t valid_inst = 0x01cfe9d9; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for LDRD (lit): 0x1cfe9d9"; + EXPECT_STREQ(info->name, "LDRD (lit)") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x09cfe9d9; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STM (usr reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STM (usr reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STM (usr reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x05cfe9d9; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x03cfe9d9; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: BIC (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'BIC (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "BIC (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x00cfe9d9; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRD (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRD (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRD (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x018fe9d9; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x01efe9d9; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRD (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRD (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRD (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0x01dfe9d9; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRSB (lit) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRSB (lit)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRSB (lit)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 19 + const uint32_t corrupt_inst = 0x01c7e9d9; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRD (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRD (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRD (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 18 + const uint32_t corrupt_inst = 0x01cbe9d9; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRD (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRD (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRD (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 17 + const uint32_t corrupt_inst = 0x01cde9d9; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRD (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRD (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRD (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 16 + const uint32_t corrupt_inst = 0x01cee9d9; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRD (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRD (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRD (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0x01cfe959; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: BIC (rsr) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'BIC (rsr)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "BIC (rsr)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0x01cfe999; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0x01cfe9f9; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRD (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRD (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRD (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x01cfe9c9; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: BIC (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'BIC (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "BIC (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_LDRD_imm) { + // 1. Positive Verification: Ensures "LDRD (imm)" is correctly identified. + const uint32_t valid_inst = 0xa1ecd8da; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for LDRD (imm): 0xa1ecd8da"; + EXPECT_STREQ(info->name, "LDRD (imm)") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0xa9ecd8da; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0xa5ecd8da; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0xa3ecd8da; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0xa1acd8da; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0xa1fcd8da; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRSB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRSB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRSB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0xa1ecd85a; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0xa1ecd89a; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0xa1ecd8fa; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRD (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRD (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRD (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0xa1ecd8ca; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_LDRD_reg) { + // 1. Positive Verification: Ensures "LDRD (reg)" is correctly identified. + const uint32_t valid_inst = 0x212510d9; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for LDRD (reg): 0x212510d9"; + EXPECT_STREQ(info->name, "LDRD (reg)") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x292510d9; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STMDB + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STMDB' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STMDB") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x252510d9; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x232510d9; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x216510d9; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRD (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRD (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRD (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0x213510d9; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRSB (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRSB (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRSB (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 11 + const uint32_t corrupt_inst = 0x212518d9; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 10 + const uint32_t corrupt_inst = 0x212514d9; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 9 + const uint32_t corrupt_inst = 0x212512d9; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 8 + const uint32_t corrupt_inst = 0x212511d9; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0x21251059; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: QSUB + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'QSUB' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "QSUB") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0x21251099; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0x212510f9; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRD (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRD (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRD (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x212510c9; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SMLAWY + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SMLAWY' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SMLAWY") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_LDRH_lit) { + // 1. Positive Verification: Ensures "LDRH (lit)" is correctly identified. + const uint32_t valid_inst = 0x51dfd0b9; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for LDRH (lit): 0x51dfd0b9"; + EXPECT_STREQ(info->name, "LDRH (lit)") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x59dfd0b9; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDM (exce ret) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDM (exce ret)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDM (exce ret)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x55dfd0b9; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (lit) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (lit)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (lit)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x53dfd0b9; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: BIC (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'BIC (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "BIC (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x519fd0b9; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRH (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRH (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRH (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0x51cfd0b9; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRH (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRH (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRH (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 19 + const uint32_t corrupt_inst = 0x51d7d0b9; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRH (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRH (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRH (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 18 + const uint32_t corrupt_inst = 0x51dbd0b9; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRH (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRH (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRH (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 17 + const uint32_t corrupt_inst = 0x51ddd0b9; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRH (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRH (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRH (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 16 + const uint32_t corrupt_inst = 0x51ded0b9; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRH (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRH (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRH (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0x51dfd039; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: BIC (rsr) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'BIC (rsr)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "BIC (rsr)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0x51dfd0f9; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRSH (lit) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRSH (lit)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRSH (lit)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0x51dfd099; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x51dfd0a9; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: BIC (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'BIC (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "BIC (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_LDRH_imm) { + // 1. Positive Verification: Ensures "LDRH (imm)" is correctly identified. + const uint32_t valid_inst = 0x615e85b8; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for LDRH (imm): 0x615e85b8"; + EXPECT_STREQ(info->name, "LDRH (imm)") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x695e85b8; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDM (exce ret) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDM (exce ret)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDM (exce ret)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x655e85b8; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x635e85b8; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x611e85b8; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0x614e85b8; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRH (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRH (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRH (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0x615e8538; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0x615e85f8; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRSH (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRSH (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRSH (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0x615e8598; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x615e85a8; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_LDRH_reg) { + // 1. Positive Verification: Ensures "LDRH (reg)" is correctly identified. + const uint32_t valid_inst = 0x21b770b0; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for LDRH (reg): 0x21b770b0"; + EXPECT_STREQ(info->name, "LDRH (reg)") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x29b770b0; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDMIB + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDMIB' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDMIB") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x25b770b0; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x23b770b0; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x21f770b0; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRH (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRH (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRH (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0x21a770b0; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRH (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRH (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRH (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 11 + const uint32_t corrupt_inst = 0x21b778b0; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 10 + const uint32_t corrupt_inst = 0x21b774b0; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 9 + const uint32_t corrupt_inst = 0x21b772b0; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 8 + const uint32_t corrupt_inst = 0x21b771b0; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0x21b77030; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0x21b770f0; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRSH (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRSH (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRSH (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0x21b77090; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x21b770a0; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_LDRSB_lit) { + // 1. Positive Verification: Ensures "LDRSB (lit)" is correctly identified. + const uint32_t valid_inst = 0x015ffbd9; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for LDRSB (lit): 0x15ffbd9"; + EXPECT_STREQ(info->name, "LDRSB (lit)") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x095ffbd9; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDM (exce ret) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDM (exce ret)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDM (exce ret)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x055ffbd9; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (lit) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (lit)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (lit)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x035ffbd9; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x005ffbd9; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRSB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRSB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRSB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x011ffbd9; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x017ffbd9; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRSB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRSB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRSB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0x014ffbd9; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRD (lit) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRD (lit)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRD (lit)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 19 + const uint32_t corrupt_inst = 0x0157fbd9; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRSB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRSB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRSB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 18 + const uint32_t corrupt_inst = 0x015bfbd9; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRSB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRSB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRSB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 17 + const uint32_t corrupt_inst = 0x015dfbd9; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRSB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRSB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRSB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 16 + const uint32_t corrupt_inst = 0x015efbd9; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRSB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRSB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRSB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0x015ffb59; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0x015ffb99; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0x015ffbf9; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRSH (lit) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRSH (lit)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRSH (lit)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x015ffbc9; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_LDRSB_imm) { + // 1. Positive Verification: Ensures "LDRSB (imm)" is correctly identified. + const uint32_t valid_inst = 0x20d3c3d6; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for LDRSB (imm): 0x20d3c3d6"; + EXPECT_STREQ(info->name, "LDRSB (imm)") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x28d3c3d6; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDM (exce ret) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDM (exce ret)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDM (exce ret)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x24d3c3d6; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x22d3c3d6; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SBC (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SBC (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SBC (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x2093c3d6; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0x20c3c3d6; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRD (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRD (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRD (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0x20d3c356; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SBC (rsr) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SBC (rsr)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SBC (rsr)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0x20d3c396; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SMULL + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SMULL' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SMULL") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0x20d3c3f6; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRSH (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRSH (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRSH (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x20d3c3c6; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SBC (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SBC (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SBC (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_LDRSB_reg) { + // 1. Positive Verification: Ensures "LDRSB (reg)" is correctly identified. + const uint32_t valid_inst = 0x911170d0; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for LDRSB (reg): 0x911170d0"; + EXPECT_STREQ(info->name, "LDRSB (reg)") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x991170d0; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDMDB + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDMDB' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDMDB") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x951170d0; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x931170d0; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x915170d0; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRSB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRSB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRSB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0x910170d0; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRD (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRD (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRD (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 11 + const uint32_t corrupt_inst = 0x911178d0; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 10 + const uint32_t corrupt_inst = 0x911174d0; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 9 + const uint32_t corrupt_inst = 0x911172d0; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 8 + const uint32_t corrupt_inst = 0x911171d0; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0x91117050; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0x91117090; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0x911170f0; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRSH (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRSH (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRSH (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x911170c0; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_LDRSH_lit) { + // 1. Positive Verification: Ensures "LDRSH (lit)" is correctly identified. + const uint32_t valid_inst = 0x315fe7fc; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for LDRSH (lit): 0x315fe7fc"; + EXPECT_STREQ(info->name, "LDRSH (lit)") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x395fe7fc; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDM (exce ret) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDM (exce ret)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDM (exce ret)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x355fe7fc; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (lit) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (lit)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (lit)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x335fe7fc; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x305fe7fc; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRSH (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRSH (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRSH (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x311fe7fc; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x317fe7fc; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRSH (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRSH (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRSH (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0x314fe7fc; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRD (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRD (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRD (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 19 + const uint32_t corrupt_inst = 0x3157e7fc; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRSH (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRSH (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRSH (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 18 + const uint32_t corrupt_inst = 0x315be7fc; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRSH (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRSH (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRSH (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 17 + const uint32_t corrupt_inst = 0x315de7fc; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRSH (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRSH (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRSH (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 16 + const uint32_t corrupt_inst = 0x315ee7fc; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRSH (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRSH (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRSH (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0x315fe77c; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0x315fe7bc; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRH (lit) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRH (lit)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRH (lit)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0x315fe7dc; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRSB (lit) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRSB (lit)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRSB (lit)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x315fe7ec; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_LDRSH_imm) { + // 1. Positive Verification: Ensures "LDRSH (imm)" is correctly identified. + const uint32_t valid_inst = 0x617052f0; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for LDRSH (imm): 0x617052f0"; + EXPECT_STREQ(info->name, "LDRSH (imm)") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x697052f0; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x657052f0; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x637052f0; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x613052f0; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0x616052f0; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRD (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRD (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRD (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0x61705270; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0x617052b0; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRH (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRH (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRH (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0x617052d0; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRSB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRSB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRSB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x617052e0; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_LDRSH_reg) { + // 1. Positive Verification: Ensures "LDRSH (reg)" is correctly identified. + const uint32_t valid_inst = 0x41ba10f0; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for LDRSH (reg): 0x41ba10f0"; + EXPECT_STREQ(info->name, "LDRSH (reg)") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x49ba10f0; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDMIB + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDMIB' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDMIB") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x45ba10f0; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x43ba10f0; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x41fa10f0; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRSH (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRSH (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRSH (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0x41aa10f0; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRD (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRD (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRD (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 11 + const uint32_t corrupt_inst = 0x41ba18f0; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 10 + const uint32_t corrupt_inst = 0x41ba14f0; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 9 + const uint32_t corrupt_inst = 0x41ba12f0; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 8 + const uint32_t corrupt_inst = 0x41ba11f0; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0x41ba1070; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0x41ba10b0; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRH (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRH (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRH (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0x41ba10d0; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRSB (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRSB (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRSB (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x41ba10e0; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_STR_imm) { + // 1. Positive Verification: Ensures "STR (imm)" is correctly identified. + const uint32_t valid_inst = 0x05ab1f43; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for STR (imm): 0x5ab1f43"; + EXPECT_STREQ(info->name, "STR (imm)") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x0dab1f43; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STC + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STC' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STC") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x01ab1f43; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x07ab1f43; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STR (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STR (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STR (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x05eb1f43; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0x05bb1f43; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_STR_reg) { + // 1. Positive Verification: Ensures "STR (reg)" is correctly identified. + const uint32_t valid_inst = 0x27848f8a; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for STR (reg): 0x27848f8a"; + EXPECT_STREQ(info->name, "STR (reg)") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x2f848f8a; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SVC + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SVC' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SVC") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x23848f8a; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: ORR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'ORR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "ORR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x25848f8a; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x27c48f8a; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRB (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRB (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRB (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0x27948f8a; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDR (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDR (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDR (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x27848f9a; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_STRB_imm) { + // 1. Positive Verification: Ensures "STRB (imm)" is correctly identified. + const uint32_t valid_inst = 0x0540ea09; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for STRB (imm): 0x540ea09"; + EXPECT_STREQ(info->name, "STRB (imm)") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x0d40ea09; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STC + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STC' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STC") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x0140ea09; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x0740ea09; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRB (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRB (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRB (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x0500ea09; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0x0550ea09; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_STRB_reg) { + // 1. Positive Verification: Ensures "STRB (reg)" is correctly identified. + const uint32_t valid_inst = 0x276c29c9; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for STRB (reg): 0x276c29c9"; + EXPECT_STREQ(info->name, "STRB (reg)") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x2f6c29c9; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SVC + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SVC' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SVC") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x236c29c9; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x256c29c9; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x272c29c9; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STR (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STR (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STR (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0x277c29c9; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x276c29d9; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_STRD_imm) { + // 1. Positive Verification: Ensures "STRD (imm)" is correctly identified. + const uint32_t valid_inst = 0x20eb77f9; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for STRD (imm): 0x20eb77f9"; + EXPECT_STREQ(info->name, "STRD (imm)") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x28eb77f9; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x24eb77f9; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRBT (A1) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRBT (A1)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRBT (A1)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x22eb77f9; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: RSC (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'RSC (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "RSC (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x20ab77f9; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0x20fb77f9; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRSHT (A1) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRSHT (A1)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRSHT (A1)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0x20eb7779; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: RSC (rsr) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'RSC (rsr)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "RSC (rsr)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0x20eb77b9; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRHT (A1) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRHT (A1)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRHT (A1)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0x20eb77d9; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRD (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRD (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRD (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x20eb77e9; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: RSC (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'RSC (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "RSC (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_STRD_reg) { + // 1. Positive Verification: Ensures "STRD (reg)" is correctly identified. + const uint32_t valid_inst = 0x212040ff; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for STRD (reg): 0x212040ff"; + EXPECT_STREQ(info->name, "STRD (reg)") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x292040ff; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STMDB + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STMDB' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STMDB") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x252040ff; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x232040ff; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x216040ff; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRD (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRD (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRD (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0x213040ff; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRSH (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRSH (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRSH (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 11 + const uint32_t corrupt_inst = 0x212048ff; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 10 + const uint32_t corrupt_inst = 0x212044ff; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 9 + const uint32_t corrupt_inst = 0x212042ff; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 8 + const uint32_t corrupt_inst = 0x212041ff; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0x2120407f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: BKPT + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'BKPT' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "BKPT") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0x212040bf; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRH (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRH (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRH (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0x212040df; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRD (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRD (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRD (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x212040ef; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_STRH_imm) { + // 1. Positive Verification: Ensures "STRH (imm)" is correctly identified. + const uint32_t valid_inst = 0x70c7acb0; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for STRH (imm): 0x70c7acb0"; + EXPECT_STREQ(info->name, "STRH (imm)") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x78c7acb0; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STM (usr reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STM (usr reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STM (usr reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x74c7acb0; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x72c7acb0; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SBC (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SBC (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SBC (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x7087acb0; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0x70d7acb0; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRH (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRH (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRH (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0x70c7ac30; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SBC (rsr) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SBC (rsr)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SBC (rsr)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0x70c7acf0; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRD (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRD (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRD (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0x70c7ac90; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SMULL + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SMULL' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SMULL") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x70c7aca0; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SBC (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SBC (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SBC (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_STRH_reg) { + // 1. Positive Verification: Ensures "STRH (reg)" is correctly identified. + const uint32_t valid_inst = 0x212b70b2; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for STRH (reg): 0x212b70b2"; + EXPECT_STREQ(info->name, "STRH (reg)") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x292b70b2; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STMDB + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STMDB' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STMDB") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x252b70b2; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x232b70b2; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x216b70b2; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRH (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRH (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRH (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0x213b70b2; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRH (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRH (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRH (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 11 + const uint32_t corrupt_inst = 0x212b78b2; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 10 + const uint32_t corrupt_inst = 0x212b74b2; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 9 + const uint32_t corrupt_inst = 0x212b72b2; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 8 + const uint32_t corrupt_inst = 0x212b71b2; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0x212b7032; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0x212b70f2; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRD (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRD (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRD (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0x212b7092; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x212b70a2; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_LDM) { + // 1. Positive Verification: Ensures "LDM" is correctly identified. + const uint32_t valid_inst = 0x48947243; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for LDM: 0x48947243"; + EXPECT_STREQ(info->name, "LDM") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x40947243; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: ADD (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'ADD (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "ADD (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x4c947243; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDC + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDC' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDC") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x4a947243; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: B + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'B' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "B") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x49947243; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDMIB + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDMIB' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDMIB") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0x48147243; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDMDA + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDMDA' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDMDA") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x48d47243; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDM (usr reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDM (usr reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDM (usr reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0x48847243; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STM + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STM' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STM") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_LDMDA) { + // 1. Positive Verification: Ensures "LDMDA" is correctly identified. + const uint32_t valid_inst = 0x0836a4ab; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for LDMDA: 0x836a4ab"; + EXPECT_STREQ(info->name, "LDMDA") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x0036a4ab; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: EOR (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'EOR (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "EOR (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x0c36a4ab; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDC + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDC' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDC") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x0a36a4ab; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: B + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'B' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "B") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x0936a4ab; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDMDB + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDMDB' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDMDB") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0x08b6a4ab; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDM + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDM' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDM") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x0876a4ab; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDM (exce ret) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDM (exce ret)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDM (exce ret)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0x0826a4ab; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STMDA + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STMDA' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STMDA") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_LDMDB) { + // 1. Positive Verification: Ensures "LDMDB" is correctly identified. + const uint32_t valid_inst = 0x493152d6; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for LDMDB: 0x493152d6"; + EXPECT_STREQ(info->name, "LDMDB") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x413152d6; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x4d3152d6; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDC + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDC' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDC") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x4b3152d6; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: BL + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'BL' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "BL") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x483152d6; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDMDA + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDMDA' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDMDA") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0x49b152d6; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDMIB + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDMIB' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDMIB") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x497152d6; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0x492152d6; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STMDB + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STMDB' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STMDB") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_LDMIB) { + // 1. Positive Verification: Ensures "LDMIB" is correctly identified. + const uint32_t valid_inst = 0x0999d905; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for LDMIB: 0x999d905"; + EXPECT_STREQ(info->name, "LDMIB") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x0199d905; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: ORR (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'ORR (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "ORR (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x0d99d905; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDC + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDC' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDC") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x0b99d905; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: BL + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'BL' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "BL") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x0899d905; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDM + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDM' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDM") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0x0919d905; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDMDB + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDMDB' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDMDB") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x09d9d905; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDM (exce ret) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDM (exce ret)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDM (exce ret)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0x0989d905; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STMIB + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STMIB' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STMIB") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_LDM_usr) { + // 1. Positive Verification: Ensures "LDM (usr reg)" is correctly identified. + const uint32_t valid_inst = 0xb8550fce; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for LDM (usr reg): 0xb8550fce"; + EXPECT_STREQ(info->name, "LDM (usr reg)") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0xb0550fce; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SUB (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SUB (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SUB (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0xbc550fce; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MRRC + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MRRC' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MRRC") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0xba550fce; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: B + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'B' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "B") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0xb8150fce; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDMDA + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDMDA' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDMDA") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0xb8750fce; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0xb8450fce; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STM (usr reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STM (usr reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STM (usr reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 15 + const uint32_t corrupt_inst = 0xb8558fce; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDM (exce ret) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDM (exce ret)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDM (exce ret)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_LDM_eret) { + // 1. Positive Verification: Ensures "LDM (exce ret)" is correctly identified. + const uint32_t valid_inst = 0x887bbd86; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for LDM (exce ret): 0x887bbd86"; + EXPECT_STREQ(info->name, "LDM (exce ret)") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x807bbd86; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: RSB (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'RSB (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "RSB (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x8c7bbd86; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDC + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDC' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDC") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x8a7bbd86; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: B + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'B' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "B") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x883bbd86; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDMDA + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDMDA' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDMDA") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0x886bbd86; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 15 + const uint32_t corrupt_inst = 0x887b3d86; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_STM) { + // 1. Positive Verification: Ensures "STM" is correctly identified. + const uint32_t valid_inst = 0xa88f4d9f; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for STM: 0xa88f4d9f"; + EXPECT_STREQ(info->name, "STM") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0xa08f4d9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: UMULL + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'UMULL' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "UMULL") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0xac8f4d9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STC + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STC' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STC") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0xaa8f4d9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: B + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'B' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "B") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0xa98f4d9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STMIB + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STMIB' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STMIB") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0xa80f4d9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STMDA + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STMDA' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STMDA") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0xa8cf4d9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STM (usr reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STM (usr reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STM (usr reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0xa89f4d9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDM + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDM' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDM") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_STMDA) { + // 1. Positive Verification: Ensures "STMDA" is correctly identified. + const uint32_t valid_inst = 0xc82327b0; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for STMDA: 0xc82327b0"; + EXPECT_STREQ(info->name, "STMDA") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0xc02327b0; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0xcc2327b0; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STC + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STC' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STC") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0xca2327b0; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: B + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'B' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "B") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0xc92327b0; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STMDB + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STMDB' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STMDB") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0xc8a327b0; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STM + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STM' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STM") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0xc86327b0; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0xc83327b0; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDMDA + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDMDA' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDMDA") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_STMDB) { + // 1. Positive Verification: Ensures "STMDB" is correctly identified. + const uint32_t valid_inst = 0x39082c80; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for STMDB: 0x39082c80"; + EXPECT_STREQ(info->name, "STMDB") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x31082c80; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SMLAXY + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SMLAXY' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SMLAXY") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x3d082c80; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STC + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STC' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STC") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x3b082c80; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: BL + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'BL' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "BL") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x38082c80; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STMDA + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STMDA' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STMDA") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0x39882c80; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STMIB + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STMIB' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STMIB") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x39482c80; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STM (usr reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STM (usr reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STM (usr reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0x39182c80; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDMDB + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDMDB' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDMDB") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_STMIB) { + // 1. Positive Verification: Ensures "STMIB" is correctly identified. + const uint32_t valid_inst = 0xf9aec65b; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for STMIB: 0xf9aec65b"; + EXPECT_STREQ(info->name, "STMIB") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0xf1aec65b; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0xfdaec65b; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STC + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STC' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STC") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0xfbaec65b; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: BLX (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'BLX (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "BLX (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0xf8aec65b; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STM + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STM' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STM") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0xf92ec65b; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STMDB + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STMDB' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STMDB") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0xf9eec65b; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0xf9bec65b; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDMIB + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDMIB' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDMIB") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_STM_usr) { + // 1. Positive Verification: Ensures "STM (usr reg)" is correctly identified. + const uint32_t valid_inst = 0x29c9967c; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for STM (usr reg): 0x29c9967c"; + EXPECT_STREQ(info->name, "STM (usr reg)") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x21c9967c; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: BIC (rsr) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'BIC (rsr)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "BIC (rsr)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x2dc9967c; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STC + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STC' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STC") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x2bc9967c; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: BL + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'BL' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "BL") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x2989967c; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STMIB + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STMIB' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STMIB") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x29e9967c; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0x29d9967c; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDM (exce ret) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDM (exce ret)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDM (exce ret)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_BFC) { + // 1. Positive Verification: Ensures "BFC" is correctly identified. + const uint32_t valid_inst = 0x37d6339f; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for BFC: 0x37d6339f"; + EXPECT_STREQ(info->name, "BFC") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x3fd6339f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SVC + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SVC' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SVC") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x33d6339f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: BIC (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'BIC (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "BIC (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x35d6339f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x36d6339f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0x3756339f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x3796339f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x37f6339f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0x37d633df; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0x37d633bf; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x37d6338f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 3 + const uint32_t corrupt_inst = 0x37d63397; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: BFI + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'BFI' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "BFI") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 2 + const uint32_t corrupt_inst = 0x37d6339b; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: BFI + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'BFI' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "BFI") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 1 + const uint32_t corrupt_inst = 0x37d6339d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: BFI + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'BFI' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "BFI") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 0 + const uint32_t corrupt_inst = 0x37d6339e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: BFI + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'BFI' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "BFI") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_BFI) { + // 1. Positive Verification: Ensures "BFI" is correctly identified. + const uint32_t valid_inst = 0x17da6992; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for BFI: 0x17da6992"; + EXPECT_STREQ(info->name, "BFI") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x1fda6992; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SVC + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SVC' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SVC") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x13da6992; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: BIC (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'BIC (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "BIC (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x15da6992; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x16da6992; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0x175a6992; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x179a6992; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x17fa6992; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0x17da69d2; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0x17da69b2; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x17da6982; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_CLZ) { + // 1. Positive Verification: Ensures "CLZ" is correctly identified. + const uint32_t valid_inst = 0xc16f1f1a; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for CLZ: 0xc16f1f1a"; + EXPECT_STREQ(info->name, "CLZ") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0xc96f1f1a; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0xc56f1f1a; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0xc36f1f1a; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0xc06f1f1a; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: RSB (rsr) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'RSB (rsr)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "RSB (rsr)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0xc1ef1f1a; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0xc12f1f1a; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0xc14f1f1a; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0xc17f1f1a; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 19 + const uint32_t corrupt_inst = 0xc1671f1a; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 18 + const uint32_t corrupt_inst = 0xc16b1f1a; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 17 + const uint32_t corrupt_inst = 0xc16d1f1a; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 16 + const uint32_t corrupt_inst = 0xc16e1f1a; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 11 + const uint32_t corrupt_inst = 0xc16f171a; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 10 + const uint32_t corrupt_inst = 0xc16f1b1a; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 9 + const uint32_t corrupt_inst = 0xc16f1d1a; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 8 + const uint32_t corrupt_inst = 0xc16f1e1a; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0xc16f1f9a; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0xc16f1f5a; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0xc16f1f3a; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0xc16f1f0a; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_MOVT) { + // 1. Positive Verification: Ensures "MOVT" is correctly identified. + const uint32_t valid_inst = 0x33406212; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for MOVT: 0x33406212"; + EXPECT_STREQ(info->name, "MOVT") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x3b406212; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: BL + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'BL' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "BL") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x37406212; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SMLALD + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SMLALD' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SMLALD") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x31406212; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x32406212; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SUB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SUB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SUB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0x33c06212; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: BIC (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'BIC (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "BIC (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x33006212; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MOVW + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MOVW' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MOVW") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x33606212; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0x33506212; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_MOVW) { + // 1. Positive Verification: Ensures "MOVW" is correctly identified. + const uint32_t valid_inst = 0x83057062; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for MOVW: 0x83057062"; + EXPECT_STREQ(info->name, "MOVW") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x8b057062; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: BL + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'BL' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "BL") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x87057062; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STR (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STR (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STR (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x81057062; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x82057062; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: AND (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'AND (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "AND (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0x83857062; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: ORR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'ORR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "ORR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x83457062; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MOVT + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MOVT' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MOVT") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x83257062; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0x83157062; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_SBFX) { + // 1. Positive Verification: Ensures "SBFX" is correctly identified. + const uint32_t valid_inst = 0x37be4954; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for SBFX: 0x37be4954"; + EXPECT_STREQ(info->name, "SBFX") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x3fbe4954; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SVC + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SVC' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SVC") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x33be4954; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x35be4954; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x36be4954; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SSAT + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SSAT' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SSAT") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0x373e4954; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x37fe4954; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: UBFX + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'UBFX' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "UBFX") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x379e4954; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0x37be4914; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0x37be4974; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x37be4944; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDR (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDR (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDR (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_SEL) { + // 1. Positive Verification: Ensures "SEL" is correctly identified. + const uint32_t valid_inst = 0x5681cfbb; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for SEL: 0x5681cfbb"; + EXPECT_STREQ(info->name, "SEL") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x5e81cfbb; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MCR + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MCR' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MCR") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x5281cfbb; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: ADD (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'ADD (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "ADD (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x5481cfbb; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x5781cfbb; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0x5601cfbb; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x56c1cfbb; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x56a1cfbb; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0x5691cfbb; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 11 + const uint32_t corrupt_inst = 0x5681c7bb; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 10 + const uint32_t corrupt_inst = 0x5681cbbb; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 9 + const uint32_t corrupt_inst = 0x5681cdbb; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 8 + const uint32_t corrupt_inst = 0x5681cebb; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0x5681cf3b; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0x5681cffb; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0x5681cf9b; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: PKHBT + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'PKHBT' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "PKHBT") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x5681cfab; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STR (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STR (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STR (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_UBFX) { + // 1. Positive Verification: Ensures "UBFX" is correctly identified. + const uint32_t valid_inst = 0x37f52554; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for UBFX: 0x37f52554"; + EXPECT_STREQ(info->name, "UBFX") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x3ff52554; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SVC + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SVC' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SVC") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x33f52554; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x35f52554; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x36f52554; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: USAT + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'USAT' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "USAT") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0x37752554; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x37b52554; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SBFX + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SBFX' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SBFX") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x37d52554; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0x37f52514; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0x37f52574; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x37f52544; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_USAD8) { + // 1. Positive Verification: Ensures "USAD8" is correctly identified. + const uint32_t valid_inst = 0x0788f316; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for USAD8: 0x788f316"; + EXPECT_STREQ(info->name, "USAD8") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x0f88f316; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SVC + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SVC' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SVC") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x0388f316; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: ORR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'ORR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "ORR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x0588f316; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x0688f316; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: PKHBT + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'PKHBT' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "PKHBT") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0x0708f316; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SMUAD + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SMUAD' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SMUAD") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x07c8f316; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: BFI + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'BFI' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "BFI") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x07a8f316; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0x0798f316; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 15 + const uint32_t corrupt_inst = 0x07887316; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: USADA8 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'USADA8' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "USADA8") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 14 + const uint32_t corrupt_inst = 0x0788b316; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: USADA8 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'USADA8' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "USADA8") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 13 + const uint32_t corrupt_inst = 0x0788d316; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: USADA8 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'USADA8' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "USADA8") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 12 + const uint32_t corrupt_inst = 0x0788e316; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: USADA8 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'USADA8' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "USADA8") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0x0788f396; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0x0788f356; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0x0788f336; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x0788f306; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STR (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STR (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STR (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_USADA8) { + // 1. Positive Verification: Ensures "USADA8" is correctly identified. + const uint32_t valid_inst = 0x578d6819; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for USADA8: 0x578d6819"; + EXPECT_STREQ(info->name, "USADA8") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x5f8d6819; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SVC + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SVC' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SVC") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x538d6819; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: ORR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'ORR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "ORR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x558d6819; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x568d6819; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: PKHBT + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'PKHBT' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "PKHBT") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0x570d6819; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SMLAD + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SMLAD' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SMLAD") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x57cd6819; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: BFI + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'BFI' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "BFI") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x57ad6819; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0x579d6819; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0x578d6899; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0x578d6859; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0x578d6839; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x578d6809; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STR (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STR (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STR (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_PKHBT) { + // 1. Positive Verification: Ensures "PKHBT" is correctly identified. + const uint32_t valid_inst = 0xb68bd493; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for PKHBT: 0xb68bd493"; + EXPECT_STREQ(info->name, "PKHBT") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0xbe8bd493; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MCR + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MCR' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MCR") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0xb28bd493; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: ADD (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'ADD (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "ADD (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0xb48bd493; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0xb78bd493; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0xb60bd493; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0xb6cbd493; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0xb6abd493; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SSAT + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SSAT' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SSAT") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0xb69bd493; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0xb68bd4d3; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: PKHTB + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'PKHTB' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "PKHTB") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0xb68bd4b3; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0xb68bd483; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STR (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STR (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STR (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_PKHTB) { + // 1. Positive Verification: Ensures "PKHTB" is correctly identified. + const uint32_t valid_inst = 0x668c7b54; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for PKHTB: 0x668c7b54"; + EXPECT_STREQ(info->name, "PKHTB") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x6e8c7b54; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MCR + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MCR' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MCR") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x628c7b54; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: ADD (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'ADD (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "ADD (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x648c7b54; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x678c7b54; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0x660c7b54; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x66cc7b54; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x66ac7b54; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SSAT + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SSAT' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SSAT") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0x669c7b54; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0x668c7b14; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: PKHBT + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'PKHBT' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "PKHBT") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0x668c7b74; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x668c7b44; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STR (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STR (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STR (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_RBIT) { + // 1. Positive Verification: Ensures "RBIT" is correctly identified. + const uint32_t valid_inst = 0x66ffff30; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for RBIT: 0x66ffff30"; + EXPECT_STREQ(info->name, "RBIT") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x6effff30; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MRC + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MRC' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MRC") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x62ffff30; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: RSC (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'RSC (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "RSC (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x64ffff30; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRBT (A1) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRBT (A1)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRBT (A1)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x67ffff30; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0x667fff30; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: UHASX + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'UHASX' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "UHASX") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x66bfff30; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: REV + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'REV' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "REV") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x66dfff30; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0x66efff30; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: USAT16 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'USAT16' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "USAT16") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 19 + const uint32_t corrupt_inst = 0x66f7ff30; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 18 + const uint32_t corrupt_inst = 0x66fbff30; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 17 + const uint32_t corrupt_inst = 0x66fdff30; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 16 + const uint32_t corrupt_inst = 0x66feff30; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 11 + const uint32_t corrupt_inst = 0x66fff730; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 10 + const uint32_t corrupt_inst = 0x66fffb30; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 9 + const uint32_t corrupt_inst = 0x66fffd30; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 8 + const uint32_t corrupt_inst = 0x66fffe30; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0x66ffffb0; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: REVSH + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'REVSH' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "REVSH") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0x66ffff70; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0x66ffff10; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: USAT + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'USAT' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "USAT") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x66ffff20; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRBT (A2) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRBT (A2)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRBT (A2)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_REV) { + // 1. Positive Verification: Ensures "REV" is correctly identified. + const uint32_t valid_inst = 0xa6bf3f3d; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for REV: 0xa6bf3f3d"; + EXPECT_STREQ(info->name, "REV") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0xaebf3f3d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MRC + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MRC' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MRC") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0xa2bf3f3d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: ADC (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'ADC (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "ADC (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0xa4bf3f3d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRT (A1) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRT (A1)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRT (A1)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0xa7bf3f3d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0xa63f3f3d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SHASX + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SHASX' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SHASX") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0xa6ff3f3d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: RBIT + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'RBIT' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "RBIT") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0xa69f3f3d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0xa6af3f3d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SSAT16 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SSAT16' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SSAT16") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 19 + const uint32_t corrupt_inst = 0xa6b73f3d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 18 + const uint32_t corrupt_inst = 0xa6bb3f3d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 17 + const uint32_t corrupt_inst = 0xa6bd3f3d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 16 + const uint32_t corrupt_inst = 0xa6be3f3d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 11 + const uint32_t corrupt_inst = 0xa6bf373d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 10 + const uint32_t corrupt_inst = 0xa6bf3b3d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 9 + const uint32_t corrupt_inst = 0xa6bf3d3d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 8 + const uint32_t corrupt_inst = 0xa6bf3e3d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0xa6bf3fbd; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: REV16 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'REV16' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "REV16") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0xa6bf3f7d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0xa6bf3f1d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SSAT + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SSAT' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SSAT") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0xa6bf3f2d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRT (A2) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRT (A2)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRT (A2)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_REV16) { + // 1. Positive Verification: Ensures "REV16" is correctly identified. + const uint32_t valid_inst = 0xa6bf5fb4; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for REV16: 0xa6bf5fb4"; + EXPECT_STREQ(info->name, "REV16") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0xaebf5fb4; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MRC + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MRC' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MRC") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0xa2bf5fb4; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: ADC (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'ADC (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "ADC (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0xa4bf5fb4; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRT (A1) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRT (A1)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRT (A1)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0xa7bf5fb4; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0xa63f5fb4; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0xa6ff5fb4; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: REVSH + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'REVSH' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "REVSH") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0xa69f5fb4; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0xa6af5fb4; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 19 + const uint32_t corrupt_inst = 0xa6b75fb4; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 18 + const uint32_t corrupt_inst = 0xa6bb5fb4; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 17 + const uint32_t corrupt_inst = 0xa6bd5fb4; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 16 + const uint32_t corrupt_inst = 0xa6be5fb4; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 11 + const uint32_t corrupt_inst = 0xa6bf57b4; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 10 + const uint32_t corrupt_inst = 0xa6bf5bb4; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 9 + const uint32_t corrupt_inst = 0xa6bf5db4; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 8 + const uint32_t corrupt_inst = 0xa6bf5eb4; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0xa6bf5f34; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: REV + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'REV' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "REV") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0xa6bf5ff4; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0xa6bf5f94; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SSAT + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SSAT' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SSAT") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0xa6bf5fa4; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRT (A2) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRT (A2)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRT (A2)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_REVSH) { + // 1. Positive Verification: Ensures "REVSH" is correctly identified. + const uint32_t valid_inst = 0x56ffffb4; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for REVSH: 0x56ffffb4"; + EXPECT_STREQ(info->name, "REVSH") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x5effffb4; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MRC + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MRC' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MRC") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x52ffffb4; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: RSC (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'RSC (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "RSC (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x54ffffb4; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRBT (A1) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRBT (A1)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRBT (A1)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x57ffffb4; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0x567fffb4; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x56bfffb4; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: REV16 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'REV16' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "REV16") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x56dfffb4; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0x56efffb4; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 19 + const uint32_t corrupt_inst = 0x56f7ffb4; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 18 + const uint32_t corrupt_inst = 0x56fbffb4; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 17 + const uint32_t corrupt_inst = 0x56fdffb4; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 16 + const uint32_t corrupt_inst = 0x56feffb4; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 11 + const uint32_t corrupt_inst = 0x56fff7b4; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 10 + const uint32_t corrupt_inst = 0x56fffbb4; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 9 + const uint32_t corrupt_inst = 0x56fffdb4; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 8 + const uint32_t corrupt_inst = 0x56fffeb4; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0x56ffff34; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: RBIT + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'RBIT' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "RBIT") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0x56fffff4; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0x56ffff94; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: USAT + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'USAT' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "USAT") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x56ffffa4; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRBT (A2) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRBT (A2)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRBT (A2)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_SSAT) { + // 1. Positive Verification: Ensures "SSAT" is correctly identified. + const uint32_t valid_inst = 0x36ae1b16; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for SSAT: 0x36ae1b16"; + EXPECT_STREQ(info->name, "SSAT") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x3eae1b16; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MCR + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MCR' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MCR") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x32ae1b16; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: ADC (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'ADC (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "ADC (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x34ae1b16; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRT (A1) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRT (A1)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRT (A1)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x37ae1b16; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0x362e1b16; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x36ee1b16; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: USAT + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'USAT' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "USAT") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x368e1b16; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: PKHBT + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'PKHBT' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "PKHBT") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0x36ae1b36; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x36ae1b06; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRT (A2) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRT (A2)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRT (A2)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_SSAT16) { + // 1. Positive Verification: Ensures "SSAT16" is correctly identified. + const uint32_t valid_inst = 0x66ab2f3d; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for SSAT16: 0x66ab2f3d"; + EXPECT_STREQ(info->name, "SSAT16") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x6eab2f3d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MCR + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MCR' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MCR") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x62ab2f3d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: ADC (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'ADC (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "ADC (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x64ab2f3d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRT (A1) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRT (A1)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRT (A1)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x67ab2f3d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0x662b2f3d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: QASX + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'QASX' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "QASX") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x66eb2f3d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: USAT16 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'USAT16' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "USAT16") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x668b2f3d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0x66bb2f3d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 11 + const uint32_t corrupt_inst = 0x66ab273d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 10 + const uint32_t corrupt_inst = 0x66ab2b3d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 9 + const uint32_t corrupt_inst = 0x66ab2d3d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 8 + const uint32_t corrupt_inst = 0x66ab2e3d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0x66ab2fbd; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0x66ab2f7d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0x66ab2f1d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SSAT + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SSAT' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SSAT") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x66ab2f2d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRT (A2) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRT (A2)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRT (A2)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_USAT) { + // 1. Positive Verification: Ensures "USAT" is correctly identified. + const uint32_t valid_inst = 0x66e9e49d; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for USAT: 0x66e9e49d"; + EXPECT_STREQ(info->name, "USAT") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x6ee9e49d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MCR + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MCR' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MCR") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x62e9e49d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: RSC (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'RSC (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "RSC (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x64e9e49d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRBT (A1) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRBT (A1)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRBT (A1)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x67e9e49d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0x6669e49d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x66a9e49d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SSAT + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SSAT' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SSAT") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x66c9e49d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0x66e9e4bd; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x66e9e48d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRBT (A2) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRBT (A2)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRBT (A2)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_USAT16) { + // 1. Positive Verification: Ensures "USAT16" is correctly identified. + const uint32_t valid_inst = 0x96e66f38; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for USAT16: 0x96e66f38"; + EXPECT_STREQ(info->name, "USAT16") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x9ee66f38; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MCR + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MCR' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MCR") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x92e66f38; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: RSC (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'RSC (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "RSC (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x94e66f38; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRBT (A1) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRBT (A1)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRBT (A1)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x97e66f38; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0x96666f38; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: UQASX + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'UQASX' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "UQASX") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x96a66f38; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SSAT16 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SSAT16' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SSAT16") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x96c66f38; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0x96f66f38; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 11 + const uint32_t corrupt_inst = 0x96e66738; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 10 + const uint32_t corrupt_inst = 0x96e66b38; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 9 + const uint32_t corrupt_inst = 0x96e66d38; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 8 + const uint32_t corrupt_inst = 0x96e66e38; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0x96e66fb8; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0x96e66f78; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0x96e66f18; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: USAT + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'USAT' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "USAT") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x96e66f28; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRBT (A2) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRBT (A2)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRBT (A2)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_SDIV) { + // 1. Positive Verification: Ensures "SDIV" is correctly identified. + const uint32_t valid_inst = 0x071ffa17; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for SDIV: 0x71ffa17"; + EXPECT_STREQ(info->name, "SDIV") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x0f1ffa17; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SVC + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SVC' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SVC") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x031ffa17; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x051ffa17; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDR (lit) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDR (lit)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDR (lit)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x061ffa17; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0x079ffa17; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x075ffa17; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SMMUL + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SMMUL' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SMMUL") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x073ffa17; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: UDIV + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'UDIV' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "UDIV") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0x070ffa17; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SMUAD + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SMUAD' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SMUAD") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 15 + const uint32_t corrupt_inst = 0x071f7a17; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 14 + const uint32_t corrupt_inst = 0x071fba17; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 13 + const uint32_t corrupt_inst = 0x071fda17; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 12 + const uint32_t corrupt_inst = 0x071fea17; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0x071ffa97; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0x071ffa57; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0x071ffa37; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x071ffa07; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDR (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDR (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDR (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_UDIV) { + // 1. Positive Verification: Ensures "UDIV" is correctly identified. + const uint32_t valid_inst = 0xd73df41a; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for UDIV: 0xd73df41a"; + EXPECT_STREQ(info->name, "UDIV") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0xdf3df41a; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SVC + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SVC' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SVC") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0xd33df41a; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0xd53df41a; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0xd63df41a; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0xd7bdf41a; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0xd77df41a; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0xd71df41a; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SDIV + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SDIV' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SDIV") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0xd72df41a; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 15 + const uint32_t corrupt_inst = 0xd73d741a; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 14 + const uint32_t corrupt_inst = 0xd73db41a; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 13 + const uint32_t corrupt_inst = 0xd73dd41a; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 12 + const uint32_t corrupt_inst = 0xd73de41a; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0xd73df49a; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0xd73df45a; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0xd73df43a; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0xd73df40a; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDR (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDR (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDR (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_MLA) { + // 1. Positive Verification: Ensures "MLA" is correctly identified. + const uint32_t valid_inst = 0xb0322098; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for MLA: 0xb0322098"; + EXPECT_STREQ(info->name, "MLA") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0xb8322098; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDMDA + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDMDA' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDMDA") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0xb4322098; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRT (A1) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRT (A1)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRT (A1)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0xb2322098; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: EOR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'EOR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "EOR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0xb1322098; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0xb0b22098; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: UMLAL + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'UMLAL' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "UMLAL") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0xb0722098; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0xb0122098; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0xb0322018; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: EOR (rsr) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'EOR (rsr)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "EOR (rsr)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0xb03220d8; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRSBT (A2) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRSBT (A2)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRSBT (A2)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0xb03220b8; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRHT (A2) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRHT (A2)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRHT (A2)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0xb0322088; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: EOR (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'EOR (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "EOR (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_MLS) { + // 1. Positive Verification: Ensures "MLS" is correctly identified. + const uint32_t valid_inst = 0xd061c097; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for MLS: 0xd061c097"; + EXPECT_STREQ(info->name, "MLS") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0xd861c097; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0xd461c097; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRBT (A1) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRBT (A1)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRBT (A1)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0xd261c097; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: RSB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'RSB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "RSB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0xd161c097; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0xd0e1c097; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SMLAL + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SMLAL' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SMLAL") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0xd021c097; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MLA + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MLA' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MLA") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0xd041c097; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: UMAAL + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'UMAAL' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "UMAAL") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0xd071c097; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0xd061c017; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: RSB (rsr) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'RSB (rsr)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "RSB (rsr)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0xd061c0d7; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRD (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRD (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRD (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0xd061c0b7; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRHT (A1) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRHT (A1)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRHT (A1)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0xd061c087; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: RSB (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'RSB (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "RSB (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_MUL) { + // 1. Positive Verification: Ensures "MUL" is correctly identified. + const uint32_t valid_inst = 0x40080a9f; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for MUL: 0x40080a9f"; + EXPECT_STREQ(info->name, "MUL") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x48080a9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STMDA + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STMDA' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STMDA") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x44080a9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x42080a9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: AND (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'AND (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "AND (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x41080a9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0x40880a9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: UMULL + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'UMULL' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "UMULL") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x40480a9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: UMAAL + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'UMAAL' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "UMAAL") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x40280a9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MLA + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MLA' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MLA") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 15 + const uint32_t corrupt_inst = 0x40088a9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 14 + const uint32_t corrupt_inst = 0x40084a9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 13 + const uint32_t corrupt_inst = 0x40082a9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 12 + const uint32_t corrupt_inst = 0x40081a9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0x40080a1f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: AND (rsr) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'AND (rsr)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "AND (rsr)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0x40080adf; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0x40080abf; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x40080a8f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: AND (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'AND (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "AND (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_SMLAL) { + // 1. Positive Verification: Ensures "SMLAL" is correctly identified. + const uint32_t valid_inst = 0xd0e3639e; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for SMLAL: 0xd0e3639e"; + EXPECT_STREQ(info->name, "SMLAL") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0xd8e3639e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0xd4e3639e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRBT (A1) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRBT (A1)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRBT (A1)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0xd2e3639e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: RSC (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'RSC (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "RSC (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0xd1e3639e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0xd063639e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MLS + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MLS' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MLS") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0xd0a3639e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: UMLAL + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'UMLAL' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "UMLAL") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0xd0c3639e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SMULL + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SMULL' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SMULL") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0xd0e3631e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: RSC (rsr) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'RSC (rsr)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "RSC (rsr)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0xd0e363de; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRD (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRD (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRD (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0xd0e363be; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRHT (A1) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRHT (A1)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRHT (A1)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0xd0e3638e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: RSC (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'RSC (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "RSC (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_SMULL) { + // 1. Positive Verification: Ensures "SMULL" is correctly identified. + const uint32_t valid_inst = 0xf0de559d; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for SMULL: 0xf0de559d"; + EXPECT_STREQ(info->name, "SMULL") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0xf8de559d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDM (usr reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDM (usr reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDM (usr reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0xf4de559d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0xf2de559d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SBC (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SBC (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SBC (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0xf1de559d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0xf05e559d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0xf09e559d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: UMULL + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'UMULL' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "UMULL") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0xf0fe559d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SMLAL + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SMLAL' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SMLAL") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0xf0de551d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SBC (rsr) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SBC (rsr)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SBC (rsr)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0xf0de55dd; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRSB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRSB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRSB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0xf0de55bd; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRH (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRH (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRH (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0xf0de558d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SBC (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SBC (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SBC (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_UMAAL) { + // 1. Positive Verification: Ensures "UMAAL" is correctly identified. + const uint32_t valid_inst = 0x5041b097; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for UMAAL: 0x5041b097"; + EXPECT_STREQ(info->name, "UMAAL") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x5841b097; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STM (usr reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STM (usr reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STM (usr reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x5441b097; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x5241b097; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SUB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SUB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SUB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x5141b097; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SWPB + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SWPB' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SWPB") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0x50c1b097; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SMULL + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SMULL' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SMULL") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x5001b097; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x5061b097; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MLS + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MLS' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MLS") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0x5051b097; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0x5041b017; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SUB (rsr) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SUB (rsr)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SUB (rsr)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0x5041b0d7; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRD (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRD (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRD (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0x5041b0b7; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRH (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRH (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRH (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x5041b087; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SUB (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SUB (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SUB (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_UMLAL) { + // 1. Positive Verification: Ensures "UMLAL" is correctly identified. + const uint32_t valid_inst = 0x20a92399; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for UMLAL: 0x20a92399"; + EXPECT_STREQ(info->name, "UMLAL") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x28a92399; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STM + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STM' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STM") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x24a92399; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRT (A1) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRT (A1)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRT (A1)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x22a92399; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: ADC (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'ADC (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "ADC (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x21a92399; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0x20292399; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MLA + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MLA' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MLA") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x20e92399; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SMLAL + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SMLAL' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SMLAL") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x20892399; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: UMULL + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'UMULL' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "UMULL") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0x20a92319; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: ADC (rsr) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'ADC (rsr)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "ADC (rsr)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0x20a923d9; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0x20a923b9; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x20a92389; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: ADC (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'ADC (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "ADC (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_UMULL) { + // 1. Positive Verification: Ensures "UMULL" is correctly identified. + const uint32_t valid_inst = 0x00838a94; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for UMULL: 0x838a94"; + EXPECT_STREQ(info->name, "UMULL") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x08838a94; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STM + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STM' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STM") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x04838a94; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x02838a94; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: ADD (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'ADD (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "ADD (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x01838a94; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0x00038a94; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x00c38a94; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SMULL + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SMULL' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SMULL") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x00a38a94; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: UMLAL + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'UMLAL' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "UMLAL") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0x00838a14; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: ADD (rsr) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'ADD (rsr)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "ADD (rsr)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0x00838ad4; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0x00838ab4; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x00838a84; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: ADD (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'ADD (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "ADD (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_SMLALxy) { + // 1. Positive Verification: Ensures "SMLALXY" is correctly identified. + const uint32_t valid_inst = 0x314707cd; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for SMLALXY: 0x314707cd"; + EXPECT_STREQ(info->name, "SMLALXY") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x394707cd; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STM (usr reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STM (usr reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STM (usr reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x354707cd; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x334707cd; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MOVT + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MOVT' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MOVT") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x304707cd; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SUB (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SUB (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SUB (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0x31c707cd; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: BIC (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'BIC (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "BIC (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x310707cd; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SMLAXY + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SMLAXY' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SMLAXY") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x316707cd; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SMULXY + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SMULXY' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SMULXY") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0x315707cd; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: CMP (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'CMP (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "CMP (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0x3147074d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x314707dd; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRD (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRD (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRD (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_SMLAxy) { + // 1. Positive Verification: Ensures "SMLAXY" is correctly identified. + const uint32_t valid_inst = 0xa10ba2e7; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for SMLAXY: 0xa10ba2e7"; + EXPECT_STREQ(info->name, "SMLAXY") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0xa90ba2e7; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STMDB + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STMDB' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STMDB") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0xa50ba2e7; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0xa30ba2e7; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MOVW + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MOVW' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MOVW") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0xa00ba2e7; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: AND (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'AND (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "AND (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0xa18ba2e7; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: ORR (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'ORR (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "ORR (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0xa14ba2e7; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SMLALXY + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SMLALXY' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SMLALXY") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0xa12ba2e7; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0xa11ba2e7; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0xa10ba267; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0xa10ba2f7; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_SMULxy) { + // 1. Positive Verification: Ensures "SMULXY" is correctly identified. + const uint32_t valid_inst = 0xa16b098e; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for SMULXY: 0xa16b098e"; + EXPECT_STREQ(info->name, "SMULXY") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0xa96b098e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0xa56b098e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0xa36b098e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0xa06b098e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: RSB (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'RSB (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "RSB (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0xa1eb098e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0xa12b098e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SMLAWY + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SMLAWY' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SMLAWY") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0xa14b098e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SMLALXY + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SMLALXY' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SMLALXY") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0xa17b098e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: CMN (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'CMN (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "CMN (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 15 + const uint32_t corrupt_inst = 0xa16b898e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 14 + const uint32_t corrupt_inst = 0xa16b498e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 13 + const uint32_t corrupt_inst = 0xa16b298e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 12 + const uint32_t corrupt_inst = 0xa16b198e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0xa16b090e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0xa16b099e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_SMLAWy) { + // 1. Positive Verification: Ensures "SMLAWY" is correctly identified. + const uint32_t valid_inst = 0x812418ca; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for SMLAWY: 0x812418ca"; + EXPECT_STREQ(info->name, "SMLAWY") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x892418ca; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STMDB + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STMDB' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STMDB") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x852418ca; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x832418ca; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x802418ca; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: EOR (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'EOR (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "EOR (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0x81a418ca; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x816418ca; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x810418ca; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SMLAXY + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SMLAXY' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SMLAXY") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0x813418ca; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0x8124184a; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0x812418ea; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x812418da; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_SMULWy) { + // 1. Positive Verification: Ensures "SMULWY" is correctly identified. + const uint32_t valid_inst = 0x712e0ce1; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for SMULWY: 0x712e0ce1"; + EXPECT_STREQ(info->name, "SMULWY") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x792e0ce1; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STMDB + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STMDB' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STMDB") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x752e0ce1; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x732e0ce1; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x702e0ce1; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: EOR (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'EOR (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "EOR (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0x71ae0ce1; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x716e0ce1; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SMULXY + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SMULXY' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SMULXY") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x710e0ce1; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SMLAXY + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SMLAXY' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SMLAXY") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0x713e0ce1; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: TEQ (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'TEQ (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "TEQ (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 15 + const uint32_t corrupt_inst = 0x712e8ce1; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 14 + const uint32_t corrupt_inst = 0x712e4ce1; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 13 + const uint32_t corrupt_inst = 0x712e2ce1; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 12 + const uint32_t corrupt_inst = 0x712e1ce1; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0x712e0c61; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0x712e0cc1; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SMLAWY + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SMLAWY' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SMLAWY") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x712e0cf1; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_SMMUL) { + // 1. Positive Verification: Ensures "SMMUL" is correctly identified. + const uint32_t valid_inst = 0xe75dfb1e; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for SMMUL: 0xe75dfb1e"; + EXPECT_STREQ(info->name, "SMMUL") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0xef5dfb1e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SVC + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SVC' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SVC") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0xe35dfb1e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0xe55dfb1e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0xe65dfb1e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0xe7ddfb1e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: BFI + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'BFI' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "BFI") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0xe71dfb1e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SDIV + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SDIV' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SDIV") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0xe77dfb1e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0xe74dfb1e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SMLALD + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SMLALD' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SMLALD") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 15 + const uint32_t corrupt_inst = 0xe75d7b1e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SMMLA + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SMMLA' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SMMLA") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 14 + const uint32_t corrupt_inst = 0xe75dbb1e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SMMLA + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SMMLA' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SMMLA") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 13 + const uint32_t corrupt_inst = 0xe75ddb1e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SMMLA + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SMMLA' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SMMLA") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 12 + const uint32_t corrupt_inst = 0xe75deb1e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SMMLA + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SMMLA' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SMMLA") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0xe75dfb9e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0xe75dfb5e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0xe75dfb0e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_SMMLA) { + // 1. Positive Verification: Ensures "SMMLA" is correctly identified. + const uint32_t valid_inst = 0x375e0515; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for SMMLA: 0x375e0515"; + EXPECT_STREQ(info->name, "SMMLA") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x3f5e0515; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SVC + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SVC' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SVC") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x335e0515; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: CMP (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'CMP (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "CMP (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x355e0515; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x365e0515; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0x37de0515; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: BFI + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'BFI' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "BFI") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x371e0515; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x377e0515; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0x374e0515; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SMLALD + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SMLALD' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SMLALD") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0x375e0595; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0x375e0555; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x375e0505; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_SMMLS) { + // 1. Positive Verification: Ensures "SMMLS" is correctly identified. + const uint32_t valid_inst = 0xb75c05da; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for SMMLS: 0xb75c05da"; + EXPECT_STREQ(info->name, "SMMLS") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0xbf5c05da; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SVC + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SVC' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SVC") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0xb35c05da; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: CMP (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'CMP (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "CMP (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0xb55c05da; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0xb65c05da; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0xb7dc05da; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0xb71c05da; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0xb77c05da; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0xb74c05da; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0xb75c055a; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0xb75c059a; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0xb75c05ca; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_SMUAD) { + // 1. Positive Verification: Ensures "SMUAD" is correctly identified. + const uint32_t valid_inst = 0x770ff833; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for SMUAD: 0x770ff833"; + EXPECT_STREQ(info->name, "SMUAD") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x7f0ff833; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SVC + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SVC' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SVC") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x730ff833; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MOVW + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MOVW' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MOVW") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x750ff833; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x760ff833; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0x778ff833; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x774ff833; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SMLALD + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SMLALD' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SMLALD") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x772ff833; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0x771ff833; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 15 + const uint32_t corrupt_inst = 0x770f7833; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SMLAD + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SMLAD' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SMLAD") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 14 + const uint32_t corrupt_inst = 0x770fb833; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SMLAD + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SMLAD' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SMLAD") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 13 + const uint32_t corrupt_inst = 0x770fd833; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SMLAD + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SMLAD' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SMLAD") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 12 + const uint32_t corrupt_inst = 0x770fe833; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SMLAD + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SMLAD' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SMLAD") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0x770ff8b3; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0x770ff873; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SMUSD + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SMUSD' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SMUSD") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x770ff823; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STR (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STR (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STR (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_SMLAD) { + // 1. Positive Verification: Ensures "SMLAD" is correctly identified. + const uint32_t valid_inst = 0x970d0611; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for SMLAD: 0x970d0611"; + EXPECT_STREQ(info->name, "SMLAD") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x9f0d0611; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SVC + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SVC' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SVC") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x930d0611; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MOVW + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MOVW' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MOVW") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x950d0611; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x960d0611; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0x978d0611; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: USADA8 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'USADA8' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "USADA8") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x974d0611; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SMLALD + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SMLALD' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SMLALD") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x972d0611; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0x971d0611; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0x970d0691; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0x970d0651; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SMLSD + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SMLSD' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SMLSD") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x970d0601; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STR (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STR (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STR (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_SMLALD) { + // 1. Positive Verification: Ensures "SMLALD" is correctly identified. + const uint32_t valid_inst = 0xd745083c; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for SMLALD: 0xd745083c"; + EXPECT_STREQ(info->name, "SMLALD") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0xdf45083c; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SVC + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SVC' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SVC") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0xd345083c; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MOVT + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MOVT' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MOVT") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0xd545083c; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0xd645083c; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0xd7c5083c; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0xd705083c; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SMLAD + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SMLAD' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SMLAD") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0xd765083c; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0xd755083c; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SMMLA + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SMMLA' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SMMLA") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0xd74508bc; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0xd745087c; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SMLSLD + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SMLSLD' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SMLSLD") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0xd745082c; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRB (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRB (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRB (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_SMUSD) { + // 1. Positive Verification: Ensures "SMUSD" is correctly identified. + const uint32_t valid_inst = 0x270af47e; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for SMUSD: 0x270af47e"; + EXPECT_STREQ(info->name, "SMUSD") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x2f0af47e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SVC + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SVC' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SVC") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x230af47e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MOVW + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MOVW' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MOVW") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x250af47e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x260af47e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0x278af47e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x274af47e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SMLSLD + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SMLSLD' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SMLSLD") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x272af47e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0x271af47e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 15 + const uint32_t corrupt_inst = 0x270a747e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SMLSD + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SMLSD' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SMLSD") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 14 + const uint32_t corrupt_inst = 0x270ab47e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SMLSD + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SMLSD' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SMLSD") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 13 + const uint32_t corrupt_inst = 0x270ad47e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SMLSD + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SMLSD' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SMLSD") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 12 + const uint32_t corrupt_inst = 0x270ae47e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SMLSD + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SMLSD' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SMLSD") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0x270af4fe; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0x270af43e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SMUAD + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SMUAD' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SMUAD") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x270af46e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STR (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STR (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STR (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_SMLSD) { + // 1. Positive Verification: Ensures "SMLSD" is correctly identified. + const uint32_t valid_inst = 0xe7020772; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for SMLSD: 0xe7020772"; + EXPECT_STREQ(info->name, "SMLSD") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0xef020772; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SVC + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SVC' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SVC") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0xe3020772; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MOVW + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MOVW' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MOVW") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0xe5020772; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0xe6020772; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0xe7820772; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0xe7420772; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SMLSLD + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SMLSLD' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SMLSLD") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0xe7220772; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0xe7120772; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0xe70207f2; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0xe7020732; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SMLAD + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SMLAD' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SMLAD") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0xe7020762; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STR (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STR (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STR (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_SMLSLD) { + // 1. Positive Verification: Ensures "SMLSLD" is correctly identified. + const uint32_t valid_inst = 0x8740035c; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for SMLSLD: 0x8740035c"; + EXPECT_STREQ(info->name, "SMLSLD") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x8f40035c; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SVC + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SVC' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SVC") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x8340035c; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MOVT + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MOVT' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MOVT") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x8540035c; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x8640035c; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0x87c0035c; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x8700035c; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SMLSD + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SMLSD' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SMLSD") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x8760035c; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0x8750035c; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0x874003dc; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0x8740031c; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SMLALD + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SMLALD' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SMLALD") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x8740034c; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRB (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRB (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRB (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_SADD8) { + // 1. Positive Verification: Ensures "SADD8" is correctly identified. + const uint32_t valid_inst = 0xb61faf90; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for SADD8: 0xb61faf90"; + EXPECT_STREQ(info->name, "SADD8") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0xbe1faf90; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MRC + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MRC' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MRC") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0xb21faf90; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: AND (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'AND (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "AND (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0xb41faf90; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0xb71faf90; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0xb69faf90; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0xb65faf90; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: UADD8 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'UADD8' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "UADD8") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0xb63faf90; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SHADD8 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SHADD8' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SHADD8") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0xb60faf90; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 11 + const uint32_t corrupt_inst = 0xb61fa790; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 10 + const uint32_t corrupt_inst = 0xb61fab90; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 9 + const uint32_t corrupt_inst = 0xb61fad90; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 8 + const uint32_t corrupt_inst = 0xb61fae90; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0xb61faf10; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SADD16 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SADD16' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SADD16") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0xb61fafd0; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0xb61fafb0; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0xb61faf80; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDR (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDR (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDR (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_SADD16) { + // 1. Positive Verification: Ensures "SADD16" is correctly identified. + const uint32_t valid_inst = 0x56115f13; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for SADD16: 0x56115f13"; + EXPECT_STREQ(info->name, "SADD16") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x5e115f13; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MRC + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MRC' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MRC") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x52115f13; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: AND (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'AND (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "AND (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x54115f13; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x57115f13; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0x56915f13; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x56515f13; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: UADD16 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'UADD16' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "UADD16") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x56315f13; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SHADD16 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SHADD16' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SHADD16") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0x56015f13; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 11 + const uint32_t corrupt_inst = 0x56115713; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 10 + const uint32_t corrupt_inst = 0x56115b13; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 9 + const uint32_t corrupt_inst = 0x56115d13; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 8 + const uint32_t corrupt_inst = 0x56115e13; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0x56115f93; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SADD8 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SADD8' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SADD8") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0x56115f53; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SSAX + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SSAX' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SSAX") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0x56115f33; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SASX + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SASX' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SASX") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x56115f03; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDR (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDR (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDR (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_SASX) { + // 1. Positive Verification: Ensures "SASX" is correctly identified. + const uint32_t valid_inst = 0x561d3f3e; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for SASX: 0x561d3f3e"; + EXPECT_STREQ(info->name, "SASX") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x5e1d3f3e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MRC + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MRC' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MRC") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x521d3f3e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: AND (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'AND (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "AND (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x541d3f3e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x571d3f3e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0x569d3f3e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x565d3f3e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: UASX + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'UASX' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "UASX") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x563d3f3e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SHASX + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SHASX' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SHASX") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0x560d3f3e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 11 + const uint32_t corrupt_inst = 0x561d373e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 10 + const uint32_t corrupt_inst = 0x561d3b3e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 9 + const uint32_t corrupt_inst = 0x561d3d3e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 8 + const uint32_t corrupt_inst = 0x561d3e3e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0x561d3fbe; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0x561d3f7e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SSUB16 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SSUB16' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SSUB16") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0x561d3f1e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SADD16 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SADD16' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SADD16") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x561d3f2e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDR (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDR (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDR (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_SSAX) { + // 1. Positive Verification: Ensures "SSAX" is correctly identified. + const uint32_t valid_inst = 0xd61bbf5b; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for SSAX: 0xd61bbf5b"; + EXPECT_STREQ(info->name, "SSAX") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0xde1bbf5b; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MRC + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MRC' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MRC") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0xd21bbf5b; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: AND (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'AND (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "AND (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0xd41bbf5b; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0xd71bbf5b; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0xd69bbf5b; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0xd65bbf5b; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: USAX + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'USAX' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "USAX") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0xd63bbf5b; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SHSAX + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SHSAX' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SHSAX") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0xd60bbf5b; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 11 + const uint32_t corrupt_inst = 0xd61bb75b; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 10 + const uint32_t corrupt_inst = 0xd61bbb5b; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 9 + const uint32_t corrupt_inst = 0xd61bbd5b; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 8 + const uint32_t corrupt_inst = 0xd61bbe5b; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0xd61bbfdb; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0xd61bbf1b; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SADD16 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SADD16' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SADD16") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0xd61bbf7b; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SSUB16 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SSUB16' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SSUB16") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0xd61bbf4b; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDR (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDR (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDR (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_SSUB8) { + // 1. Positive Verification: Ensures "SSUB8" is correctly identified. + const uint32_t valid_inst = 0x8617dffa; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for SSUB8: 0x8617dffa"; + EXPECT_STREQ(info->name, "SSUB8") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x8e17dffa; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MRC + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MRC' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MRC") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x8217dffa; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: AND (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'AND (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "AND (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x8417dffa; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x8717dffa; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0x8697dffa; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x8657dffa; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: USUB8 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'USUB8' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "USUB8") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x8637dffa; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SHSUB8 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SHSUB8' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SHSUB8") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0x8607dffa; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 11 + const uint32_t corrupt_inst = 0x8617d7fa; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 10 + const uint32_t corrupt_inst = 0x8617dbfa; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 9 + const uint32_t corrupt_inst = 0x8617ddfa; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 8 + const uint32_t corrupt_inst = 0x8617defa; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0x8617df7a; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SSUB16 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SSUB16' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SSUB16") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0x8617dfba; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0x8617dfda; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x8617dfea; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDR (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDR (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDR (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_SSUB16) { + // 1. Positive Verification: Ensures "SSUB16" is correctly identified. + const uint32_t valid_inst = 0x56112f7f; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for SSUB16: 0x56112f7f"; + EXPECT_STREQ(info->name, "SSUB16") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x5e112f7f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MRC + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MRC' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MRC") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x52112f7f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: AND (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'AND (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "AND (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x54112f7f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x57112f7f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0x56912f7f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x56512f7f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: USUB16 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'USUB16' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "USUB16") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x56312f7f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SHSUB16 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SHSUB16' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SHSUB16") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0x56012f7f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 11 + const uint32_t corrupt_inst = 0x5611277f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 10 + const uint32_t corrupt_inst = 0x56112b7f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 9 + const uint32_t corrupt_inst = 0x56112d7f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 8 + const uint32_t corrupt_inst = 0x56112e7f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0x56112fff; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SSUB8 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SSUB8' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SSUB8") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0x56112f3f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SASX + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SASX' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SASX") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0x56112f5f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SSAX + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SSAX' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SSAX") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x56112f6f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDR (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDR (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDR (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_UADD8) { + // 1. Positive Verification: Ensures "UADD8" is correctly identified. + const uint32_t valid_inst = 0xd6580f97; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for UADD8: 0xd6580f97"; + EXPECT_STREQ(info->name, "UADD8") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0xde580f97; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MRC + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MRC' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MRC") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0xd2580f97; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SUB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SUB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SUB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0xd4580f97; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0xd7580f97; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0xd6d80f97; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0xd6180f97; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SADD8 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SADD8' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SADD8") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0xd6780f97; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: UHADD8 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'UHADD8' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "UHADD8") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0xd6480f97; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 11 + const uint32_t corrupt_inst = 0xd6580797; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 10 + const uint32_t corrupt_inst = 0xd6580b97; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 9 + const uint32_t corrupt_inst = 0xd6580d97; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 8 + const uint32_t corrupt_inst = 0xd6580e97; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0xd6580f17; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: UADD16 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'UADD16' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "UADD16") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0xd6580fd7; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0xd6580fb7; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0xd6580f87; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_UADD16) { + // 1. Positive Verification: Ensures "UADD16" is correctly identified. + const uint32_t valid_inst = 0x46581f1a; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for UADD16: 0x46581f1a"; + EXPECT_STREQ(info->name, "UADD16") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x4e581f1a; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MRC + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MRC' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MRC") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x42581f1a; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SUB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SUB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SUB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x44581f1a; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x47581f1a; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SMMLA + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SMMLA' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SMMLA") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0x46d81f1a; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x46181f1a; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SADD16 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SADD16' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SADD16") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x46781f1a; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: UHADD16 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'UHADD16' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "UHADD16") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0x46481f1a; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 11 + const uint32_t corrupt_inst = 0x4658171a; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 10 + const uint32_t corrupt_inst = 0x46581b1a; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 9 + const uint32_t corrupt_inst = 0x46581d1a; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 8 + const uint32_t corrupt_inst = 0x46581e1a; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0x46581f9a; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: UADD8 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'UADD8' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "UADD8") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0x46581f5a; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: USAX + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'USAX' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "USAX") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0x46581f3a; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: UASX + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'UASX' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "UASX") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x46581f0a; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_UASX) { + // 1. Positive Verification: Ensures "UASX" is correctly identified. + const uint32_t valid_inst = 0xe657cf34; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for UASX: 0xe657cf34"; + EXPECT_STREQ(info->name, "UASX") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0xee57cf34; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MRC + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MRC' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MRC") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0xe257cf34; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SUB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SUB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SUB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0xe457cf34; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0xe757cf34; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SMMLA + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SMMLA' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SMMLA") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0xe6d7cf34; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0xe617cf34; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SASX + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SASX' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SASX") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0xe677cf34; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: UHASX + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'UHASX' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "UHASX") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0xe647cf34; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 11 + const uint32_t corrupt_inst = 0xe657c734; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 10 + const uint32_t corrupt_inst = 0xe657cb34; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 9 + const uint32_t corrupt_inst = 0xe657cd34; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 8 + const uint32_t corrupt_inst = 0xe657ce34; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0xe657cfb4; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0xe657cf74; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: USUB16 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'USUB16' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "USUB16") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0xe657cf14; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: UADD16 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'UADD16' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "UADD16") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0xe657cf24; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_USAX) { + // 1. Positive Verification: Ensures "USAX" is correctly identified. + const uint32_t valid_inst = 0xb65caf56; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for USAX: 0xb65caf56"; + EXPECT_STREQ(info->name, "USAX") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0xbe5caf56; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MRC + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MRC' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MRC") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0xb25caf56; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SUB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SUB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SUB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0xb45caf56; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0xb75caf56; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0xb6dcaf56; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0xb61caf56; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SSAX + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SSAX' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SSAX") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0xb67caf56; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: UHSAX + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'UHSAX' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "UHSAX") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0xb64caf56; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 11 + const uint32_t corrupt_inst = 0xb65ca756; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 10 + const uint32_t corrupt_inst = 0xb65cab56; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 9 + const uint32_t corrupt_inst = 0xb65cad56; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 8 + const uint32_t corrupt_inst = 0xb65cae56; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0xb65cafd6; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0xb65caf16; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: UADD16 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'UADD16' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "UADD16") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0xb65caf76; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: USUB16 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'USUB16' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "USUB16") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0xb65caf46; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_USUB8) { + // 1. Positive Verification: Ensures "USUB8" is correctly identified. + const uint32_t valid_inst = 0x76575ff7; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for USUB8: 0x76575ff7"; + EXPECT_STREQ(info->name, "USUB8") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x7e575ff7; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MRC + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MRC' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MRC") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x72575ff7; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SUB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SUB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SUB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x74575ff7; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x77575ff7; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SMMLS + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SMMLS' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SMMLS") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0x76d75ff7; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x76175ff7; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SSUB8 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SSUB8' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SSUB8") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x76775ff7; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: UHSUB8 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'UHSUB8' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "UHSUB8") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0x76475ff7; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 11 + const uint32_t corrupt_inst = 0x765757f7; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 10 + const uint32_t corrupt_inst = 0x76575bf7; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 9 + const uint32_t corrupt_inst = 0x76575df7; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 8 + const uint32_t corrupt_inst = 0x76575ef7; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0x76575f77; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: USUB16 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'USUB16' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "USUB16") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0x76575fb7; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0x76575fd7; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x76575fe7; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_USUB16) { + // 1. Positive Verification: Ensures "USUB16" is correctly identified. + const uint32_t valid_inst = 0xb6546f77; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for USUB16: 0xb6546f77"; + EXPECT_STREQ(info->name, "USUB16") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0xbe546f77; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MRC + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MRC' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MRC") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0xb2546f77; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SUB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SUB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SUB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0xb4546f77; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0xb7546f77; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0xb6d46f77; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0xb6146f77; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SSUB16 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SSUB16' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SSUB16") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0xb6746f77; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: UHSUB16 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'UHSUB16' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "UHSUB16") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0xb6446f77; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 11 + const uint32_t corrupt_inst = 0xb6546777; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 10 + const uint32_t corrupt_inst = 0xb6546b77; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 9 + const uint32_t corrupt_inst = 0xb6546d77; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 8 + const uint32_t corrupt_inst = 0xb6546e77; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0xb6546ff7; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: USUB8 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'USUB8' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "USUB8") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0xb6546f37; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: UASX + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'UASX' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "UASX") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0xb6546f57; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: USAX + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'USAX' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "USAX") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0xb6546f67; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRB (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRB (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRB (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_QADD8) { + // 1. Positive Verification: Ensures "QADD8" is correctly identified. + const uint32_t valid_inst = 0xf6290f99; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for QADD8: 0xf6290f99"; + EXPECT_STREQ(info->name, "QADD8") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0xfe290f99; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MCR + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MCR' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MCR") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0xf2290f99; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: EOR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'EOR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "EOR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0xf4290f99; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRT (A1) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRT (A1)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRT (A1)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0xf7290f99; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0xf6a90f99; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SSAT + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SSAT' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SSAT") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0xf6690f99; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: UQADD8 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'UQADD8' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "UQADD8") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0xf6090f99; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0xf6390f99; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SHADD8 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SHADD8' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SHADD8") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 11 + const uint32_t corrupt_inst = 0xf6290799; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 10 + const uint32_t corrupt_inst = 0xf6290b99; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 9 + const uint32_t corrupt_inst = 0xf6290d99; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 8 + const uint32_t corrupt_inst = 0xf6290e99; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0xf6290f19; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: QADD16 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'QADD16' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "QADD16") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0xf6290fd9; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0xf6290fb9; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0xf6290f89; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRT (A2) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRT (A2)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRT (A2)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_QADD16) { + // 1. Positive Verification: Ensures "QADD16" is correctly identified. + const uint32_t valid_inst = 0x962acf12; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for QADD16: 0x962acf12"; + EXPECT_STREQ(info->name, "QADD16") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x9e2acf12; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MCR + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MCR' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MCR") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x922acf12; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: EOR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'EOR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "EOR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x942acf12; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRT (A1) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRT (A1)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRT (A1)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x972acf12; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0x96aacf12; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SSAT + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SSAT' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SSAT") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x966acf12; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: UQADD16 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'UQADD16' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "UQADD16") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x960acf12; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0x963acf12; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SHADD16 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SHADD16' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SHADD16") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 11 + const uint32_t corrupt_inst = 0x962ac712; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 10 + const uint32_t corrupt_inst = 0x962acb12; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 9 + const uint32_t corrupt_inst = 0x962acd12; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 8 + const uint32_t corrupt_inst = 0x962ace12; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0x962acf92; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: QADD8 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'QADD8' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "QADD8") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0x962acf52; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: QSAX + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'QSAX' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "QSAX") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0x962acf32; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: QASX + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'QASX' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "QASX") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x962acf02; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRT (A2) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRT (A2)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRT (A2)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_QASX) { + // 1. Positive Verification: Ensures "QASX" is correctly identified. + const uint32_t valid_inst = 0xf6214f3e; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for QASX: 0xf6214f3e"; + EXPECT_STREQ(info->name, "QASX") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0xfe214f3e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MCR + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MCR' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MCR") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0xf2214f3e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: EOR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'EOR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "EOR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0xf4214f3e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRT (A1) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRT (A1)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRT (A1)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0xf7214f3e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0xf6a14f3e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SSAT16 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SSAT16' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SSAT16") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0xf6614f3e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: UQASX + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'UQASX' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "UQASX") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0xf6014f3e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0xf6314f3e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SHASX + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SHASX' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SHASX") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 11 + const uint32_t corrupt_inst = 0xf621473e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 10 + const uint32_t corrupt_inst = 0xf6214b3e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 9 + const uint32_t corrupt_inst = 0xf6214d3e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 8 + const uint32_t corrupt_inst = 0xf6214e3e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0xf6214fbe; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0xf6214f7e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: QSUB16 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'QSUB16' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "QSUB16") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0xf6214f1e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: QADD16 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'QADD16' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "QADD16") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0xf6214f2e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRT (A2) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRT (A2)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRT (A2)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_QSAX) { + // 1. Positive Verification: Ensures "QSAX" is correctly identified. + const uint32_t valid_inst = 0xd62d8f5c; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for QSAX: 0xd62d8f5c"; + EXPECT_STREQ(info->name, "QSAX") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0xde2d8f5c; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MCR + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MCR' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MCR") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0xd22d8f5c; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: EOR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'EOR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "EOR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0xd42d8f5c; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRT (A1) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRT (A1)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRT (A1)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0xd72d8f5c; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0xd6ad8f5c; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SSAT + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SSAT' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SSAT") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0xd66d8f5c; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: UQSAX + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'UQSAX' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "UQSAX") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0xd60d8f5c; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0xd63d8f5c; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SHSAX + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SHSAX' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SHSAX") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 11 + const uint32_t corrupt_inst = 0xd62d875c; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 10 + const uint32_t corrupt_inst = 0xd62d8b5c; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 9 + const uint32_t corrupt_inst = 0xd62d8d5c; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 8 + const uint32_t corrupt_inst = 0xd62d8e5c; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0xd62d8fdc; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0xd62d8f1c; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: QADD16 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'QADD16' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "QADD16") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0xd62d8f7c; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: QSUB16 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'QSUB16' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "QSUB16") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0xd62d8f4c; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRT (A2) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRT (A2)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRT (A2)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_QSUB8) { + // 1. Positive Verification: Ensures "QSUB8" is correctly identified. + const uint32_t valid_inst = 0xb620bffe; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for QSUB8: 0xb620bffe"; + EXPECT_STREQ(info->name, "QSUB8") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0xbe20bffe; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MCR + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MCR' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MCR") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0xb220bffe; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: EOR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'EOR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "EOR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0xb420bffe; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRT (A1) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRT (A1)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRT (A1)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0xb720bffe; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0xb6a0bffe; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0xb660bffe; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: UQSUB8 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'UQSUB8' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "UQSUB8") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0xb600bffe; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0xb630bffe; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SHSUB8 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SHSUB8' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SHSUB8") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 11 + const uint32_t corrupt_inst = 0xb620b7fe; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 10 + const uint32_t corrupt_inst = 0xb620bbfe; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 9 + const uint32_t corrupt_inst = 0xb620bdfe; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 8 + const uint32_t corrupt_inst = 0xb620befe; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0xb620bf7e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: QSUB16 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'QSUB16' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "QSUB16") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0xb620bfbe; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0xb620bfde; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0xb620bfee; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRT (A2) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRT (A2)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRT (A2)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_QSUB16) { + // 1. Positive Verification: Ensures "QSUB16" is correctly identified. + const uint32_t valid_inst = 0xa62a2f77; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for QSUB16: 0xa62a2f77"; + EXPECT_STREQ(info->name, "QSUB16") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0xae2a2f77; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MCR + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MCR' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MCR") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0xa22a2f77; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: EOR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'EOR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "EOR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0xa42a2f77; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRT (A1) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRT (A1)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRT (A1)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0xa72a2f77; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0xa6aa2f77; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0xa66a2f77; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: UQSUB16 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'UQSUB16' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "UQSUB16") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0xa60a2f77; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0xa63a2f77; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SHSUB16 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SHSUB16' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SHSUB16") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 11 + const uint32_t corrupt_inst = 0xa62a2777; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 10 + const uint32_t corrupt_inst = 0xa62a2b77; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 9 + const uint32_t corrupt_inst = 0xa62a2d77; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 8 + const uint32_t corrupt_inst = 0xa62a2e77; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0xa62a2ff7; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: QSUB8 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'QSUB8' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "QSUB8") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0xa62a2f37; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: QASX + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'QASX' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "QASX") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0xa62a2f57; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: QSAX + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'QSAX' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "QSAX") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0xa62a2f67; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRT (A2) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRT (A2)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRT (A2)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_UQADD8) { + // 1. Positive Verification: Ensures "UQADD8" is correctly identified. + const uint32_t valid_inst = 0xb6690f97; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for UQADD8: 0xb6690f97"; + EXPECT_STREQ(info->name, "UQADD8") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0xbe690f97; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MCR + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MCR' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MCR") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0xb2690f97; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: RSB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'RSB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "RSB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0xb4690f97; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRBT (A1) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRBT (A1)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRBT (A1)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0xb7690f97; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0xb6e90f97; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: USAT + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'USAT' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "USAT") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0xb6290f97; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: QADD8 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'QADD8' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "QADD8") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0xb6490f97; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0xb6790f97; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: UHADD8 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'UHADD8' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "UHADD8") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 11 + const uint32_t corrupt_inst = 0xb6690797; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 10 + const uint32_t corrupt_inst = 0xb6690b97; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 9 + const uint32_t corrupt_inst = 0xb6690d97; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 8 + const uint32_t corrupt_inst = 0xb6690e97; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0xb6690f17; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: UQADD16 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'UQADD16' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "UQADD16") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0xb6690fd7; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0xb6690fb7; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0xb6690f87; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRBT (A2) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRBT (A2)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRBT (A2)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_UQADD16) { + // 1. Positive Verification: Ensures "UQADD16" is correctly identified. + const uint32_t valid_inst = 0x16649f1f; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for UQADD16: 0x16649f1f"; + EXPECT_STREQ(info->name, "UQADD16") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x1e649f1f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MCR + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MCR' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MCR") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x12649f1f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: RSB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'RSB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "RSB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x14649f1f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRBT (A1) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRBT (A1)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRBT (A1)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x17649f1f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0x16e49f1f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: USAT + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'USAT' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "USAT") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x16249f1f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: QADD16 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'QADD16' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "QADD16") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x16449f1f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0x16749f1f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: UHADD16 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'UHADD16' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "UHADD16") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 11 + const uint32_t corrupt_inst = 0x1664971f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 10 + const uint32_t corrupt_inst = 0x16649b1f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 9 + const uint32_t corrupt_inst = 0x16649d1f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 8 + const uint32_t corrupt_inst = 0x16649e1f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0x16649f9f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: UQADD8 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'UQADD8' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "UQADD8") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0x16649f5f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: UQSAX + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'UQSAX' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "UQSAX") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0x16649f3f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: UQASX + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'UQASX' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "UQASX") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x16649f0f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRBT (A2) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRBT (A2)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRBT (A2)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_UQASX) { + // 1. Positive Verification: Ensures "UQASX" is correctly identified. + const uint32_t valid_inst = 0x366c2f3f; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for UQASX: 0x366c2f3f"; + EXPECT_STREQ(info->name, "UQASX") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x3e6c2f3f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MCR + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MCR' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MCR") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x326c2f3f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: RSB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'RSB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "RSB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x346c2f3f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRBT (A1) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRBT (A1)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRBT (A1)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x376c2f3f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0x36ec2f3f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: USAT16 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'USAT16' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "USAT16") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x362c2f3f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: QASX + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'QASX' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "QASX") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x364c2f3f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0x367c2f3f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: UHASX + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'UHASX' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "UHASX") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 11 + const uint32_t corrupt_inst = 0x366c273f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 10 + const uint32_t corrupt_inst = 0x366c2b3f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 9 + const uint32_t corrupt_inst = 0x366c2d3f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 8 + const uint32_t corrupt_inst = 0x366c2e3f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0x366c2fbf; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0x366c2f7f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: UQSUB16 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'UQSUB16' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "UQSUB16") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0x366c2f1f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: UQADD16 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'UQADD16' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "UQADD16") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x366c2f2f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRBT (A2) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRBT (A2)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRBT (A2)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_UQSAX) { + // 1. Positive Verification: Ensures "UQSAX" is correctly identified. + const uint32_t valid_inst = 0x9663cf5f; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for UQSAX: 0x9663cf5f"; + EXPECT_STREQ(info->name, "UQSAX") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x9e63cf5f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MCR + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MCR' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MCR") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x9263cf5f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: RSB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'RSB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "RSB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x9463cf5f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRBT (A1) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRBT (A1)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRBT (A1)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x9763cf5f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0x96e3cf5f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: USAT + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'USAT' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "USAT") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x9623cf5f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: QSAX + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'QSAX' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "QSAX") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x9643cf5f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0x9673cf5f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: UHSAX + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'UHSAX' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "UHSAX") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 11 + const uint32_t corrupt_inst = 0x9663c75f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 10 + const uint32_t corrupt_inst = 0x9663cb5f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 9 + const uint32_t corrupt_inst = 0x9663cd5f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 8 + const uint32_t corrupt_inst = 0x9663ce5f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0x9663cfdf; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0x9663cf1f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: UQADD16 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'UQADD16' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "UQADD16") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0x9663cf7f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: UQSUB16 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'UQSUB16' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "UQSUB16") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x9663cf4f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRBT (A2) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRBT (A2)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRBT (A2)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_UQSUB8) { + // 1. Positive Verification: Ensures "UQSUB8" is correctly identified. + const uint32_t valid_inst = 0xf66fcffe; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for UQSUB8: 0xf66fcffe"; + EXPECT_STREQ(info->name, "UQSUB8") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0xfe6fcffe; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MCR + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MCR' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MCR") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0xf26fcffe; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: RSB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'RSB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "RSB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0xf46fcffe; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRBT (A1) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRBT (A1)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRBT (A1)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0xf76fcffe; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0xf6efcffe; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0xf62fcffe; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: QSUB8 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'QSUB8' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "QSUB8") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0xf64fcffe; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0xf67fcffe; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: UHSUB8 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'UHSUB8' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "UHSUB8") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 11 + const uint32_t corrupt_inst = 0xf66fc7fe; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 10 + const uint32_t corrupt_inst = 0xf66fcbfe; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 9 + const uint32_t corrupt_inst = 0xf66fcdfe; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 8 + const uint32_t corrupt_inst = 0xf66fcefe; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0xf66fcf7e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: UQSUB16 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'UQSUB16' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "UQSUB16") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0xf66fcfbe; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0xf66fcfde; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0xf66fcfee; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRBT (A2) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRBT (A2)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRBT (A2)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_UQSUB16) { + // 1. Positive Verification: Ensures "UQSUB16" is correctly identified. + const uint32_t valid_inst = 0xa66b9f78; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for UQSUB16: 0xa66b9f78"; + EXPECT_STREQ(info->name, "UQSUB16") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0xae6b9f78; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MCR + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MCR' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MCR") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0xa26b9f78; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: RSB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'RSB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "RSB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0xa46b9f78; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRBT (A1) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRBT (A1)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRBT (A1)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0xa76b9f78; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0xa6eb9f78; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0xa62b9f78; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: QSUB16 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'QSUB16' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "QSUB16") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0xa64b9f78; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0xa67b9f78; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: UHSUB16 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'UHSUB16' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "UHSUB16") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 11 + const uint32_t corrupt_inst = 0xa66b9778; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 10 + const uint32_t corrupt_inst = 0xa66b9b78; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 9 + const uint32_t corrupt_inst = 0xa66b9d78; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 8 + const uint32_t corrupt_inst = 0xa66b9e78; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0xa66b9ff8; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: UQSUB8 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'UQSUB8' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "UQSUB8") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0xa66b9f38; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: UQASX + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'UQASX' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "UQASX") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0xa66b9f58; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: UQSAX + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'UQSAX' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "UQSAX") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0xa66b9f68; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRBT (A2) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRBT (A2)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRBT (A2)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_SHADD8) { + // 1. Positive Verification: Ensures "SHADD8" is correctly identified. + const uint32_t valid_inst = 0x7630bf9e; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for SHADD8: 0x7630bf9e"; + EXPECT_STREQ(info->name, "SHADD8") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x7e30bf9e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MRC + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MRC' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MRC") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x7230bf9e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: EOR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'EOR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "EOR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x7430bf9e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRT (A1) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRT (A1)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRT (A1)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x7730bf9e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0x76b0bf9e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SSAT + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SSAT' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SSAT") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x7670bf9e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: UHADD8 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'UHADD8' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "UHADD8") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x7610bf9e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SADD8 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SADD8' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SADD8") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0x7620bf9e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: QADD8 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'QADD8' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "QADD8") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 11 + const uint32_t corrupt_inst = 0x7630b79e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 10 + const uint32_t corrupt_inst = 0x7630bb9e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 9 + const uint32_t corrupt_inst = 0x7630bd9e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 8 + const uint32_t corrupt_inst = 0x7630be9e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0x7630bf1e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SHADD16 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SHADD16' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SHADD16") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0x7630bfde; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0x7630bfbe; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x7630bf8e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRT (A2) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRT (A2)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRT (A2)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_SHADD16) { + // 1. Positive Verification: Ensures "SHADD16" is correctly identified. + const uint32_t valid_inst = 0xb63f0f14; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for SHADD16: 0xb63f0f14"; + EXPECT_STREQ(info->name, "SHADD16") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0xbe3f0f14; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MRC + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MRC' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MRC") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0xb23f0f14; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: EOR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'EOR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "EOR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0xb43f0f14; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRT (A1) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRT (A1)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRT (A1)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0xb73f0f14; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0xb6bf0f14; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SSAT + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SSAT' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SSAT") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0xb67f0f14; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: UHADD16 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'UHADD16' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "UHADD16") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0xb61f0f14; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SADD16 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SADD16' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SADD16") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0xb62f0f14; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: QADD16 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'QADD16' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "QADD16") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 11 + const uint32_t corrupt_inst = 0xb63f0714; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 10 + const uint32_t corrupt_inst = 0xb63f0b14; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 9 + const uint32_t corrupt_inst = 0xb63f0d14; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 8 + const uint32_t corrupt_inst = 0xb63f0e14; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0xb63f0f94; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SHADD8 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SHADD8' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SHADD8") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0xb63f0f54; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SHSAX + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SHSAX' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SHSAX") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0xb63f0f34; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SHASX + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SHASX' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SHASX") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0xb63f0f04; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRT (A2) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRT (A2)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRT (A2)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_SHASX) { + // 1. Positive Verification: Ensures "SHASX" is correctly identified. + const uint32_t valid_inst = 0x36358f34; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for SHASX: 0x36358f34"; + EXPECT_STREQ(info->name, "SHASX") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x3e358f34; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MRC + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MRC' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MRC") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x32358f34; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: EOR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'EOR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "EOR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x34358f34; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRT (A1) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRT (A1)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRT (A1)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x37358f34; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0x36b58f34; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x36758f34; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: UHASX + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'UHASX' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "UHASX") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x36158f34; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SASX + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SASX' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SASX") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0x36258f34; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: QASX + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'QASX' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "QASX") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 11 + const uint32_t corrupt_inst = 0x36358734; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 10 + const uint32_t corrupt_inst = 0x36358b34; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 9 + const uint32_t corrupt_inst = 0x36358d34; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 8 + const uint32_t corrupt_inst = 0x36358e34; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0x36358fb4; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0x36358f74; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SHSUB16 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SHSUB16' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SHSUB16") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0x36358f14; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SHADD16 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SHADD16' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SHADD16") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x36358f24; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRT (A2) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRT (A2)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRT (A2)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_SHSAX) { + // 1. Positive Verification: Ensures "SHSAX" is correctly identified. + const uint32_t valid_inst = 0x56327f5e; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for SHSAX: 0x56327f5e"; + EXPECT_STREQ(info->name, "SHSAX") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x5e327f5e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MRC + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MRC' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MRC") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x52327f5e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: EOR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'EOR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "EOR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x54327f5e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRT (A1) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRT (A1)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRT (A1)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x57327f5e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0x56b27f5e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SSAT + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SSAT' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SSAT") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x56727f5e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: UHSAX + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'UHSAX' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "UHSAX") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x56127f5e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SSAX + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SSAX' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SSAX") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0x56227f5e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: QSAX + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'QSAX' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "QSAX") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 11 + const uint32_t corrupt_inst = 0x5632775e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 10 + const uint32_t corrupt_inst = 0x56327b5e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 9 + const uint32_t corrupt_inst = 0x56327d5e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 8 + const uint32_t corrupt_inst = 0x56327e5e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0x56327fde; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0x56327f1e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SHADD16 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SHADD16' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SHADD16") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0x56327f7e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SHSUB16 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SHSUB16' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SHSUB16") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x56327f4e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRT (A2) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRT (A2)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRT (A2)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_SHSUB8) { + // 1. Positive Verification: Ensures "SHSUB8" is correctly identified. + const uint32_t valid_inst = 0x2631fff3; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for SHSUB8: 0x2631fff3"; + EXPECT_STREQ(info->name, "SHSUB8") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x2e31fff3; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MRC + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MRC' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MRC") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x2231fff3; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: EOR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'EOR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "EOR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x2431fff3; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRT (A1) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRT (A1)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRT (A1)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x2731fff3; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0x26b1fff3; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x2671fff3; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: UHSUB8 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'UHSUB8' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "UHSUB8") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x2611fff3; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SSUB8 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SSUB8' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SSUB8") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0x2621fff3; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: QSUB8 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'QSUB8' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "QSUB8") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 11 + const uint32_t corrupt_inst = 0x2631f7f3; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 10 + const uint32_t corrupt_inst = 0x2631fbf3; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 9 + const uint32_t corrupt_inst = 0x2631fdf3; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 8 + const uint32_t corrupt_inst = 0x2631fef3; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0x2631ff73; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SHSUB16 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SHSUB16' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SHSUB16") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0x2631ffb3; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0x2631ffd3; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x2631ffe3; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRT (A2) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRT (A2)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRT (A2)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_SHSUB16) { + // 1. Positive Verification: Ensures "SHSUB16" is correctly identified. + const uint32_t valid_inst = 0xb63dcf7d; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for SHSUB16: 0xb63dcf7d"; + EXPECT_STREQ(info->name, "SHSUB16") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0xbe3dcf7d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MRC + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MRC' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MRC") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0xb23dcf7d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: EOR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'EOR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "EOR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0xb43dcf7d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRT (A1) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRT (A1)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRT (A1)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0xb73dcf7d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0xb6bdcf7d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0xb67dcf7d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: UHSUB16 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'UHSUB16' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "UHSUB16") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0xb61dcf7d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SSUB16 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SSUB16' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SSUB16") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0xb62dcf7d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: QSUB16 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'QSUB16' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "QSUB16") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 11 + const uint32_t corrupt_inst = 0xb63dc77d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 10 + const uint32_t corrupt_inst = 0xb63dcb7d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 9 + const uint32_t corrupt_inst = 0xb63dcd7d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 8 + const uint32_t corrupt_inst = 0xb63dce7d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0xb63dcffd; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SHSUB8 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SHSUB8' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SHSUB8") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0xb63dcf3d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SHASX + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SHASX' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SHASX") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0xb63dcf5d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SHSAX + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SHSAX' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SHSAX") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0xb63dcf6d; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRT (A2) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRT (A2)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRT (A2)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_UHADD8) { + // 1. Positive Verification: Ensures "UHADD8" is correctly identified. + const uint32_t valid_inst = 0x96742f99; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for UHADD8: 0x96742f99"; + EXPECT_STREQ(info->name, "UHADD8") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x9e742f99; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MRC + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MRC' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MRC") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x92742f99; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: RSB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'RSB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "RSB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x94742f99; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRBT (A1) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRBT (A1)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRBT (A1)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x97742f99; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0x96f42f99; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: USAT + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'USAT' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "USAT") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x96342f99; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SHADD8 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SHADD8' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SHADD8") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x96542f99; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: UADD8 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'UADD8' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "UADD8") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0x96642f99; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: UQADD8 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'UQADD8' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "UQADD8") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 11 + const uint32_t corrupt_inst = 0x96742799; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 10 + const uint32_t corrupt_inst = 0x96742b99; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 9 + const uint32_t corrupt_inst = 0x96742d99; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 8 + const uint32_t corrupt_inst = 0x96742e99; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0x96742f19; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: UHADD16 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'UHADD16' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "UHADD16") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0x96742fd9; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0x96742fb9; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x96742f89; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRBT (A2) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRBT (A2)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRBT (A2)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_UHADD16) { + // 1. Positive Verification: Ensures "UHADD16" is correctly identified. + const uint32_t valid_inst = 0xe674bf15; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for UHADD16: 0xe674bf15"; + EXPECT_STREQ(info->name, "UHADD16") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0xee74bf15; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MRC + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MRC' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MRC") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0xe274bf15; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: RSB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'RSB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "RSB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0xe474bf15; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRBT (A1) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRBT (A1)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRBT (A1)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0xe774bf15; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0xe6f4bf15; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: USAT + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'USAT' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "USAT") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0xe634bf15; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SHADD16 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SHADD16' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SHADD16") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0xe654bf15; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: UADD16 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'UADD16' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "UADD16") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0xe664bf15; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: UQADD16 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'UQADD16' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "UQADD16") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 11 + const uint32_t corrupt_inst = 0xe674b715; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 10 + const uint32_t corrupt_inst = 0xe674bb15; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 9 + const uint32_t corrupt_inst = 0xe674bd15; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 8 + const uint32_t corrupt_inst = 0xe674be15; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0xe674bf95; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: UHADD8 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'UHADD8' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "UHADD8") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0xe674bf55; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: UHSAX + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'UHSAX' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "UHSAX") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0xe674bf35; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: UHASX + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'UHASX' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "UHASX") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0xe674bf05; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRBT (A2) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRBT (A2)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRBT (A2)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_UHASX) { + // 1. Positive Verification: Ensures "UHASX" is correctly identified. + const uint32_t valid_inst = 0x167f0f37; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for UHASX: 0x167f0f37"; + EXPECT_STREQ(info->name, "UHASX") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x1e7f0f37; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MRC + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MRC' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MRC") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x127f0f37; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: RSB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'RSB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "RSB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x147f0f37; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRBT (A1) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRBT (A1)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRBT (A1)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x177f0f37; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0x16ff0f37; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: RBIT + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'RBIT' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "RBIT") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x163f0f37; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SHASX + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SHASX' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SHASX") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x165f0f37; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: UASX + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'UASX' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "UASX") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0x166f0f37; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: UQASX + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'UQASX' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "UQASX") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 11 + const uint32_t corrupt_inst = 0x167f0737; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 10 + const uint32_t corrupt_inst = 0x167f0b37; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 9 + const uint32_t corrupt_inst = 0x167f0d37; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 8 + const uint32_t corrupt_inst = 0x167f0e37; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0x167f0fb7; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0x167f0f77; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: UHSUB16 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'UHSUB16' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "UHSUB16") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0x167f0f17; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: UHADD16 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'UHADD16' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "UHADD16") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x167f0f27; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRBT (A2) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRBT (A2)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRBT (A2)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_UHSAX) { + // 1. Positive Verification: Ensures "UHSAX" is correctly identified. + const uint32_t valid_inst = 0x8671cf5f; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for UHSAX: 0x8671cf5f"; + EXPECT_STREQ(info->name, "UHSAX") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x8e71cf5f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MRC + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MRC' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MRC") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x8271cf5f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: RSB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'RSB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "RSB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x8471cf5f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRBT (A1) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRBT (A1)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRBT (A1)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x8771cf5f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0x86f1cf5f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: USAT + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'USAT' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "USAT") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x8631cf5f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SHSAX + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SHSAX' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SHSAX") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x8651cf5f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: USAX + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'USAX' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "USAX") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0x8661cf5f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: UQSAX + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'UQSAX' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "UQSAX") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 11 + const uint32_t corrupt_inst = 0x8671c75f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 10 + const uint32_t corrupt_inst = 0x8671cb5f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 9 + const uint32_t corrupt_inst = 0x8671cd5f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 8 + const uint32_t corrupt_inst = 0x8671ce5f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0x8671cfdf; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0x8671cf1f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: UHADD16 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'UHADD16' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "UHADD16") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0x8671cf7f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: UHSUB16 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'UHSUB16' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "UHSUB16") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x8671cf4f; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRBT (A2) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRBT (A2)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRBT (A2)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_UHSUB8) { + // 1. Positive Verification: Ensures "UHSUB8" is correctly identified. + const uint32_t valid_inst = 0x0678dff3; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for UHSUB8: 0x678dff3"; + EXPECT_STREQ(info->name, "UHSUB8") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x0e78dff3; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MRC + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MRC' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MRC") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x0278dff3; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: RSB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'RSB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "RSB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x0478dff3; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRBT (A1) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRBT (A1)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRBT (A1)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x0778dff3; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0x06f8dff3; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x0638dff3; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SHSUB8 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SHSUB8' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SHSUB8") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x0658dff3; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: USUB8 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'USUB8' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "USUB8") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0x0668dff3; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: UQSUB8 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'UQSUB8' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "UQSUB8") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 11 + const uint32_t corrupt_inst = 0x0678d7f3; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 10 + const uint32_t corrupt_inst = 0x0678dbf3; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 9 + const uint32_t corrupt_inst = 0x0678ddf3; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 8 + const uint32_t corrupt_inst = 0x0678def3; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0x0678df73; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: UHSUB16 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'UHSUB16' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "UHSUB16") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0x0678dfb3; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0x0678dfd3; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x0678dfe3; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRBT (A2) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRBT (A2)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRBT (A2)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_UHSUB16) { + // 1. Positive Verification: Ensures "UHSUB16" is correctly identified. + const uint32_t valid_inst = 0xc6768f7b; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for UHSUB16: 0xc6768f7b"; + EXPECT_STREQ(info->name, "UHSUB16") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0xce768f7b; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MRC + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MRC' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MRC") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0xc2768f7b; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: RSB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'RSB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "RSB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0xc4768f7b; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRBT (A1) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRBT (A1)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRBT (A1)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0xc7768f7b; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0xc6f68f7b; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0xc6368f7b; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SHSUB16 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SHSUB16' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SHSUB16") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0xc6568f7b; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: USUB16 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'USUB16' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "USUB16") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0xc6668f7b; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: UQSUB16 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'UQSUB16' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "UQSUB16") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 11 + const uint32_t corrupt_inst = 0xc676877b; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 10 + const uint32_t corrupt_inst = 0xc6768b7b; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 9 + const uint32_t corrupt_inst = 0xc6768d7b; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 8 + const uint32_t corrupt_inst = 0xc6768e7b; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0xc6768ffb; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: UHSUB8 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'UHSUB8' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "UHSUB8") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0xc6768f3b; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: UHASX + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'UHASX' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "UHASX") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0xc6768f5b; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: UHSAX + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'UHSAX' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "UHSAX") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0xc6768f6b; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRBT (A2) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRBT (A2)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRBT (A2)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_QADD) { + // 1. Positive Verification: Ensures "QADD" is correctly identified. + const uint32_t valid_inst = 0x1108205a; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for QADD: 0x1108205a"; + EXPECT_STREQ(info->name, "QADD") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x1908205a; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STMDB + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STMDB' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STMDB") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x1508205a; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x1308205a; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MOVW + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MOVW' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MOVW") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x1008205a; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: AND (rsr) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'AND (rsr)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "AND (rsr)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0x1188205a; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: ORR (rsr) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'ORR (rsr)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "ORR (rsr)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x1148205a; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: QDADD + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'QDADD' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "QDADD") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x1128205a; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: QSUB + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'QSUB' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "QSUB") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0x1118205a; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 11 + const uint32_t corrupt_inst = 0x1108285a; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 10 + const uint32_t corrupt_inst = 0x1108245a; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 9 + const uint32_t corrupt_inst = 0x1108225a; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 8 + const uint32_t corrupt_inst = 0x1108215a; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0x110820da; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRD (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRD (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRD (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0x1108201a; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0x1108207a; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x1108204a; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: CRC32 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'CRC32' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "CRC32") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_QSUB) { + // 1. Positive Verification: Ensures "QSUB" is correctly identified. + const uint32_t valid_inst = 0x51224052; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for QSUB: 0x51224052"; + EXPECT_STREQ(info->name, "QSUB") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x59224052; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STMDB + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STMDB' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STMDB") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x55224052; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x53224052; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x50224052; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: EOR (rsr) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'EOR (rsr)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "EOR (rsr)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0x51a24052; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x51624052; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: QDSUB + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'QDSUB' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "QDSUB") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x51024052; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: QADD + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'QADD' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "QADD") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0x51324052; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 11 + const uint32_t corrupt_inst = 0x51224852; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 10 + const uint32_t corrupt_inst = 0x51224452; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 9 + const uint32_t corrupt_inst = 0x51224252; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 8 + const uint32_t corrupt_inst = 0x51224152; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0x512240d2; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRD (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRD (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRD (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0x51224012; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0x51224072; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: BKPT + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'BKPT' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "BKPT") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x51224042; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: CRC32 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'CRC32' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "CRC32") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_QDADD) { + // 1. Positive Verification: Ensures "QDADD" is correctly identified. + const uint32_t valid_inst = 0xf14ef051; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for QDADD: 0xf14ef051"; + EXPECT_STREQ(info->name, "QDADD") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0xf94ef051; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STM (usr reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STM (usr reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STM (usr reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0xf54ef051; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0xf34ef051; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MOVT + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MOVT' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MOVT") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0xf04ef051; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SUB (rsr) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SUB (rsr)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SUB (rsr)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0xf1cef051; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: BIC (rsr) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'BIC (rsr)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "BIC (rsr)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0xf10ef051; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: QADD + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'QADD' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "QADD") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0xf16ef051; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: QDSUB + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'QDSUB' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "QDSUB") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0xf15ef051; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 11 + const uint32_t corrupt_inst = 0xf14ef851; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 10 + const uint32_t corrupt_inst = 0xf14ef451; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 9 + const uint32_t corrupt_inst = 0xf14ef251; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 8 + const uint32_t corrupt_inst = 0xf14ef151; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0xf14ef0d1; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRD (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRD (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRD (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0xf14ef011; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0xf14ef071; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0xf14ef041; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: CRC32 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'CRC32' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "CRC32") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_QDSUB) { + // 1. Positive Verification: Ensures "QDSUB" is correctly identified. + const uint32_t valid_inst = 0x916c805e; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for QDSUB: 0x916c805e"; + EXPECT_STREQ(info->name, "QDSUB") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x996c805e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x956c805e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STRB (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STRB (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STRB (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x936c805e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x906c805e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: RSB (rsr) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'RSB (rsr)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "RSB (rsr)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0x91ec805e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x912c805e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: QSUB + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'QSUB' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "QSUB") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x914c805e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: QDADD + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'QDADD' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "QDADD") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0x917c805e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 11 + const uint32_t corrupt_inst = 0x916c885e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 10 + const uint32_t corrupt_inst = 0x916c845e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 9 + const uint32_t corrupt_inst = 0x916c825e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 8 + const uint32_t corrupt_inst = 0x916c815e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0x916c80de; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: LDRD (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'LDRD (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "LDRD (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0x916c801e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0x916c807e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x916c804e; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: CRC32 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'CRC32' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "CRC32") << "Safety Violation: Incorrect decode on single-bit corruption."; + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_MRS) { + // 1. Positive Verification: Ensures "MRS" is correctly identified. + const uint32_t valid_inst = 0xa10f7000; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for MRS: 0xa10f7000"; + EXPECT_STREQ(info->name, "MRS") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0xa90f7000; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STMDB + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STMDB' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STMDB") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0xa50f7000; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0xa30f7000; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MOVW + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MOVW' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MOVW") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0xa00f7000; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: AND (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'AND (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "AND (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0xa18f7000; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: ORR (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'ORR (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "ORR (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0xa14f7000; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0xa12f7000; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0xa11f7000; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 19 + const uint32_t corrupt_inst = 0xa1077000; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 18 + const uint32_t corrupt_inst = 0xa10b7000; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 17 + const uint32_t corrupt_inst = 0xa10d7000; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 16 + const uint32_t corrupt_inst = 0xa10e7000; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 11 + const uint32_t corrupt_inst = 0xa10f7800; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 10 + const uint32_t corrupt_inst = 0xa10f7400; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 9 + const uint32_t corrupt_inst = 0xa10f7200; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 8 + const uint32_t corrupt_inst = 0xa10f7100; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0xa10f7080; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SMLAXY + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SMLAXY' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SMLAXY") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0xa10f7040; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: CRC32 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'CRC32' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "CRC32") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0xa10f7020; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0xa10f7010; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 3 + const uint32_t corrupt_inst = 0xa10f7008; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 2 + const uint32_t corrupt_inst = 0xa10f7004; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 1 + const uint32_t corrupt_inst = 0xa10f7002; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 0 + const uint32_t corrupt_inst = 0xa10f7001; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_MSR_imm) { + // 1. Positive Verification: Ensures "MSR (imm)" is correctly identified. + const uint32_t valid_inst = 0x6323f3bc; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for MSR (imm): 0x6323f3bc"; + EXPECT_STREQ(info->name, "MSR (imm)") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x6b23f3bc; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: BL + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'BL' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "BL") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x6723f3bc; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x6123f3bc; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x6223f3bc; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: EOR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'EOR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "EOR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0x63a3f3bc; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x6363f3bc; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x6303f3bc; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MOVW + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MOVW' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MOVW") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0x6333f3bc; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 15 + const uint32_t corrupt_inst = 0x632373bc; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 14 + const uint32_t corrupt_inst = 0x6323b3bc; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 13 + const uint32_t corrupt_inst = 0x6323d3bc; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 12 + const uint32_t corrupt_inst = 0x6323e3bc; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } +} + +TEST_F(Arm32DecoderGeneratedTest, Verify_MSR_reg) { + // 1. Positive Verification: Ensures "MSR (reg)" is correctly identified. + const uint32_t valid_inst = 0x5123f003; + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(valid_inst); + + ASSERT_NE(info, nullptr) << "Failed to decode known valid pattern for MSR (reg): 0x5123f003"; + EXPECT_STREQ(info->name, "MSR (reg)") << "Decoded as the wrong instruction variant."; + EXPECT_EQ((valid_inst & info->mask), info->expected) << "Mask/Expected mismatch on positive test."; + + // 2. Negative Verification: Flip each fixed bit to ensure correct alternative decoding or rejection. + { + // Test case: Flipping fixed bit 27 + const uint32_t corrupt_inst = 0x5923f003; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STMDB + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STMDB' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STMDB") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 26 + const uint32_t corrupt_inst = 0x5523f003; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: STR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'STR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "STR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 25 + const uint32_t corrupt_inst = 0x5323f003; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: MSR (imm) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'MSR (imm)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "MSR (imm)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 24 + const uint32_t corrupt_inst = 0x5023f003; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: EOR (reg) + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'EOR (reg)' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "EOR (reg)") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 23 + const uint32_t corrupt_inst = 0x51a3f003; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 22 + const uint32_t corrupt_inst = 0x5163f003; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 21 + const uint32_t corrupt_inst = 0x5103f003; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 20 + const uint32_t corrupt_inst = 0x5133f003; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 15 + const uint32_t corrupt_inst = 0x51237003; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 14 + const uint32_t corrupt_inst = 0x5123b003; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 13 + const uint32_t corrupt_inst = 0x5123d003; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 12 + const uint32_t corrupt_inst = 0x5123e003; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 11 + const uint32_t corrupt_inst = 0x5123f803; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 10 + const uint32_t corrupt_inst = 0x5123f403; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 9 + const uint32_t corrupt_inst = 0x5123f203; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 8 + const uint32_t corrupt_inst = 0x5123f103; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 7 + const uint32_t corrupt_inst = 0x5123f083; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: SMLAWY + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'SMLAWY' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "SMLAWY") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 6 + const uint32_t corrupt_inst = 0x5123f043; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts this should decode as: CRC32 + ASSERT_NE(neg_info, nullptr) << "Safety Violation: Python Oracle predicted 'CRC32' but C++ decoder returned null"; + EXPECT_STREQ(neg_info->name, "CRC32") << "Safety Violation: Incorrect decode on single-bit corruption."; + } + { + // Test case: Flipping fixed bit 5 + const uint32_t corrupt_inst = 0x5123f023; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } + { + // Test case: Flipping fixed bit 4 + const uint32_t corrupt_inst = 0x5123f013; + const pvm_jit_decoder_arm32_instruction_info_t* neg_info = pvm_jit_decoder_arm32_decode(corrupt_inst); + + // Oracle predicts no match. + EXPECT_EQ(neg_info, nullptr) << "Safety Violation: Should have decoded to nullptr, but got " << (neg_info ? neg_info->name : "nullptr"); + } +} + +TEST_F(Arm32DecoderGeneratedTest, Stability_Fuzz_Test) { + // Feeds a large number of random inputs to the decoder to check for crashes or false positives. + std::mt19937 rng(42); // Fixed seed for deterministic runs + std::uniform_int_distribution dist; + + for(int i = 0; i < 100000; ++i) { + uint32_t random_inst = dist(rng); + const pvm_jit_decoder_arm32_instruction_info_t* info = pvm_jit_decoder_arm32_decode(random_inst); + if (info) { + // If the decoder claims a match, it MUST be a valid match. + ASSERT_EQ((random_inst & info->mask), info->expected) + << "Integrity Violation: Decoded " << std::hex << random_inst << " as \"" << info->name << "\" but mask/expected failed."; + } + } +}