The changes affects multiple places in the repo and this one of the rare
instances where I cant be bothered writing a comprehensive commit. Look
at the diff for changes.
Signed-off-by: Ronald Caesar <github43132@proton.me>
The GUI will not be necessary for the foreseeable future. Focus will be
on implementing the virtual machine. And this commit speeds up the compile time
as well.
Signed-off-by: Ronald Caesar <github43132@proton.me>
This commit introduces the core assertion subsystem as defined in
`DESIGN_DOC_ASSERT_FRAMEWORK.md`.
Signed-off-by: Ronald Caesar <github43132@proton.me>
Ronald Caesar (4):
arm64/mem: Refactor guest memory access and made it endian aware
build: Refactor CMake build system
common: Add design doc for log framework.
common: Implement logging framework
This new architecture decomposes the project into several distict static
libraries: common, host, kvm, and frontend.
By using static libraries, changes within one module will only require
that library to be re-linked, rather than recompiling and re-linking the
entire executable.
The third party library ImGui is now built as a static library target.
Signed-off-by: Ronald Caesar <github43132@proton.me>
Refactors the core guest memory access subsystem (guest.h) to be safer
and portable accross host systems with different endianness. The
previous implementation used direct pointer casting, which is not endian
safe.
1. All read and write functions have been converted from unsafe pointer
casts to memcpy(). This resolves alignment warning -Wcast-align.
2. The access functions no longer rely on asserts for error checking.
They now perform explicit boundary and alignment checking and returns
a guest_mem_access_result_t status code.
3. A new header (endian.h) provides cross platform byte swapping macros.
The memory access functions use these macros to ensure that the guest
always sees memory in the correct endian format, regardless of the
host's native byte order. The host endianness is now automatically
detected via CMake.
3. Asserts are now explicitly enabled in release builds to catch
critical errors.
Signed-off-by: Ronald Caesar <github43132@proton.me>
This is a major architectural overhaul of the KVM core.
The monolithic core directory has been restructured into a more logical
component based structure under src/:
* src/common: Truly genercic platform agnostic utilities.
* src/host: The host abstraction layer for the OS soecific code.
* src/frontend: User-interface and session management.
* src/kvm: The core CPU and virtual machine emulation logic.
* src/targets: Machine specific hardware definitions.
The core of the logical changes is a new framework for initializing and
running virtual machines.
* Machine Probing: A new machine factory (kvm_probe) and operations
table (kvm_ops_t) has been introduced. The core now interacts with
the emulated machine through this abstraction interface.
* Data Oriented MMIO disaptcher: This uses a data oriented structure
of arrays design and a binary search lookup to provide efficient
(O(log N)) dispatch for guest physical addresses.
Signed-off-by: Ronald Caesar <github43132@proton.me>
The core of the machine-type support is the new operations table,
kvm_ops_t. This acts as a standard C-style virtual table decoupling the
generic KVM core logic from target specific hardware emualtion. The
kvm_t VM instance now points to an ops table, which defines the
"personality" of the guest. A kvm_probe() factory function has been
added to initialize a kvm_t instance with the correct ops table for a
given machine type (eg, Switch 1).
The ops table's .mmio_read and .mmio_write function pointers are the
link between the armv8 CPU core and this new MMIO dispatcher. When a
physical memory access is determined to be MMIO, the VM will call the
appropriate function pointer, which in turn will use the MMIO dispatcher
to find and execute the correct device handler.
The initial implementation for the Switch 1 target
(targets/switch1/hardware/probe.cpp) is a stub. The bootstrapping
logic will be added in subsequent patches.
Signed-off-by: Ronald Caesar <github43132@proton.me>
Introduce a software-based page table walker for the arm64 MMU
emulation. This is foundational component for handling GVA-GPA
translations when a request missses the (future) software TLB.
For now, it handles only Page descriptors and does not yet support Block
descriptors or permission checks. These will be added in subsequent
patches.
Signed-off-by: Ronald Caesar <github43132@proton.me>
A new function, mmu_gva_to_gpa(), will be the sole entry point for
resolving guest virtual addresses. This initial implementation models
the processor's state on reset. The function inspects the M bit from the
emulated SCTLR_EL1 register. If the bit is clear, address mapping (GVA =
GPA) is performed. This is an architecturally-mandated behavior required
for the Arm guest to execute its initiall boot code before enabling
virtual memory.
Signed-off-by: Ronald Caesar <github43132@proton.me>
Pound's asserts were broken from the very beginning and I've just
realized this. Fixing it is not my problem.
Signed-off-by: Ronald Caesar <github43132@proton.me>
Introduce the foundational support for emulating the AArch64 execution
state. This is the first major step towards running a guest operating
system.
1. vCPU State: A structure that models the architectural state of an
Arm64 vCPU. This includes the general-purpose registers, FP/SIMD
vector registers, and the essential EL1 system registers
(ELR_EL1, SPSR_EL1, ESR_EL1, FAR_EL1, VBAR_EL1) which are mandatory
for handling exceptions.
2. Guest Memory Model: A dedicated guest memory subsystem has been
created to manage the emulated physical address space.
3. Synchronous Exception Entry: This adds the core logic for taking
synchronous exceptions. The new take_synchronous_exception() function
emulates the hardware process of saving guest state, populating
syndrome registers, and preparing the vCPU to enter an exception
handler in EL1.
==========
GloriousTacoo (1):
aarch64/cpu: added system registers to vcpu_state_t (#67)
Ronald Caesar (9):
aarch64: Add core state structure for vCPU emulation
aarch64: Correct vCPU register state and add FP/SIMD support
aarch64/mem: Add fast GPA-to-HVA translation helper
aarch64/mem: Fixed pointer arithmatic warning
aarch64/mem: Introduce a dedicated guest memory access layer
memory: Move arena allocator into pound::memory namespace
aarch64/kernel: Add synchronous exception entry logic
arm64: Renames the aarch64 directory to arm64
arm64: Rename memory.h to guest.h
Sinan Karakaya (1):
feat(aarch64): added system registers to vcpu_state_t
Signed-off-by: Ronald Caesar <github43132@proton.me>
The term "memory" is really ambiguous in the context of an emulator,
especially since the MMU is being developed. It can refer to host memory, or
guest memory, or both.
Signed-off-by: Ronald Caesar <github43132@proton.me>
The term "aarch64" is the formal name for Armv8-A architecture. However,
I found that the establish convention across the wider open source
ecosystem is to use the short name "arm64".
Signed-off-by: Ronald Caesar <github43132@proton.me>
To handle faults such as data aborts, alignment faults, or supervisor
calls, the CPU must transition from the guest's context into a
privileged exception handler. This patch emulates the hardware sequence
for this entry process.
1. The vcpu_state_t struct includes the essential EL1 system registers
required for exception handling (ELR_EL1, SPSR_EL1, ESR_EL1, FAR_EL1,
and VBAR_EL1).
2. A new function, take_synchronous_exception(), is introduced. It
models the requirements for entering an exception targeting EL1:
- Saves the return address (PC) into ELR_EL1.
- Saves the current proccess state (PSTATE) into SPSR_EL1.
- Contructs the Exception Syndrome Register (ESR_EL1) from the
provided Exception Class and ISS.
- Saves the faulting address to FAR_EL1 for data aborts.
- Updates the live PSTATE to a safe state for the handler.
This implementation is intentially partial. The final step of updating the
PC to jump to a handler in the guest's vector table (using VBAR_EL1) is
stubbed out. The vector table will contain assembly instructions so a
functional instruction decoder is required to fully complete the
exception handler.
Signed-off-by: Ronald Caesar <github43132@proton.me>
The existing memory arena impelmentation is moved into the pound::memory
namespace to align with the pound::aarch64 namespace.
Signed-off-by: Ronald Caesar <github43132@proton.me>
Sinan Karakaya says:
==============
Adds the system registers for aarch64. They includes the one defined in Yuzu, but also include other from the armv8 specs that seems like they should be necessary for emulation.
Most of them might be subject to being removed in the future, if they turn out to not be required for emulation.
Signed-off-by: Ronald Caesar <github43132@proton.me>
